KR100816120B1 - The method for the data swapping between the blocks of non volatile memory device - Google Patents

Abstract

A method for exchanging data between blocks of a nonvolatile memory device is provided to improve data exchange speed by exchange data between blocks included in an equal memory cell array without using an additional external memory. A block data exchange command and an address of a first block and a second block included in an equal memory cell array are inputted(210). An address of a temporal block, for storing the first block data, included in the same memory cell array where the first block is read out from a selected point of a spare cell included in the memory cell array(216). Data of the first block is stored in the temporal block temporarily. Data stored in the first block is stored in the temporal block(218). Data stored in the second block is stored in the first block(220). Data stored in the temporal block is stored in the second block(222).

Description

[0001] The present invention relates to a non-volatile memory device,

1 is a block diagram showing the overall configuration of a nonvolatile memory device to which the present invention is applied.

2 is a flowchart illustrating a method of exchanging data between blocks of a nonvolatile memory device according to an embodiment of the present invention.

3 is a diagram showing a memory block to be subjected to data exchange.

4 is a flowchart illustrating a method of copying data stored in a specific block to another block according to an embodiment of the present invention.

The present invention relates to a method for exchanging data between blocks in a nonvolatile memory device.

The memory cells of the non-volatile memory device are repeatedly programmed and erased, with each cell being consumed as the number of iterations increases. Depending on the degree of consumption of each cell, the overall performance of the flash memory system degrades due to the presence of the defective block when some blocks are heavily consumed and other blocks are relatively low in consumption. In addition to the performance degradation associated with the consumed block itself, the overall performance of the flash memory system may be degraded even if there are insufficient unused blocks to store the desired data. Wear leveling is performed to adjust the unbalance of the degree of consumption. As one of such wear leveling means, a method of exchanging data between blocks is used.

However, conventionally, in order to move data stored in a specific memory to another location, there has been a problem in that it takes a long time to read the corresponding data, temporarily store the data in the external memory, and then program it into another memory area.

In order to solve the above-described problems, the present invention provides a data exchange method capable of exchanging data between blocks included in the same memory cell array without going through a separate external memory.

According to another aspect of the present invention, there is provided a method for exchanging data between blocks, the method comprising: inputting addresses of a first block and a second block included in a block data exchange instruction word and an identical memory cell array to be exchanged; Reading an address of a temporary block included in the same memory cell array as the block and temporarily storing data of the first block at a predetermined point of a spare cell included in the memory cell array, A second block copying step of storing the data stored in the second block in the first block, a second block copying step of storing the data stored in the temporary block in the second block, And a three-block copying step.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the overall configuration of a nonvolatile memory device to which the present invention is applied.

The nonvolatile memory device includes a memory cell array 100, a page buffer 102, X / Y-decoders 104 and 106, an IO buffer unit 108, a high voltage generator 110, a command interface logic unit 112, An instruction register 114, and first to third address registers / counters 116, 118, and 120, respectively.

The operation of the nonvolatile memory device will now be described.

First, when the chip enable signal / CE is disabled for the instruction interface logic unit 112 and the write enable signal / WE is toggled, the instruction interface logic unit 112 Receives a command signal received through the IO buffer unit 108 and the command register 114, and generates a program command, an erase command, or a read command according to the command. At this time, the command signal includes a page program setup code for determining an operation mode of the nonvolatile memory device. Meanwhile, a read / busy bar signal / R / B outputted from the command interface logic unit 112 is disabled for a predetermined time, and an external memory controller (not shown) Receives a busy signal / R / B and recognizes that the nonvolatile memory device is in an operating state such as program / erase / read. That is, programming / erasing / reading of one page of the memory cell array is performed for a time during which the ready / busy signal (/ R / B) is disabled.

The first to third address registers / counters 116, 118, and 120 receive the address signals received through the IO buffer unit 108, and generate row address signals and column address signals. The address signal corresponds to one of the pages included in one of the memory cells. In the present invention, in order to receive and process addresses of first and second blocks to be exchanged, and to receive and process addresses of temporary blocks in which data for the first block is temporarily stored, And includes address registers / counters 116, 118, and 120 as components.

The high voltage generator 110 generates bias voltages in response to the program command, the erase command, or the read command, and supplies the generated bias voltages to the page buffer 102, the X-decoder 104, and the like.

In response to the row address signal, the X-decoder 104 supplies the memory cell array 100 with the bias voltages supplied from the high voltage generator 110 to one of the blocks of the memory cell array.

The Y-decoder 106, in response to the column address signal, supplies a data signal to bit lines (not shown) shared by the blocks of the memory cell array through the page buffer 102.

The page buffer 102 latches a data signal received through the IO buffer unit 108 and the Y-decoder 106 and outputs the latched data signal to bit lines (not shown) shared by the blocks of the memory cell array Output.

FIG. 2 is a flowchart illustrating a method of exchanging data between blocks of a nonvolatile memory device according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a memory block to be subjected to data exchange.

The data exchange method of the present invention will be described with reference to the drawings.

The block data exchange command is input to the command interface logic unit 112 through the IO buffer unit 108 and the command register 114 (step 210).

Next, addresses for the first block and the second block, which are data exchange destinations, are input (steps 212 and 214). The first block and the second block to be exchanged are specified as shown in FIG. 3, and the address for the first block is input to the first address register / counter 116 through the IO buffer unit 108 And the address for the second block is input to the second address register / counter 118. Each address register / counter 116, 118 sends the address for that block to the X-decoder 104. [

On the other hand, the temporary blocks for data exchange are predefined in the same memory cell array, and the addresses therefor are stored in advance in the spare cells of the memory cell array or the like. Accordingly, the address for the temporary block is read from the spare cell without being input separately, and is transmitted to the third address register / counter 120 (step 216).

Next, a first block copy step of storing the data stored in the first block in a temporary block included in the same memory cell array is performed (step 218). A concrete method of the block copying step will be described later.

Next, a second block copy step of storing the data stored in the second block in the first block is performed (220). Since the data for the first block is already stored in the temporary block, the data stored in the first block need not be held any longer.

Next, a third block copy step of storing data stored in the temporary block into a second block is performed (222). Since the data stored in the first block is stored in the temporary block in step 218, if the data is copied to the second block, the data of the first block is stored in the second block.

In summary, when the block data exchange instruction word and the block address to be exchanged are inputted, the data stored in the first block and the second block are exchanged in block units using the temporary block specified in the memory cell array .

 4 is a flowchart illustrating a method of copying data stored in a specific block to another block according to an embodiment of the present invention.

First, the data stored in the first page of the third block is read and stored in the page buffer (410).

In this case, the third block is a block in which original data to be copied is stored, and may be a first block, a second block, or a temporary block in FIG. 3 as described above. That is, when data is copied from the first block to the temporary block (216), the first block becomes the third block. When the data is copied to the first block from the second block (218) When the data is copied 220 from the temporary block to the second block, the temporary block becomes the third block.

The data is read from the first page of the third block included in the memory cell array and stored in the latch of the page buffer. Since the read operation is similar to a normal page buffer read operation, a detailed description thereof will be omitted.

Next, the data stored in the page buffer is programmed in the first page of the fourth block (step 420).

 In this case, the fourth block means a block in which copied original data is to be stored, and may be the first block, the second block, or the temporary block in FIG. 3 described above. That is, when data is copied from the first block to the temporary block (216), the temporary block becomes the fourth block. When the data is copied (218) from the second block to the first block, In the case of copying data from the temporary block to the second block (220), the second block becomes the fourth block.

And program the data stored in the page buffer on the first page of the fourth block of the memory cell array. The program operation is similar to a program operation of a conventional page buffer, and thus a detailed description thereof will be omitted.

Such an operation is sequentially performed for the third block and the fourth block in the order of the respective pages (steps 430 and 440), and when the process proceeds to the last page of each block, a signal indicating that the block copy is completed is transmitted 450).

Since the data exchange between the blocks of the nonvolatile memory device can be facilitated through the above-described configuration, and data exchange is performed through temporary blocks previously provided in the same block without using an external memory, Data exchange is possible.

In addition, such a data exchange method has an advantage that it can be used as a means for leveling a wearer.

Claims (3)

Inputting an address of a first block and a second block included in a block data exchange instruction and an identical memory cell array to be exchanged, Reading an address of a temporary block included in the same memory cell array as the first block and temporarily storing data of the first block at a selected point of a spare cell included in the memory cell array, A first block copy step of storing data stored in the first block in the temporary block; A second block copying step of storing the data stored in the second block in the first block, And a third block copy step of storing data stored in the temporary block in the second block. 2. The nonvolatile memory device according to claim 1, wherein the address of the first block is transferred to a first block address register / Transferring the address of the second block to a second block address register / counter provided in the nonvolatile memory device; And the address of the temporary block is transferred to a third block address register / counter provided in the nonvolatile memory device. The method of claim 1, wherein the first block copying step comprises: reading data of an i-th page of a third block storing original data to be copied and storing the read data in a page buffer; Programming the data stored in the page buffer in an i-th page of a fourth block in which copied original data is to be stored; And repeating the reading and programming steps sequentially from the third block to the last page of the fourth block.

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