KR100790233B1 - Fabricating method of image sensor - Google Patents

Abstract

The present invention relates to an image sensor, and more particularly, to provide a method of manufacturing an image sensor that can improve light sensitivity. To this end, the present invention provides a photodiode adjacent to a substrate between a neighboring gate electrode and the neighboring gate electrode. Forming an insulating film on the entire structure including the formed sensing diffusion region; And forming a plug penetrating through the insulating layer and in contact with the neighboring gate electrode at the same time and contacting the sensing diffusion region.

Sensing diffusion area, spacer, plug, nitride film, oxynitride film.

Description

Fabrication method of image sensor             

1 is a plan view showing an image sensor according to the prior art,

2 is a cross-sectional view showing an image sensor according to the prior art,

3A to 3C are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention;

4 is a plan view showing an image sensor formed according to the present invention;

Explanation of symbols on the main parts of the drawings

20: substrate 21: field insulating film

22 polysilicon film 23 tungsten silicide film

24 hard mask insulating film 25 spacer

26: sensing diffusion region 27: insulating film

28: plug 29: metal wiring

PD: Photodiode

The present invention relates to a semiconductor device, and more particularly, to an image sensor, and more particularly, to a method for forming a sensing diffusion region for improving light sensitivity of an image sensor.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. In a double charge coupled device (CCD), individual metal-oxide-silicon (MOS) capacitors are very different from each other. A device in which charge carriers are stored and transported in a capacitor while being located in close proximity, and CMOS (Complementary MOS) image sensor is a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. Is a device that employs a switching method that creates MOS transistors by the number of pixels and sequentially detects the output using them.

In the manufacture of such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, one of which is a condensing technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data. To increase light sensitivity, the ratio of the photodiode to the total image sensor area is increased. Efforts have been made to increase (usually referred to as Fill Factor).

1 is a plan view showing an image sensor according to the prior art, Figure 2 is a cross-sectional view.

Referring to FIG. 1, in the conventional image sensor, a photodiode (hereinafter referred to as PD) is formed on a substrate (not shown), and a sensing diffusion region (hereinafter referred to as FD) is disposed on a substrate (not shown) at a position spaced apart from the PD. A gate electrode (for example, a transfer gate, hereinafter referred to as G) that overlaps one end of the PD and the FD, and transfers the optical signal from the PD to the FD through an on-off operation. have. In addition, it comprises a plug (P) for connecting to the subsequent metal wiring contacted to the FD and arranged at a predetermined interval 'A' in G, Figure 1 is a process for forming a plug (P) for connecting the metal wiring to the FD This indicates a completed state.

Referring to FIG. 2, which is described in more detail with reference to FIG. 1, a field insulating film 11 is locally formed on a substrate 10, and ion implantation is performed under the substrate 10 adjacent to the field insulating film 11. PD is formed through, and the like, a gate electrode G having a structure in which the polysilicon film 12 and the tungsten film 13 is stacked is formed on the substrate 10 adjacent to the PD, the gate electrode ( G) has an oxide film spacer 14 on its side. An FD 15 extending inwardly from the surface of the substrate 10 between neighboring gate electrodes G is formed, an insulating film 16 is formed on the gate electrode G and the PD, and an insulating film 16 Plugs P and 17 contacted to the above-described FD 15 are formed, and metal wires 18 are formed on the plug 17.

Here, the substrate 10 is a layer in which a high concentration of the P + + layer and the P-Epi layer is laminated, referred to as the substrate 10 for the sake of simplicity of the drawings.                         

As described above, the PD is an N-type photodiode region (hereinafter referred to as n-region) formed under the P-type substrate, and a P-type photodiode region (hereinafter referred to as P0) formed extending from the substrate surface to the n-region. FD is a high concentration N-type (n +) formed extending downward from the substrate surface.

As shown in FIG. 1, as shown in FIG. 1, the gate electrode G is spaced apart from the plugs P and 17 by an interval of 'A', and the gate electrode G is formed when the plug 17 contacted to the FD is formed. ) And the plug 17 should be kept constant as 'A'. This is because the gate electrode G may be affected during the etching of the contact for forming the plug. In the case of the FD, the light sensitivity of the overall image sensor may be improved as the capacitance thereof decreases, so that the area and the unit of the FD may be improved. The size of the area other than the pixel, that is, the peripheral area should be reduced. However, in the above-described conventional image sensor, it is difficult to further reduce the area because a certain distance must be secured between the gate electrode G and the contact plug 17 of the FD in order to secure a process margin. Therefore, the limit is also reached to improve the light sensitivity of the image sensor.

The present invention proposed to solve the problems of the prior art as described above, an object thereof is to provide a method for manufacturing an image sensor that can improve the light sensitivity.

In order to achieve the above object, the present invention includes forming an insulating film on an entire structure including a photodiode and a neighboring gate electrode and a sensing diffusion region formed under the substrate between the neighboring gate electrode; And forming a plug penetrating through the insulating layer and in contact with the neighboring gate electrode at the same time and contacting the sensing diffusion region.

The present invention defines a gate electrode pattern by depositing a nitride film or an oxynitride film to a predetermined thickness on the conductive material of the gate electrode, and then using a nitride film or an oxynitride film instead of the conventional oxide film when forming a spacer, for the metal wiring of the subsequent sensing diffusion region. In order to prevent the loss of the gate electrode in the forming process, the gap between the gate electrode pattern and the plug is minimized, thereby reducing the area of the sensing diffusion region and reducing its capacity, thereby improving the light sensitivity of the image sensor. do.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. 3A to 3C are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention, and FIG. 4 is a plan view illustrating an image sensor formed according to the process application of the present invention described above.

First, as shown in FIG. 3A, a field insulating film 21 is locally formed on a substrate 20 on which a high concentration P ++ layer and a P-Epi layer are stacked for device isolation to define a field region and an active region. Next, the polysilicon layer 22 and the tungsten silicide layer 23 are sequentially formed, and then nitride or oxide except for the oxide layer having weak etching resistance to prevent loss of the gate electrode due to subsequent contact formation thereon. After forming the hard mask insulating film 24 using a nitride film in a stacked structure, a polysilicon film 22, a tungsten silicide film 23, and a hard mask insulating film 24 through a series of photolithography processes for defining a gate electrode. The gate electrode pattern is formed of (), and the gate electrode pattern is spaced apart from the field insulating film 21.

On the other hand, since the doping profile of the gate electrode pattern formed later, in particular, the low voltage buried photodiode formed near one side of the transfer transistor determines the charge transfer efficiency, P0 ion implantation and n-ion implantation for forming the P0 region and the n- region of the low voltage buried photodiode are sufficiently thick so that they can be self-aligned on one side of the gate electrode pattern. If the thickness is not sufficiently thick, dopant phosphorus (P ₃₁ ), which is a dopant during high energy N-type ion implantation, penetrates through the gate electrode and is not self-aligned, thereby reducing charge transport efficiency.

Therefore, the thickness of the gate electrode pattern is preferably thickened. In particular, the above-described hard mask insulating film 24 is formed to have a thickness of 1000 kPa to 4000 kPa.

Subsequently, an ion implantation mask (not shown) is formed to form a low concentration n-region of the low voltage buried photodiode, and high energy and low concentration N-ion implantation are performed to form PDs aligned on one side of the gate electrode pattern. forms an n-region.

Next, as shown in FIG. 3B, the ion implantation mask used to form the n-region is removed, and then a mask pattern (not shown) for P0 ion implantation is formed again and P0 ion implantation is performed to perform n- By forming the P0 region in which the n-region is extended to the surface of the substrate 20 on the region, a PD composed of P (P-Epi) -N (n-)-P (P0) is formed.

Here, a path through which the P0 region and the lower P-Epi layer are electrically connected to each other is provided, whereby the P0 region and the P-Epi layer have an equipotential with each other at a low voltage of 5V or less, and the n-region is about 1.2V to 2.8. Full depletion at V is possible. If the low energy P0 doped region is not electrically connected to the P epi layer, the low voltage buried photodiode will not function normally but will act like a simple PN junction.

Subsequently, an insulating film for a spacer is deposited using a nitride film, an oxynitride film, or the like along the profile of the entire structure including the gate electrode pattern, and then the spacer 25 is formed on the sidewall of the gate electrode pattern through front etching. ) Is formed to a suitable thickness so that it remains after subsequent contact etching.

Subsequently, LDD ion implantation is performed to form n + regions, that is, sensing diffusion regions 26 and FD, between the gate electrodes, so that the FDs overlap with the spacers of neighboring gate electrodes.

Subsequently, the insulating film 27 is thickly deposited.

Next, as shown in FIG. 3C, the insulating layer 27 is selectively etched to form a contact hole (not shown) exposing the surface of the sensing diffusion region 26 between the gate electrodes. All of the insulating layers 27 between the two gate electrodes are removed. At this time, the etching stops at the spacers 25 of the neighboring gate electrodes and the surface thereof is exposed.

Subsequently, after forming tungsten or other conductive material to sufficiently fill the contact hole, a planarization process is performed until the surface of the insulating film 27 is exposed to form the plug 28 contacted with the FD. The top view of the image sensor in which the plug 28 mentioned above is formed.

That is, as shown in FIG. 4, the PD and the FD are spaced apart from each other, and the gate electrode G for transmitting the optical signal to the FD through an on-off operation is overlapped with one end of the PD and one end of the FD, respectively. In this case, the two neighboring gate electrodes G do not have a constant distance as described above in the form of physically contacting each other with the FD.

Therefore, the area can be made smaller when forming the lower FD, so that the capacity can be reduced. Meanwhile, the contact resistance may also be reduced by increasing the contact area between the plug P and the FD by increasing the width of 'B' as shown.

Subsequently, a metal wiring 29 is formed on the plug 28.

According to the present invention, a hard mask on the gate electrode and a spacer on a sidewall of the spacer are used to etch resistant materials such as a nitride film, respectively, and the sensing diffusion region is in contact with a gate electrode adjacent to each other when the metal wiring contact plug is formed. By reducing the area of the sensing diffusion area of the lower portion, it has been found through the embodiment that the light sensitivity of the image sensor can be improved accordingly.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can improve the photosensitivity, and can be expected to have an excellent effect that can ultimately greatly improve the performance of the image sensor.

Claims (5)

delete Forming a gate electrode pattern having a hard mask on its upper layer on the substrate; Forming a photodiode on a substrate on one side of the gate pattern; Forming a spacer on sidewalls of the gate electrode pattern; Forming a sensing diffusion region on a substrate on the other side of the gate electrode pattern: Forming an insulating film on the entire structure of the substrate including the sensing diffusion region; Forming a contact hole by etching the insulating layer to expose the spacers and the sensing diffusion region; Forming a plug to fill the contact hole; Image sensor manufacturing method comprising a. The method of claim 2, The spacer is an image sensor manufacturing method, characterized in that the nitride film or oxynitride film. According to claim 2, The hard mask has an image sensor manufacturing method characterized in that the thickness of 1000 ~ 4000Å. The method of claim 4, wherein The hard mask is an image sensor manufacturing method, characterized in that the nitride film or oxynitride film.

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