KR100780366B1 - Semiconductor manufacturing apparatus - Google Patents

Abstract

The present invention relates to a semiconductor manufacturing apparatus for generating a plasma and performing a predetermined process on a semiconductor wafer. The semiconductor manufacturing apparatus according to the present invention includes a chamber, a support member installed below the chamber, on which a wafer is seated, and an interior of the chuck. A plurality of lift pins for mounting and spaced apart from and into the top surface of the chuck by being installed perpendicularly to the top surface of the chuck in order to remove charges remaining on the wafer when the lift pins contact the wafer. It includes a ground line. In addition, the material of the lift pin is made of a chemical semiconductor material to have electrical resistance, and the top surface of the lift pin is coated with a metal material having electrical conductivity to reduce the contact resistance with the wafer.

Thus, the lift pin effectively grounds the electric charges remaining on the wafer upon contact with the wafer, thereby preventing the discharge phenomenon caused by the contact of the lift pin and the wafer.

Plasma, Plasma Processing Equipment, Lift Pins, Ground, Ground, Ground Line

Description

Semiconductor manufacturing device {SEMICONDUCTOR MANUFACTURING APPARATUS}

1 is a configuration diagram schematically showing a semiconductor manufacturing apparatus according to the present invention.

FIG. 2 is an enlarged view illustrating main parts of a structure according to an exemplary embodiment of the lift pin illustrated in FIG. 1.

3 is a view for explaining the effect of the lift pin shown in FIG.

4 is an enlarged view illustrating main parts of a structure according to another exemplary embodiment of the lift pin illustrated in FIG. 1.

5 is a view for explaining the effect of the lift pin shown in FIG.

* Description of the symbols for the main parts of the drawings *

100: semiconductor manufacturing apparatus 140: lift pin member

110: chamber 142: lift pin

112: exhaust pipe 144: lift pin drive unit

114: suction device 146: connecting member

120: shower head 148: bellows

122: gas supply line 150: ground line

124: gas source 152: resistor

130 support member 162 first high frequency applicator

132: electrode plate 164: second high frequency applicator

The present invention relates to a semiconductor manufacturing apparatus, and more particularly, to a semiconductor manufacturing apparatus for generating a plasma to perform a predetermined process on the semiconductor wafer.

Plasma generation in the semiconductor manufacturing process includes a dry etching process, a chemical vapor deposition process, an ashing process, and a cleaning process in a chamber.

The semiconductor manufacturing apparatuses performing the above-described processes generally include a chamber, an upper electrode installed above the chamber, a support member disposed below the chamber, and provided with a lower electrode facing the upper electrode to generate a plasma. do. The upper electrode may be provided in, for example, a shower head for supplying a process gas into the chamber. Here, the wafer support member is provided with a plurality of lift pins to separate and seat the wafer from the top surface of the chuck.

In the semiconductor manufacturing apparatus having the above-described configuration, when the process is started, the wafer is introduced into the chamber to be seated on the support member, the process gas is injected through the shower head, and high frequency power is applied to the upper and lower electrodes to generate plasma. A predetermined semiconductor process is performed on the wafer.

However, as described above, when plasma is generated directly inside the chamber, the wafer on which the process is performed is electrically charged. Thus, when the support member and lift pins in direct contact with the wafer are in contact with the wafer, the charge remaining on the wafer is rapidly conducted to the support member or lift pins, causing arcing. For example, when lift pins contact the wafer to seat and space the wafer to / from the top surface of the support member, the charges charged on the wafer are rapidly conducted to the lift pins to cause discharge.

Normally the lift pins are made of an insulator to be electrically blocked, but the charges charged on the wafer cause arcing due to the rapid movement of electricity along the surface of the insulator. When such a discharge occurs, the elements formed on the wafer are electrically damaged, and further, the operation of the semiconductor manufacturing apparatus due to the discharge may be stopped.

An object of the present invention for solving the above problems is to provide a semiconductor manufacturing apparatus that prevents the lift pin from arcing upon contact with the wafer.

A semiconductor manufacturing apparatus according to the present invention for achieving the above object is a plurality of chambers, a support member is installed in the chamber to seat the wafer, a plurality of installed on the support member to seat and space the wafer to / from the support member Lift pins and a ground line for grounding the charge remaining on the wafer when the lift pins contact the wafer.

According to an embodiment of the present invention, the lift pin is coated with an electrically conductive metal material on the upper surface of the lift pin to reduce contact resistance with the wafer.

According to another embodiment of the present invention, the upper surface of the lift pin is coated with a metal material having electrical conductivity to reduce the contact resistance with the wafer, the upper surface in contact with the wafer has a plane larger than the cross-sectional diameter of the lift pin It is formed so as to reduce the contact resistance with the wafer.

According to an embodiment of the present invention, the ground line is provided with an electrical resistor.

According to an embodiment of the present invention, the lift pin is made of a compound semiconductor material to have an electrical resistance.

Hereinafter, the semiconductor manufacturing apparatus and the lift pins according to the embodiment of the present invention will be described in detail. Embodiment of the present invention may be modified in various forms, the scope of the present invention is not limited to the embodiments described below. This embodiment is provided to more fully explain the present invention to those skilled in the art, that is, to those skilled in the art. Accordingly, the shape of elements in the figures is exaggerated to emphasize clear explanation.

(Example)

1 is a configuration diagram schematically showing a configuration of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

Referring to FIG. 1, the semiconductor manufacturing apparatus 100 according to the present invention includes a chamber 110, a shower head 120, a support member 130, a lift pin member 140, and a ground line 150. .

The chamber 110 generates a plasma therein to provide a space for performing a predetermined process on the wafer. The chamber 110 of this embodiment is a process processing apparatus for forming a specific thin film on a semiconductor wafer. The chamber 110 is sealed to the outside so that the inside maintains a vacuum during the process. In addition, the chamber 110 is provided with a heater (not shown) to satisfy the predetermined process temperature during the process to maintain the temperature of the chamber 110 at the process temperature.

A shower head 120 to be described later is installed above the chamber 110, and a support member 130 to be described below is installed below the inside of the chamber 110. One side of the chamber 110 is provided with an exhaust pipe 112 for discharging the process gas supplied to the chamber 110 during the process to the outside of the chamber 110. To this end, the exhaust pipe 112 is provided with a suction device 114, the suction device 114, for example, a vacuum pump such as a turbo molecular pump to discharge the gas inside the chamber 110 during the process to the inside of the chamber 110 To decompress and exhaust the chamber 110.

The shower head 120 is installed above the inside of the chamber 110. The shower head 120 is connected to a gas supply line 124 for supplying a process gas including a reaction gas and a cleaning gas to the shower head 120. The gas supply line 124 transfers a predetermined process gas from the gas supply source 126 to supply the shower head 120.

The shower head 120 may be insulated from the outer circumferential surface by a heat insulating member (not shown). The shower head 120 and the heat insulating member are provided with at least one sealing ring (not shown), and a process gas injected through the shower head 120 and the sealing between the shower head 120 and the heat insulating member. To regulate the flow.

The shower head 120 is provided with an upper electrode 122 to which high frequency power is applied. For example, the upper electrode 122 is manufactured in a disk shape in which a plurality of discharge holes 122a are formed to uniformly inject the process gas toward the wafer surface. The upper electrode 122 is connected to the first high frequency applicator 162 installed outside the chamber 110. The first high frequency applicator 162 applies a predetermined high frequency power to the upper electrode 122 of the shower head 120 during the process.

The support member 130 is installed below the chamber 110 so that the wafer is seated on the upper surface. The support member 130 may be an electrostatic chuck that applies a voltage to closely contact the upper surface of the support member 130 when the wafer is seated. In addition, a cooling gas line (not shown) that provides a helium gas that lowers the temperature of the wafer so that the wafer seated on the inside of the support member 130 is not damaged or deformed due to the high temperature when the high temperature thin film forming process is performed. May be provided.

A disk-shaped lower electrode 132 is installed on the upper surface or inside of the support member 130. The lower electrode 132 is provided in parallel with the upper electrode 122 of the shower head 120, and the lower electrode 132 is connected to the second high frequency applicator 164 provided outside the chamber 110. The second high frequency applicator 164 applies a predetermined bias high frequency power to the lower electrode 132 during the process. Thus, each of the upper and lower electrodes 122 and 132 receives a predetermined high frequency power from the first and second high frequency applicators 162 and 164 as the process proceeds, The process gas injected from the shower head 120 is ionized to generate plasma.

The above-described support member 120 may perform up and down movements and rotational movements. For this purpose, the support member 120 is coupled to the support member 120 outside the chamber 110 to drive the support members 120 up and down and rotational movements. (Not shown) may be provided.

The lift pin member 140 includes a lift pin 142, a lift pin driver 144, a connection member 146, and a bellows 148. A plurality of lift pins 142 are provided to be perpendicular to the upper surface of the wafer support member 130 in the wafer support member 130 to move the wafer W up and down from the upper surface of the chuck 120. Three lift pins 142 are provided, for example, and are arranged in a triangle shape on the upper surface of the wafer support member 130. The lift pins 142 operate up and down by the lift pin driver 144 to seat and space the wafer W to and from the wafer support member 120. In this case, one end of the connection member 146 is connected to the plurality of lift pins 142, and the other end is connected to the lift pin driver 144 to allow the lift pins 142 to operate simultaneously. Then, the bellows 148 protects the surface of each lift pin 142 exposed outside the chamber 110. That is, each of the lift pins 142 exposed to the outside of the chamber 110 may be corroded when contacted with the outside air, so that the bellows 148 is provided to surround the surface of the lift pin 142 to lift the lift pins 142. ) Prevents contact with outside air.

The ground line 150 is connected to each lift pin 142. The ground line 150 is provided to ground the charges when the charges remaining in the charged wafer W flow to the lift pin 142 during the process. To this end, the ground line 150 has one end connected to the respective lift pins 142 and the other end connected to a ground point (not shown) outside the chamber 110 to ground the charges of the lift pin 142. Connected.

In addition, the ground line 150 is provided with a resistor 152. The resistor 152 prevents charges traveling along the lift pin 146 from being grounded rapidly along the lift pin 146. The resistor 152 is configured to prevent charges remaining in the wafer W from being transferred to the resistor 152. This relaxes the electrical flow so that it is grounded. Thus, when the lift pin 146 is charged to contact the wafer W in which the charges remain, the charges of the wafer W have a relaxed flow and are ground along the ground line 150 so that the lift pin ( 146 may prevent an arcing phenomenon that occurs when the wafer W is seated and spaced from the top surface of the wafer support member 130.

Hereinafter, the lift pin member 140 according to the present invention will be described in detail with reference to FIGS. 2 and 3.

FIG. 2 is an enlarged view illustrating main parts of the lift pin illustrated in FIG. 1 according to an exemplary embodiment, and FIG. 3 is a view for explaining the effect of the lift pin illustrated in FIG. 2.

Referring to FIG. 2, the lift member 140 according to an embodiment of the present invention has a lift pin 146 coated with a metal material having an upper conductivity at an upper end thereof in contact with the wafer W. Referring to FIG. For example, the lift pin 146 may be made of a compound semiconductor material composed of two or more kinds of elemental compounds such as hydrocarbon (SiC). This is to allow the electric charge to properly flow to the lift pin 146. If the lift pin 146 is made of a non-conductor, the charge is not moved and cannot be grounded. If the lift pin 146 is a conductor, Since excessive charge flows to the arcing phenomenon, the lift pin 146 is made of a suitable semiconductor material to prevent this. Then, the upper surface of the lift pin 146 is coated with an electrically conductive metal such as gold (Au), platinum (PT), and silver (Ag), so that the lift pin 146 is charged during the process ( When in contact with W) the charges from the wafer W can be easily conducted to the lift pins 146. That is, the above-described metal materials are coated on the upper surface of the lift pin 146 in contact with the wafer W to reduce the contact resistance with the wafer.

Thus, as shown in FIG. 3, when the lift pin 146 contacts the bottom surface of the wafer W to seat and space the wafer W into / from the top surface of the wafer support member 130, Charges remaining in the charged wafer W are moved along the lift pin 146 and ground along the ground line 150 to prevent arcing due to the contact of the lift pin 146.

Here, as another embodiment of the present invention, a plane in which an upper portion of the lift pin 146 in contact with the wafer is larger than the cross-sectional diameter of the lift pin may be formed to reduce contact resistance with the wafer.

4 is an enlarged view illustrating main parts of the lift pin illustrated in FIG. 1 according to another exemplary embodiment, and FIG. 5 is a view for explaining the effect of the lift pin illustrated in FIG. 4.

4 and 5, the lift pin 146 according to another embodiment of the present invention is formed such that an upper surface contacting the wafer W has a plane larger than a cross-sectional diameter of the lift pin. This is to increase the area in which the lift pin 146 contacts the wafer W so as to increase the amount of charges of the electrically charged wafer W in the process flow to the lift pin 146. In addition, as described above with reference to FIG. 3, the top surface of the lift pin 146 is coated with a metal material having electrical conductivity. That is, the upper surface of the lift pin 146 made of a compound semiconductor material such as hydrocarbon (SiC) is coated with an electrically conductive metal such as gold (Au), platinum (PT), and silver (Ag) to lift the process. The charges from the wafer W easily flow to the lift pins 146 when the fins 146 are in contact with the charged wafer W. That is, the above-described metal materials are coated on the upper surface of the lift pin 146 in contact with the wafer W to reduce the contact resistance with the wafer.

Thus, as shown in FIG. 5, when the lift pin 146 contacts the bottom surface of the wafer W to seat and space the wafer W to / from the top surface of the wafer support member 130, The charges remaining in the charged wafer W are easily moved to the upper surface of the lift pin 146 having an increased contact area and grounded along the ground line 150, resulting in the contact of the lift pin 146. Prevents arcing.

Although the semiconductor manufacturing apparatus according to the embodiments of the present invention has been described above, the present invention is not limited to the above-described embodiments. For example, the embodiment of the present invention has been described using a chemical vapor deposition apparatus using plasma, but the scope of the present invention is all semiconductor manufacturing apparatus having a lift pin for separating and seating the wafer from the wafer support member, in particular, plasma It is applicable to all the semiconductor manufacturing apparatus which generate | occur | produces.

The technical idea of the present invention is to prevent the arcing phenomenon when the lift pin is in contact with the wafer, the number, shape, installation method and the number of ground lines, the installation method and the like of the lift pin can be variously changed and modified, such as Simple variations and modifications are included within the scope of the present invention.

As described above, the semiconductor manufacturing apparatus according to the present invention improves the installation of the ground line and the lift pins to prevent the lift pins from being discharged upon contact with the wafer. Thus, the lift pin effectively grounds the charges remaining on the wafer upon contact with the wafer to prevent arcing caused by contact of the lift pin and the wafer.

Claims (5)

In the semiconductor manufacturing apparatus, A chamber; A support member installed inside the chamber to seat a wafer; A plurality of lift pins mounted to the support member to seat and space a wafer from / to the support member; And, A ground line for grounding the charge remaining on the wafer when the lift pins contact the wafer, The upper surface of the lift pin, It is formed to have an area larger than the cross section of the lift pin to facilitate the flow of charges remaining on the wafer upon contact with the wafer, The lift pin, The semiconductor manufacturing apparatus, characterized in that the upper surface in contact with the wafer is coated with a conductive metal material to reduce the contact resistance with the wafer. The method of claim 1, The lift pin, A semiconductor manufacturing apparatus, characterized in that it is made of a compound semiconductor material to have an electrical resistance. delete delete The method according to claim 1 or 2, In the ground line, A semiconductor manufacturing apparatus, characterized in that an electrical resistor is provided.

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