KR100749646B1 - Method of fabricating semiconductor device - Google Patents
Method of fabricating semiconductor device Download PDFInfo
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- KR100749646B1 KR100749646B1 KR1020050132534A KR20050132534A KR100749646B1 KR 100749646 B1 KR100749646 B1 KR 100749646B1 KR 1020050132534 A KR1020050132534 A KR 1020050132534A KR 20050132534 A KR20050132534 A KR 20050132534A KR 100749646 B1 KR100749646 B1 KR 100749646B1
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- 239000004065 semiconductor Substances 0.000 title description 4
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 20
- 238000005468 ion implantation Methods 0.000 claims abstract description 19
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 17
- 239000010703 silicon Substances 0.000 claims abstract description 17
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 239000013078 crystal Substances 0.000 abstract description 26
- 229910000577 Silicon-germanium Inorganic materials 0.000 abstract description 21
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 abstract description 21
- -1 germanium ions Chemical class 0.000 abstract description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000001953 recrystallisation Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 229910001423 beryllium ion Inorganic materials 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
본 발명의 실리콘 게르마늄 단결정층 형성방법은, 실리콘 단결정 기판에 게르마늄 이온 주입을 실시하는 단계와 이온 주입이 이루어진 실리콘 기판을 열처리하여 주입된 게르마늄과 주변의 기판 실리콘 원자가 재결정을 하도록 하는 고온 처리단계를 구비하여 이루어지는 것을 특징으로 한다. 본 발명에서는 이온주입을 위해서 먼저 버퍼층을 형성하고, 고온 처리 단계 이후에 버퍼층을 제거하는 단계를 구비하여 이루어질 수 있다.The method of forming a silicon germanium single crystal layer of the present invention includes the step of implanting germanium ions into a silicon single crystal substrate and a high temperature treatment step of recrystallizing the germanium and the surrounding substrate silicon atoms by heat-treating the implanted silicon substrate. Characterized in that made. In the present invention, it may be formed by first forming a buffer layer for ion implantation, and removing the buffer layer after the high temperature treatment step.
Description
도1 내지 도4는 본 발명의 일 실시예에 따른 실리콘 게르마늄 단결정층 형성 방법의 주요 단계를 나타내는 공정 단면도들이다.1 through 4 are cross-sectional views illustrating main steps of a method of forming a silicon germanium single crystal layer according to an embodiment of the present invention.
*도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
10: 기판 20: 버퍼막10: substrate 20: buffer film
30: 실리콘 게르마늄 결정층 30: silicon germanium crystal layer
본 발명은 반도체 장치 형성 방법에 관한 것으로, 보다 상세하게는 반도체 기판에 실리콘 게르마늄 단결정층을 형성하는 방법에 관한 것이다.The present invention relates to a method of forming a semiconductor device, and more particularly, to a method of forming a silicon germanium single crystal layer on a semiconductor substrate.
실리콘-게르마늄 재질을 기판으로 사용하는 반도체 장치는 최근 고주파 영역의 통신장비에 사용가능성과 시스템 온 칩 등에서 유리하다는 점 등으로 많이 연구되고 개발되고 있다. 한편, 실리콘 게르마늄층은 게이트 전극의 재질로도 많이 연구되고 있다. BACKGROUND OF THE INVENTION Semiconductor devices using silicon-germanium as a substrate have been recently researched and developed due to their usability in communication equipment in a high frequency region and advantages in system on chip. On the other hand, the silicon germanium layer has been studied as a material of the gate electrode.
실리콘 게르마늄 물질막 또는 실리콘 게르마늄 단결정을 성장시키는 방법으 로는 현재 대부분 화학기상증착을 사용하고 있다. 그런데, 화학기상증착으로 실리콘 게르마늄 단결정을 성장시키는 것은 일단 성장 자체가 매우 어렵고, 또한, 게르마늄의 농도가 균일한 결정을 성장시키는 것이 어렵다는 문제점을 드러내고 있다. As a method of growing a silicon germanium material layer or a silicon germanium single crystal, chemical vapor deposition is mostly used. However, the growth of silicon germanium single crystals by chemical vapor deposition has revealed a problem that it is very difficult to grow once, and it is difficult to grow crystals having a uniform germanium concentration.
따라서 상용화될 수 있는 공정으로 개발되기 위해서는 실리콘 게르마늄 단결정층을 형성하는 다른 방법을 찾는 것이 필요하다.Therefore, in order to be developed into a process that can be commercialized, it is necessary to find another method of forming a silicon germanium single crystal layer.
본 발명은 상술한 종래의 실리콘 게르마늄 단결정 성장의 문제점을 해결하기 위한 것으로, 실리콘 게르마늄 단결정층을 기존의 공정 장비를 이용하여 비교적 용이하게 얻을 수 있는 방법을 제공하는 것을 목적으로 한다.The present invention is to solve the above-described problems of the conventional silicon germanium single crystal growth, an object of the present invention is to provide a method for obtaining a silicon germanium single crystal layer relatively easily using existing process equipment.
상기 목적을 달성하기 위한 본 발명의 실리콘 게르마늄 단결정층 형성방법은, 실리콘 단결정 기판에 게르마늄 이온 주입을 실시하는 단계와 이온 주입이 이루어진 실리콘 기판을 열처리하여 주입된 게르마늄과 주변의 기판 실리콘 원자가 재결정을 하도록 하는 고온 처리단계를 구비하여 이루어지는 것을 특징으로 한다.According to the method of forming a silicon germanium single crystal layer of the present invention for achieving the above object, the germanium ion implantation is performed by performing germanium ion implantation on a silicon single crystal substrate and heat-treating the silicon substrate on which the ion implantation is performed so that the germanium and the surrounding substrate silicon atoms are recrystallized. It is characterized by comprising a high temperature treatment step.
본 발명에서 이온주입을 위해서는 버퍼층으로 기판면에 실리콘 산화막을 형성하는 것이 바람직하며, 고온 처리 단계 이후에 버퍼층으로 사용된 실리콘 산화막을 제거하는 단계를 구비하여 이루어질 수 있다.In the present invention, it is preferable to form a silicon oxide film on the surface of the substrate as a buffer layer for ion implantation, and may include the step of removing the silicon oxide film used as the buffer layer after the high temperature treatment step.
본 발명에서 게르마늄 이온 주입 에너지 및 이온 주입 도즈(dose)량은 원하 는 실리콘 게르마늄 단결정의 두께 및 농도를 고려하여 결정될 수 있으며, 고온 처리 단계에서의 게르마늄의 실리콘 기판 내 확산의 가능성을 고려하여 결정된다.In the present invention, the germanium ion implantation energy and the ion implantation dose may be determined in consideration of the thickness and concentration of the desired silicon germanium single crystal, and is determined in consideration of the possibility of diffusion of germanium into the silicon substrate in the high temperature treatment step. .
이하 도면을 참조하면서 실시예를 통해 본 발명을 보다 상세히 설명하기로 한다. Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.
도1 내지 도4는 본 발명의 일 실시예에 따른 실리콘 게르마늄 단결정층 형성 방법의 주요 단계를 나타내는 공정 단면도들이다.1 through 4 are cross-sectional views illustrating main steps of a method of forming a silicon germanium single crystal layer according to an embodiment of the present invention.
도1을 참조하면, 실리콘 단결정 기판(10)을 준비한다. 실리콘 단결정 기판(10)은 용융된 상태의 실리콘을 시드 중심으로 성장, 냉각시켜 원기둥 형태의 잉곳을 형성하거나, 실리콘 막대 주위를 고온 히터가 서서히 지나가도록 함으로서 결정화하는 작업을 통해 형성하고, 이를 슬라이싱하고 폴리싱하여 형성하게 된다. Referring to FIG. 1, a silicon
이런 기판 표면은 자연 산화막이 형성된 상태이므로 작업 전에 자연산화막을 묽은 불산 용액으로 클리닝 처리하여 제거한다. Since the surface of such a substrate is formed with a natural oxide film, the natural oxide film is cleaned and removed with a dilute hydrofluoric acid solution before operation.
도2를 참조하면 기판 자체에 이온 주입을 하기 전에 표면에 이온 주입 공정에서 버퍼막(20)으로 사용될 실리콘 산화막을 형성한다. 실리콘 산화막은 대개 건식 고온 확산 공정을 통해 형성하게 되며, 그 두께는 300 옹스트롬 정도로 얇게 형성하도록 한다.Referring to FIG. 2, a silicon oxide film to be used as the
그리고, 버퍼막(20)이 형성된 기판(10)에는 이온 주입 장비를 이용하여 게르마늄 이온을 주입시킨다. 가령, 게르마늄을 16 내지 20KeV의 비교적 저에너지로 도즈량 1016 내지 1017 정도로 하여 이온 주입할 수 있다. 주입 에너지나 도즈량은 원 하는 실리콘 게르마늄 단결정의 성분비와 두께를 고려하여 이루어지지만 열확산을 고려하여 원하는 두께보다 얕은 깊이로 이온 주입이 되도록 한다. Then, germanium ions are implanted into the
이러한 이온주입은 이온주입 장비를 통해 주입 에너지에 의해 주입 깊이를 조절하는 것이 정확하고 용이하다. 또한 페러데이 컵 등의 장치를 이용하여 도즈량의 조절도 용이하게 이루어질 수 있다. 따라서 이 단계에서 게르마늄은 단순히 실리콘 속에 투입된 채 실리콘과 함께 결정화된 구조를 가지지는 않지만 층 내에서의 게르마늄 농도나 게르마늄 투입층의 두께는 화학기상증착에 이한 경우보다 정밀하게 조절이 될 수 있다. This ion implantation is accurate and easy to control the implant depth by the implantation energy through the ion implantation equipment. In addition, it is possible to easily adjust the dose using a device such as a Faraday cup. Therefore, germanium at this stage does not have a crystallized structure with the silicon simply put into the silicon, but the germanium concentration in the layer or the thickness of the germanium input layer can be more precisely controlled than in the case of chemical vapor deposition.
도3을 참조하면, 도2와 같은 이온 주입이 이루어진 뒤 급속 열처리 장비(RTA:rapid thermal annealing)로 1050도씨 내지 1090도씨로 열처리한다. 열처리를 통해 실리콘 기판(10) 가운데 상부의 게르마늄 이온이 주입된 층에서는 재결정화가 이루어지면서 실리콘과 게르마늄 원자가 서로 결합된 결정 구조가 이루어진다. Referring to FIG. 3, after the ion implantation as shown in FIG. 2 is performed, heat treatment is performed at 1050 ° C. to 1090 ° C. with rapid thermal annealing (RTA). In the layer in which germanium ions are implanted in the upper portion of the
이때 기판(10) 표면의 버퍼막(20)은 여전히 존재하는 상태이며, 버퍼막(20) 아래에서 재결정화에 의한 실리콘 게르마늄 결정층(30)이 형성된다.At this time, the
도4를 참조하면, 기판 표면에 실리콘 게르마늄 결정층(30)이 형성된 상태에서 버퍼막(20)을 제거한다. 버퍼막은 통상 실리콘 산화막으로 이루어지므로 묽은 불산 용액을 통해 쉽게 제거할 수 있다. 이로써 화학기상증착에 의한 에피텍시 결정 성장을 대신하는 이온주입과 열처리에 의한 실리콘 게르마늄 결정층(30)을 가진 기판(10)이 얻어진다. Referring to FIG. 4, the
본 발명에 따르면, 종래의 실리콘 게르마늄 단결정 성장의 어려움과 단결정 내에서의 게르마늄 농도 조절의 어려움을 해결할 수 있는 실리콘 게르마늄 단결정층을 이온주입과 열처리에 의한 재결정화 작업에 이해 비교적 용이하게 얻을 수 있다. According to the present invention, the silicon germanium single crystal layer which can solve the difficulty of conventional silicon germanium single crystal growth and the difficulty of controlling the germanium concentration in the single crystal can be obtained relatively easily in the recrystallization operation by ion implantation and heat treatment.
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