KR100731819B1 - Manufacturing process of multiple flexible printed circuit board - Google Patents

Manufacturing process of multiple flexible printed circuit board Download PDF

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Publication number
KR100731819B1
KR100731819B1 KR1020060017146A KR20060017146A KR100731819B1 KR 100731819 B1 KR100731819 B1 KR 100731819B1 KR 1020060017146 A KR1020060017146 A KR 1020060017146A KR 20060017146 A KR20060017146 A KR 20060017146A KR 100731819 B1 KR100731819 B1 KR 100731819B1
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South Korea
Prior art keywords
copper
hole
clad laminate
plating
dry film
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KR1020060017146A
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Korean (ko)
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양호민
고상준
이봉준
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(주)인터플렉스
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/422Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A method for manufacturing a multiple flexible printed circuit board is provided to form a micro circuit by selectively performing copper-plating on a penetration hole or a via-hole formed on an inner layer and an outer layer. A method for manufacturing a multiple flexible printed circuit board includes the steps of: processing a penetration hole or a via-hole on a copper clad laminate plate having a copper layer stacked on a base film(S10); forming a plating layer to apply conductivity to the copper clad laminate plate passed through the hole processing step, and performing copper-plating on the copper clad laminate plate(S11); attaching a dry film for preventing the plating layer, which is plated on the penetration hole or the via-hole, from being etched by laminating the dry film on the copper clad laminate plate(S12); half-etching a part except the penetration hole or the via-hole of the copper clad laminate plate having the dry film(S13); exfoliating the dry film after the half-etching process(S14); forming circuit patterns on both planes of the copper clad laminate plate(S15); laminating outer copper clad laminate plates on both planes of the copper clad laminate plate having the circuit pattern(S16); processing a second via-hole on the outer copper clad laminate plate or a second penetration hole which penetrates the outer copper clad laminate plate and the copper clad laminate plate; forming the plating layer to apply the conductivity to the outer copper clad laminate plate after the hole processing step, and performing copper-plating on the outer copper clad laminate plate(S17); attaching the dry film for preventing the plating layer plated on the second penetration hole or the second via-hole, from being etched by laminating the dry film on the outer copper clad laminate plate; and selectively half-etching a part except the second penetration hole or the second via-hole.

Description

다층 연성인쇄회로기판의 제조방법{Manufacturing process of multiple flexible printed circuit board}Manufacturing process of multiple flexible printed circuit boards

도 1은 종래 일반적인 다층 FPCB의 제조 공정을 나타낸 흐름도, 1 is a flowchart illustrating a manufacturing process of a conventional general multilayer FPCB;

도 2a는 적층된 FPCB에 관통홀이 형성된 상태를 나타낸 도면, 2A is a view showing a state in which a through hole is formed in a stacked FPCB;

도 2b는 도 2a에 도시된 FPCB에 무전해 도금이 실시된 상태를 나타낸 도면, 2B is a view showing a state in which electroless plating is performed on the FPCB shown in FIG. 2A;

도 2c는 도 2b에 도시된 FPCB에 전해 동도금이 실시된 상태를 나타낸 도면,2C is a view showing a state in which electrolytic copper plating is performed on the FPCB shown in FIG. 2B;

도 3은 종래 일반적인 제조방법에 의해 제작된 FPCB의 일 예를 나타낸 도면,3 is a view showing an example of an FPCB manufactured by a conventional general manufacturing method,

도 4는 본 발명의 일 실시예에 따른 다층 연성 인쇄회로기판의 제조방법을 나타낸 흐름도, 4 is a flowchart illustrating a method of manufacturing a multilayer flexible printed circuit board according to an embodiment of the present invention;

도 5a는 도 4에 나타낸 다층 FPCB의 제조방법시 내층 무전해도금 공정을 나타낸 도면, 5A is a view showing an inner layer electroless plating process in the method of manufacturing the multilayer FPCB shown in FIG. 4;

도 5b는 도 5a에 도시된 무전해도금 공정 후 드라이필름을 부착하는 공정을 나타낸 도면, 5B is a view showing a process of attaching a dry film after the electroless plating process illustrated in FIG. 5A;

도 5c는 도 5b에 도시된 드라이필름 부착 후 내층동도금 공정을 나타낸 도면, Figure 5c is a view showing the inner layer copper plating process after the dry film shown in Figure 5b,

도 5d는 도 5c에 도시된 내층 동도금 공정 후 드라이필름이 박리된 상태를 나타낸 도면,Figure 5d is a view showing a state in which the dry film peeled off after the inner layer copper plating process shown in Figure 5c,

도 6은 본 발명의 다른 실시예에 따른 다층 FPCB의 제조방법을 나타낸 흐름도, 6 is a flowchart illustrating a method of manufacturing a multilayer FPCB according to another embodiment of the present invention;

도 7a는 도 6에 나타낸 다층 FPCB의 제조방법시 내층 도금 공정을 나타낸 도면, 7A is a view showing an inner layer plating process in the method of manufacturing the multilayer FPCB shown in FIG. 6;

도 7b는 도 7a에 도시된 도금 공정 후 드라이필름을 부착하는 공정을 나타낸 도면, Figure 7b is a view showing a process of attaching a dry film after the plating process shown in Figure 7a,

도 7c는 도 7b에 도시된 드라이필름 부착 후 내층동도금 공정을 나타낸 도면, Figure 7c is a view showing the inner layer copper plating process after the dry film shown in Figure 7b,

도 7d는 도 7c에 도시된 내층 동도금 공정 후 드라이필름이 박리된 상태를 나타낸 도면,Figure 7d is a view showing a state in which the dry film peeled off after the inner layer copper plating process shown in Figure 7c,

도 8은 본 발명에 의해 제조된 다층 FPCB의 단면을 개략적으로 나타낸 도면이다.8 is a schematic cross-sectional view of a multilayer FPCB fabricated by the present invention.

본 발명은 다층 연성 인쇄회로기판의 제조방법에 관한 것으로, 보다 상세하게는 동도금으로 인한 굴곡부가 두꺼워지는 것을 방지하고, 본래의 동박이 갖는 연신력을 유지시켜 크랙(crack)이 발생하는 것을 방지하고, 굴곡성을 향상시킬 수 있 는 다층 연성 인쇄회로기판의 제조방법에 관한 것이다. The present invention relates to a method for manufacturing a multilayer flexible printed circuit board, and more particularly, to prevent the thickening of the bent portion due to copper plating, and to maintain the stretching force of the original copper foil to prevent cracks from occurring. In addition, the present invention relates to a method for manufacturing a multilayer flexible printed circuit board capable of improving flexibility.

일반적으로, 인쇄회로기판(printed circuit board; PCB)이란 전기 절연성 기판성 기판에 동박과 같은 전도성 재료로 회로를 형성시킨 것으로 전자부품을 탑재하기 직전의 기판을 말한다.In general, a printed circuit board (PCB) is a circuit formed of a conductive material such as copper foil on an electrically insulating substrate substrate, and refers to a substrate immediately before mounting an electronic component.

최근, 전자 부품과 부품내장 기술의 발달 및 전자제품의 경박단소화로 인하여, 다층 연성 인쇄회로기판(flexible printed circuit board; 이하 'FPCB'라 한다)의 수요는 지속적으로 성장하고 있고, 또한 반도체 집적회로에 있어서 집적도의 급속한 발전으로 소형 칩과 부품을 탑재하는 표면실장 기술의 발전에 따라 보다 복잡하고 협소한 공간에서도 내장이 용이한 다층 FPCB의 수요는 계속 증대하고 있다.In recent years, due to the development of electronic components and component embedding technology and the miniaturization of electronic products, the demand for flexible printed circuit boards (hereinafter referred to as 'FPCB') has been continuously growing, and also semiconductor integration The rapid development of integration in circuits has led to the development of surface mount technology for mounting small chips and components, and the demand for multilayer FPCBs that can be easily embedded in more complex and narrow spaces continues to increase.

특히, 회로의 밀집도를 높이기에 용이하고 사용도가 높은 다층구조의 FPCB의 경우, 카메라, 휴대폰, 액정표시장치 등의 기술발전과 더불어 그 사용량이 증가하면서 그 제조기술에 대한 기술 개발의 필요성이 대두되고 있는 실정이다.In particular, in the case of a multi-layered FPCB which is easy to increase the density of circuits and has a high level of use, there is a need for technology development for the manufacturing technology as the usage increases with the development of cameras, mobile phones, liquid crystal displays, etc. It's happening.

도 1은 종래 일반적인 다층 FPCB의 제조 공정을 나타낸 흐름도이고, 도 2a는 적층된 FPCB에 관통홀이 형성된 상태를 나타낸 도면이고, 도 2b는 도 2a에 도시된 FPCB에 무전해 도금이 실시된 상태를 나타낸 도면이고, 도 2c는 도 2b에 도시된 FPCB에 전해 동도금이 실시된 상태를 나타낸 도면이다. 1 is a flow chart illustrating a conventional manufacturing process of a conventional multi-layer FPCB, Figure 2a is a view showing a through hole formed in the laminated FPCB, Figure 2b is a state in which the electroless plating is performed on the FPCB shown in Figure 2a 2C is a view showing a state in which electrolytic copper plating is performed on the FPCB shown in FIG. 2B.

먼저, 도 1을 참조하면, 폴리이미드(polyimide)와 같은 재질로 이루어진 베이스필름 양면에 동박을 적층한 연성 동박적층판을 준비하고 기준홀을 가공한다(S1).First, referring to FIG. 1, a flexible copper foil laminate in which copper foil is laminated on both sides of a base film made of a material such as polyimide is prepared and a reference hole is processed (S1).

기준홀 가공은 연성 동박적층판에 NC 드릴공정이나 프레스 공정을 통하여 작 업용 기준홀을 가공하는 것이다. Standard hole processing is to process working standard hole in flexible copper clad laminate through NC drill process or press process.

한편, 기준홀 가공을 마친 연성 동박적층판에 접착시트를 고온, 고압하에서 적층한다. On the other hand, an adhesive sheet is laminated | stacked under high temperature and high pressure on the flexible copper foil laminated board which finished the reference hole process.

다음으로, 적층된 연성 동박적층판에 드라이필름 라미네이팅하고, 노광, 현상, 에칭 공정을 통하여 내층에 회로를 형성시킨다(S2).Next, dry film lamination is performed on the laminated flexible copper foil laminate, and a circuit is formed in the inner layer through an exposure, development, and etching process (S2).

다음으로, 내층 회로를 형성한 후에 동박적층판을 준비하고, 접착시트를 사용하여 적층시킨다(S3).Next, after forming an inner layer circuit, a copper clad laminated board is prepared and laminated using an adhesive sheet (S3).

한편, 적층시에 완제품의 굴곡부에 해당하는 부분에 있어서는 접착제를 제거시켜 에어갭(air gap)이 형성되게 한다.On the other hand, in the portion corresponding to the bent portion of the finished product at the time of lamination to remove the adhesive to form an air gap (air gap).

다음으로, 도 2a를 참조하면, 회로상에 필요한 부분에 있어서 관통홀(3)을 형성한다(S4).Next, referring to FIG. 2A, a through hole 3 is formed in a required portion on the circuit (S4).

이때, 내부 회로의 동박(1)과 외부 동박(2)간에는 아직 전기적으로 도통되어 있지 않다. 한편, 도면의 간략화를 위하여 기판 내부의 절연층들은 표시하지 않았으며, 또한 굴곡부도 생략하였다.At this time, the electrical foil is not yet electrically conducted between the copper foil 1 and the outer copper foil 2 of the internal circuit. On the other hand, for the sake of simplicity, the insulating layers inside the substrate are not shown, and the curved portion is omitted.

다음으로, 도 2b를 참조하면, 관통홀(3) 내부에 통전성을 부여하기 위하여 무전해 도금을 실시한다(S5).Next, referring to FIG. 2B, electroless plating is performed to impart electrical conductivity to the inside of the through hole 3 (S5).

관통홀(3) 내부의 도금 신뢰성을 확보하기 위하여 디스미어처리를 하고, 무전해 도금을 실시하여 관통홀(3) 내부에 도전층(4)을 형성하여 도전성을 부여한다.In order to secure the plating reliability inside the through hole 3, a desmear treatment is performed, and electroless plating is performed to form a conductive layer 4 inside the through hole 3 to impart conductivity.

다음으로, 도 2c를 참조하면, 무전해 도금을 실시한 후에 기판의 외부 동박(2) 및 관통홀(3) 내부에 동도금층(5)이 형성되도록 전해 동도금을 실시한다(S6).Next, referring to FIG. 2C, after electroless plating is performed, electrolytic copper plating is performed such that the copper plating layer 5 is formed inside the outer copper foil 2 and the through hole 3 of the substrate (S6).

마지막으로, 외층의 회로를 형성하고, 각종 사양에 맞추어 표면 처리(솔더링 또는 금도금 등)를 시행하거나 외곽가공을 시행하는 등의 후처리공정을 통해 FPCB를 완성하게 된다(S7).Finally, the circuit of the outer layer is formed, and the FPCB is completed through a post-treatment process such as surface treatment (soldering or gold plating, etc.) or outer processing according to various specifications (S7).

도 3은 종래 일반적인 제조방법에 의해 제작된 FPCB의 일 예를 나타낸 도면이다.3 is a view showing an example of an FPCB manufactured by a conventional general manufacturing method.

도면은 참조하면, 굴곡부(가)에 있어서 내층 및 외층에 동도금층(9)이 형성됨을 알 수 있다.Referring to the drawings, it can be seen that the copper plating layer 9 is formed in the inner layer and the outer layer in the bent portion (a).

구체적으로, 굴곡부(가)의 내층에 형성된 "A"부분과 외층에 형성된 "B"부분에 각각 동도금층(9)이 형성되는데, 동도금층(9)으로 두꺼워진 굴곡부(가)는 굴곡성이 떨어지며 동도금으로 두꺼워진 층(9)은 회로 형성 시 미세회로 형성이 곤란하게 되는 문제점이 발생하게 된다.Specifically, the copper plating layer 9 is formed on the “A” portion formed in the inner layer of the bent portion and the “B” portion formed on the outer layer, respectively, and the curved portion thickened by the copper plating layer 9 is inferior in flexibility. The layer 9 thickened with copper plating has a problem in that it is difficult to form a fine circuit when forming a circuit.

한편, 도면에 미설명된 부호는 커버레이(6)와, 접착시트(7)와, 베이스필름인 폴리이미드(5)와, PSR(8)과, 비아홀(9)을 나타내고 있다.Incidentally, reference numerals not described in the drawings indicate a coverlay 6, an adhesive sheet 7, a polyimide 5 as a base film, a PSR 8, and a via hole 9.

그리고, 관통홀은 내층관통홀(3)과 외층관통홀(3')로 구분되어질 수 있다.The through hole may be divided into an inner layer through hole 3 and an outer layer through hole 3 ′.

본 발명은 상기의 문제점을 해결하기 위하여 창출된 것으로서, 동박이 갖는 굴곡특성을 유지시킬 수 있어 크랙이 발생하는 것을 방지할 수 있고, 미세회로 형성이 가능한 다층 연성 인쇄회로기판의 제조방법을 제공하고자 하는 것이다.The present invention has been made to solve the above problems, it is possible to maintain the bending characteristics of the copper foil to prevent the occurrence of cracks, to provide a method for manufacturing a multilayer flexible printed circuit board capable of forming a fine circuit. It is.

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개시된 다층 연성 인쇄회로기판의 제조방법은, 베이스필름에 동박층이 적층된 동박적층판에 관통홀 또는 비아홀을 가공하는 홀가공단계; 상기 홀가공단계를 거친 동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금단계; 동박적층판에 드라이필름을 라미네이트시켜 관통홀 또는 비아홀을 제외한 부분이 동도금되는 것을 방지하는 드라이필름부착단계; 드라이필름이 부착된 동박적층판의 관통홀 또는 비아홀을 선택적으로 동도금시키는 내층동도금단계; 상기 내층동도금단계를 거친 후 드라이필름을 박리하는 드라이필름박리단계; 및 동박적층판의 양면에 회로패턴을 형성시키는 회로형성단계를 포함한다.The disclosed method of manufacturing a multilayer flexible printed circuit board includes a hole processing step of processing a through hole or a via hole in a copper foil laminate in which a copper foil layer is laminated on a base film; An electroless plating step of forming a plating layer to impart electrical conductivity to the copper foil laminated plate which has been subjected to the hole processing step; Dry film attachment step of laminating the dry film on the copper foil laminated plate to prevent the copper plated portion except the through-hole or via hole; An inner layer copper plating step of selectively copper plating through-holes or via-holes of the copper-clad laminate with a dry film attached thereto; A dry film peeling step of peeling the dry film after the inner layer copper plating step; And a circuit forming step of forming a circuit pattern on both surfaces of the copper-clad laminate.

여기서, 상기 회로형성단계를 거친 후에, 동박적층판의 상하면에 외층동박적층판을 적층시키고, 외층동박적층판과 동박적층판을 관통하는 제2관통홀 또는 외층동박적층판에 형성된 제2비아홀을 선택적으로 동도금시키는 외층도금단계를 포함하는 것이 바람직하다.Here, after the circuit forming step, the outer layer of the laminated copper clad laminate on the upper and lower surfaces of the copper clad laminate, and the outer layer for selectively copper plating the second through hole or the second via hole formed in the outer copper clad laminate through the outer copper clad laminate It is preferable to include a plating step.

또한, 상기 외층도금단계는, 제2관통홀 또는 제2비아홀이 형성되도록 가공하는 홀가공단계와, 홀가공단계를 거친 외층동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금단계와, 외층동박적층판에 드라이필름을 라미네이트시켜 제2관통홀 또는 제2비아홀을 제외한 부분이 동도금되는 것을 방지하는 드라이 필름부착단계와, 제2관통홀 또는 제2비아홀을 선택적으로 동도금시키는 외층동도금단계를 포함하는 것이 바람직하다.In addition, the outer layer plating step, the hole processing step of processing to form a second through hole or the second via hole, the electroless plating step of forming a plating layer to impart electrical conductivity to the outer layer copper laminate laminated through the hole processing step, Dry film attaching step that prevents copper plated parts except the second through hole or the second via hole by laminating the dry film on the outer layer copper laminate, and outer layer copper plating step to selectively copper plate the second through hole or the second via hole. It is desirable to.

본 발명의 다른 실시예에 따른 다층 연성 인쇄회로기판의 제조방법은, 베이스필름에 동박층이 적층된 동박적층판에 관통홀 또는 비아홀을 가공하는 홀가공단계; 상기 홀가공단계를 거친 동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금과, 무전해도금을 거친 동박적층판을 동도금시키는 전해도금을 포함하는 도금단계; 동박적층판에 드라이필름을 라미네이트시켜 관통홀 또는 비아홀에 도금된 도금층이 에칭되는 것을 방지하는 드라이필름부착단계; 드라이필름이 부착된 동박적층판의 관통홀 또는 비아홀을 제외한 부분을 하프에칭시키는 하프에칭단계; 상기 하프에칭단계를 거친 후 드라이필름을 박리하는 드라이필름박리단계; 및According to another aspect of the present invention, there is provided a method of manufacturing a multilayer flexible printed circuit board, including: a hole processing step of processing through holes or via holes in a copper foil laminate in which a copper foil layer is laminated on a base film; A plating step including an electroless plating for forming a plating layer and an electroplating for copper plating the copper foil laminated plate that has undergone electroless plating to impart electrical conductivity to the copper foil laminated plate that has undergone the hole processing step; A dry film attaching step of laminating a dry film on the copper-clad laminate to prevent etching of the plated layer plated in the through hole or the via hole; A half etching step of half-etching portions except through-holes or via holes of the copper-clad laminate to which the dry film is attached; A dry film peeling step of peeling the dry film after the half etching step; And

동박적층판의 양면에 회로패턴을 형성시키는 회로형성단계를 포함한다.And forming a circuit pattern on both sides of the copper-clad laminate.

여기서, 상기 회로형성단계를 거친 후에, 동박적층판의 상하면에 외층동박적층판을 적층시키고, 외층동박적층판과 동박적층판을 관통하는 제2관통홀 또는 외층동박적층판에 형성된 제2비아홀을 제외한 부분을 선택적으로 하프에칭시키는 외층하프에칭단계를 포함하는 것이 바람직하다.In this case, after the circuit forming step, the outer copper clad laminate is laminated on the upper and lower surfaces of the copper clad laminate, and a portion except for the second through hole penetrating the outer copper clad laminate and the copper foil laminated plate or the second via hole formed in the outer copper clad laminate is selectively selected. It is preferable to include an outer layer half etching step of half etching.

또한, 상기 외층하프에칭단계는, 제2관통홀 또는 제2비아홀이 형성되도록 가공하는 홀가공단계와, 홀가공단계를 거친 외층동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금단계와 무전해도금을 거친 동박적층판을 동도금시키는 전해도금을 포함하는 외층도금단계와, 외층동박적층판에 드라이필름을 라미 네이트시켜 제2관통홀 또는 제2비아홀에 도금된 도금층이 에칭되는 것을 방지하는 드라이필름부착단계를 포함하는 것이 바람직하다. In addition, the outer layer half etching step may include a hole processing step of processing a second through hole or a second via hole, and an electroless plating step of forming a plating layer to impart electrical conductivity to the outer copper clad laminate that has undergone the hole processing step; An outer layer plating step including an electroplating process for copper plating a copper foil laminated plate that has undergone electroless plating, and a dry film which laminates a dry film on the outer copper laminate plate to prevent the plating layer plated on the second through hole or the second via hole from being etched. It is preferable to include an attachment step.

본 명세서 및 청구범위에 사용된 용어나 단어는 통상적이거나 사전적인 의미로 한정해서 해석되어서는 아니되며, 발명자는 그 자신의 발명을 가장 최선의 방법으로 설명하기 위해 용어의 개념을 적절하게 정의할 수 있다는 원칙에 입각하여 본 발명의 기술적 사상에 부합하는 의미와 개념으로 해석되어야만 한다.The terms or words used in this specification and claims are not to be construed as being limited to their ordinary or dictionary meanings, and the inventors may appropriately define the concept of terms in order to best describe their invention. It should be interpreted as meaning and concept corresponding to the technical idea of the present invention based on the principle that the present invention.

따라서, 본 명세서에 기재된 실시예와 도면에 도시된 구성은 본 발명의 가장 바람직한 일 실시예에 불과할 뿐이고 본 발명의 기술적 사상을 모두 대변하는 것은 아니므로, 본 출원시점에 있어서 이들을 대체할 수 있는 다양한 균등물과 변형예들이 있을 수 있음을 이해하여야 한다.Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiment of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

도 4는 본 발명의 일 실시예에 따른 다층 연성 인쇄회로기판(flexible printed circuit board; 이하 'FPCB'라 한다)의 제조방법을 나타낸 흐름도이고, 도 5a는 도 4에 나타낸 다층 FPCB의 제조방법시 내층 무전해도금 공정을 나타낸 도면이고, 도 5b는 도 5a에 도시된 무전해도금 공정 후 드라이필름을 부착하는 공정을 나타낸 도면이고, 도 5c는 도 5b에 도시된 드라이필름 부착 후 내층동도금 공정을 나타낸 도면이고, 도 5d는 도 5c에 도시된 내층 동도금 공정 후 드라이필름이 박리된 상태를 나타낸 도면이고, 도 8은 본 발명에 의해 제조된 다층 FPCB의 단면을 개략적으로 나타낸 도면이다.4 is a flowchart illustrating a method of manufacturing a flexible printed circuit board (FPCB) hereinafter according to an embodiment of the present invention, and FIG. 5A is a method of manufacturing the multilayer FPCB illustrated in FIG. 4. 5 is a diagram illustrating a process of attaching a dry film after the electroless plating process illustrated in FIG. 5A, and FIG. 5C is a diagram of an inner layer copper plating process after attaching a dry film illustrated in FIG. 5B. 5D is a view showing a state in which the dry film is peeled off after the inner layer copper plating process shown in FIG. 5C, and FIG. 8 is a view schematically showing a cross section of the multilayer FPCB manufactured by the present invention.

먼저, 도 4를 참조하면, 본 발명의 일 실시예에 따른 다층 FPCB의 제조방법은, 베이스필름(12)에 동박층(11)이 적층된 동박적층판(10)에 관통홀(30) 또는 비 아홀(40)을 가공한다(S10).(도 5a 참조)First, referring to FIG. 4, in the method of manufacturing a multilayer FPCB according to an embodiment of the present invention, the through hole 30 or the non-coating layer is formed on the copper foil laminated plate 10 in which the copper foil layer 11 is laminated on the base film 12. The ahole 40 is processed (S10). (See FIG. 5A).

이때, 상기 베이스필름의 일 예로써는 폴리이미드가 사용되는 것이 일반적이나, 반드시 이에 한정되는 것은 아니다.In this case, as an example of the base film, polyimide is generally used, but is not necessarily limited thereto.

다음으로, 도 5a를 참조하면, 동박적층판(10)에 통전성이 부여될 수 있도록 무전해 도금을 실시한다(S11).Next, referring to FIG. 5A, electroless plating is performed to impart electrical conductivity to the copper-clad laminate 10 (S11).

무전해 도금 공정 후 동박정층판(10)에는 약 1 내지 2㎛의 무전해도금층(20)이 형성되게 된다.After the electroless plating process, the electroless plating layer 20 having a thickness of about 1 to 2 μm is formed on the copper foil crystal layer plate 10.

다음으로, 도 5b를 참조하면, 동박적층판(10)에 드라이필름(50)을 라미네이트시켜 관통홀(30) 또는 비아홀(40)을 제외한 부분이 동도금되는 것을 방지한다(S12).Next, referring to FIG. 5B, the dry film 50 is laminated on the copper-clad laminate 10 to prevent copper plating from portions other than the through hole 30 or the via hole 40 (S12).

상기 드라이필름(50)은 동박적층판(10)에 형성된 관통홀(30) 또는 비아홀(40)을 제외한 나머지 동박적층판(10)을 커버시킨다. The dry film 50 covers the remaining copper foil laminated plate 10 except for the through hole 30 or the via hole 40 formed in the copper foil laminated plate 10.

구체적으로, 후술할 내층 동도금에 의해 선택적으로 관통홀(30) 또는 비아홀(40)과 그 주변부만이 동도금되도록 드라이필름(50)의 형상을 가공하여 동박적층판(10)에 라미네이트시킨다.Specifically, the shape of the dry film 50 is selectively processed by the inner layer copper plating, which will be described later, so that only the through hole 30 or the via hole 40 and its periphery are copper plated, and laminated on the copper foil laminated plate 10.

다음으로, 도 5c를 참조하면, 동박적층판(10)에 형성된 관통홀(30) 또는 비아홀(40)을 선택적으로 동도금시킨다(S13).Next, referring to FIG. 5C, the through hole 30 or the via hole 40 formed in the copper clad laminate 10 is selectively copper plated (S13).

관통홀(30) 또는 비아홀(40)을 선택적으로 동도금시키면 후술할 굴곡부(가)에 있어서 동박층(11) 상에 동도금이 되는 것을 방지할 수 있어 굴곡특성을 유지할 수 있으며, 또한 회로 형성 시 미세회로 형성이 가능할 수 있다(도 8참조).Selective copper plating of the through hole 30 or the via hole 40 can prevent copper plating on the copper foil layer 11 in the bent portion (a), which will be described later, so that bending characteristics can be maintained. Circuit formation may be possible (see FIG. 8).

다음으로, 도 5d를 참조하면, 내층동도금단계를 거친 후 드라이필름(50)을 박리하고, 동박적층판(10)의 양면에 회로패턴을 형성시킨다(S14,S15). Next, referring to FIG. 5D, after the inner layer copper plating step is performed, the dry film 50 is peeled off, and circuit patterns are formed on both surfaces of the copper clad laminate 10 (S14 and S15).

내층동도금을 거친 후에 동박적층판(10)의 양면에 회로패턴을 형성시키면 무전해도금층(20, 도 5a 참조)의 제거가 용이하게 된다.If the circuit pattern is formed on both sides of the copper-clad laminate 10 after the inner copper plating, the electroless plating layer 20 (refer to FIG. 5A) may be easily removed.

만약, 내층에 회로를 형성한 후에 내층동도금을 실시하면 회로패턴 사이에 잔존하는 무전해도금층(20)이 완전하게 제거되지 않아 쇼트(short)가 발생할 확률이 높아지게 된다.If the inner layer copper plating is performed after the circuit is formed on the inner layer, the electroless plating layer 20 remaining between the circuit patterns is not completely removed, thereby increasing the probability of a short.

다음으로, 내층동박적층판(10)의 양면에 외층동박적층판(11')을 적층시킨다(S16).Next, the outer layer copper laminated sheet 11 'is laminated on both surfaces of the inner layer copper laminated sheet 10 (S16).

도 8을 참조하면, 본 발명의 일 예로써의 다층 FPCB는 8층으로 구성되며, 이하 도면상의 상부로부터 1층으로 명명하기로 한다.Referring to FIG. 8, the multilayer FPCB as an example of the present invention is composed of eight layers, which will be referred to as one layer from the top of the drawings.

먼저, 4층 및 5층을 구성하는 동박적층판(10)의 양면에 2층 및 3층과 6층 및 7층을 구성하는 동박적층판(10a,10b)을 적층시킨다.First, copper foil laminated boards 10a and 10b constituting two and three layers and six and seven layers are laminated on both surfaces of the copper foil laminated board 10 constituting four and five layers.

이때, 3층과 4층을 구성하는 동박층(11a,11) 사이와 5층과 6층을 구성하는 동박층(11,11b) 사이에는 각각 커버레이(70)와 접착시트(80)가 개재되게 된다.At this time, the coverlay 70 and the adhesive sheet 80 are interposed between the copper foil layers 11a and 11 constituting the three and four layers and the copper foil layers 11 and 11b constituting the five and six layers, respectively. Will be.

그리고, 2층 내지 7층을 구성하는 내층동박적층판(10a,10b)의 양면에 외층동박적층판(11')을 적층시킨다.And the outer layer copper laminated board 11 'is laminated | stacked on both surfaces of the inner layer copper laminated boards 10a and 10b which comprise 2 to 7 layers.

이때, 1층과 2층을 구성하는 동박층(11',11a)사이에는 접착시트(80)와 커버레이(70)가 개재되어 있으며, 7층과 8층을 구성하는 동박층(11b,11')사이에는 접착시트(80)와 베이스필름인 폴리이미드(12)와 커버레이(70)가 개재되어 있다.At this time, the adhesive sheet 80 and the coverlay 70 are interposed between the copper foil layers 11 'and 11a constituting the first and second layers, and the copper foil layers 11b and 11 constituting the seventh and eighth layers. Between '), the adhesive sheet 80 and the base film polyimide 12 and the coverlay 70 are interposed.

마지막으로, 도 8을 참조하면, 외층동박적층판(11')과 내층동박적층판(10,10a,10b)을 관통하는 제2관통홀(30') 또는 외층동박적층판(11')에 형성된 제2비아홀(40')을 선택적으로 동도금시키는 외층도금을 실시한다(S17).Finally, referring to FIG. 8, a second through hole 30 ′ or an outer copper clad laminate 11 ′ penetrating through the outer copper clad laminate 11 ′ and the inner copper clad laminates 10, 10 a, and 10 b is formed. Outer layer plating for selectively copper plating the via holes 40 'is performed (S17).

한편, 제2관통홀(30') 또는 제2비아홀(40')이 형성되도록 가공하는 홀가공단계와 홀가공단계를 거친 외층동박적층판(11')에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금단계와 외층동박적층판에 드라이필름을 라미네이트시켜 제2관통홀(30') 또는 제2비아홀(40')을 제외한 부분이 동도금되는 것을 방지하는 드라이필름부착단계와 제2관통홀(30') 또는 제2비아홀(40')을 선택적으로 동도금시키는 외층동도금단계를 포함한다.On the other hand, the radioless to form a plating layer in order to impart electrical conductivity to the outer layer copper-clad laminate (11 ') through the hole processing step and hole processing step to form the second through hole (30') or the second via hole (40 ') is formed. Dry film attaching step and second through hole 30 'to prevent copper plating of parts except second through hole 30' or second via hole 40 'by laminating dry film on plating layer and outer copper clad laminate. ) Or an outer layer copper plating step of selectively copper plating the second via hole 40 '.

그리고, 상기와 같은 외층도금단계는 내층의 홀가공단계 내지 내층동도금 단계를 동일하게 반복하여 실시할 수 있다.In addition, the outer layer plating step as described above may be carried out by repeating the hole processing step to the inner layer copper plating step of the inner layer in the same manner.

이하, 본 발명의 다른 실시예에 따른 다층 FPCB의 제조방법을 살펴보도록 한다.Hereinafter, a method of manufacturing a multilayer FPCB according to another embodiment of the present invention will be described.

도 6은 본 발명의 다른 실시예에 따른 다층 FPCB의 제조방법을 나타낸 흐름도이고, 도 7a는 도 6에 나타낸 다층 FPCB의 제조방법시 내층 도금 공정을 나타낸 도면이고, 도 7b는 도 7a에 도시된 도금 공정 후 드라이필름을 부착하는 공정을 나타낸 도면이고, 도 7c는 도 7b에 도시된 드라이필름 부착 후 내층동도금 공정을 나타낸 도면이고, 도 7d는 도 7c에 도시된 내층 동도금 공정 후 드라이필름이 박리된 상태를 나타낸 도면이다.6 is a flowchart illustrating a method of manufacturing a multilayer FPCB according to another embodiment of the present invention. FIG. 7A is a view illustrating an inner layer plating process in the method of manufacturing the multilayer FPCB shown in FIG. 6, and FIG. 7B is illustrated in FIG. 7A. Figure 7c is a view showing a process of attaching a dry film after the plating process, Figure 7c is a view showing the inner layer copper plating process after the dry film is shown in Figure 7b, Figure 7d is a dry film peeling after the inner layer copper plating process shown in Figure 7c It is a figure which shows the state.

도 6을 참조하면, 본 발명의 다른 실시예에 따른 다층 FPCB의 제조방법은 도 금공정(S21)과 하프에칭(S23)과 외층 하프에칭(S27)을 제외한 나머지 부분은 도 4에 나타낸 본 발명의 일 실시예에 따른 다층 FPCB의 제조방법과 동일한 관계로 생략하도록 한다.Referring to FIG. 6, in the method of manufacturing a multilayer FPCB according to another embodiment of the present invention, the remaining portions except for the plating process (S21), half etching (S23), and outer layer half etching (S27) are shown in FIG. 4. It will be omitted in the same relationship with the manufacturing method of the multilayer FPCB according to an embodiment of.

먼저, 도 7a를 참조하면, 도금단계는 홀가공단계를 거친 동박적층판(10)에 통전성을 부여하기 위하여 도금층(20)을 형성하는 무전해도금과 무전해도금을 거친 동박적층판(10)을 동도금층(60)을 형성하는 전해도금을 포함한다(S21).First, referring to FIG. 7A, in the plating step, the electroless plating forming the plating layer 20 and the copper foil laminated plate 10 which has undergone electroless plating are applied to the copper foil laminated plate 10 which has undergone the hole processing step. Electroplating to form the plating layer 60 is included (S21).

다음으로, 도 7b 및 도 7c를 참조하면, 동박적층판(10)에 형성된 관통홀(30) 또는 비아홀(미도시)과 그 주변부를 드라이필름(50)을 사용하여 도포한 후에 하프 에칭시킨다(S23).Next, referring to FIGS. 7B and 7C, the through hole 30 or the via hole (not shown) formed in the copper-clad laminate 10 and the peripheral portion thereof are coated using the dry film 50 and then half etched (S23). ).

하프 에칭을 실시하여 동박층(11)위에 형성되는 동도금층(60)의 두께를 줄일 수 있기 때문에 굴곡부((가), 도 8참조)의 굴곡특성을 유지시킬 수 있으며, 미세 회로형성이 가능할 수 있게 된다.Since the thickness of the copper plating layer 60 formed on the copper foil layer 11 can be reduced by performing half etching, the bending characteristics of the bent portion (see FIG. 8) can be maintained and fine circuit formation can be possible. Will be.

구체적으로, 하프 에칭은 동박층(11)에 도금된 동도금층(60)의 두께를 부식시키는 것으로서, 동박층(11)에 형성된 동도금층(60)의 두께를 얇게 할수록 미세회로 형성이 용이할 수 있다. Specifically, the half etching corrodes the thickness of the copper plating layer 60 plated on the copper foil layer 11, and the thinner the thickness of the copper plating layer 60 formed on the copper foil layer 11, the easier the formation of the microcircuit. have.

다음으로, 동박적층판(10)에 형성된 동도금층(60)의 두께를 하프 에칭을 통해 줄인 후에, 드라이필름을 제거하고 내층의 회로를 형성시킨다.Next, after reducing the thickness of the copper plating layer 60 formed on the copper-clad laminate 10 through half etching, the dry film is removed and an inner layer circuit is formed.

그리고, 동박적층판(10,10a,10b))의 상하면에 외층동박적층판(11')을 적층시키고, 외층동박적층판(11')과 동박적층판(10,10a,10b)을 관통하는 제2관통홀(30') 또는 외층동박적층판(11')에 형성된 제2비아홀(40')을 제외한 부분을 선택적으로 하프에칭시키는 외층하프에칭을 실시한다.Then, a second through hole penetrates the outer copper clad laminate 11 'and the copper clad laminate 10, 10a and 10b by laminating the outer copper clad laminate 11' on the upper and lower surfaces of the copper clad laminates 10, 10a and 10b. The outer layer half etching is performed by selectively half-etching portions other than the second via hole 40 'formed in the 30' or outer copper-clad laminate 11 '.

이때, 상기 외층하프에칭단계는 제2관통홀(30') 또는 제2비아홀(40')이 형성되도록 가공하는 홀가공단계와 홀가공단계를 거친 외층동박적층판(11')에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금단계와 무전해도금을 거친 동박적층판(11')을 동도금시키는 전해도금을 포함하는 외층도금단계와 외층동박적층판에 드라이필름을 라미네이트시켜 제2관통홀(30') 또는 제2비아홀(40')에 도금된 도금층(60)이 에칭되는 것을 방지하는 드라이필름부착단계를 포함하는 이루어진다.At this time, the outer layer half etching step is to impart electrical conductivity to the outer layer copper laminate (11 ') through the hole processing step and the hole processing step to form the second through hole (30') or the second via hole (40 '). In order to laminate the dry film on the outer layer plating step including the electroless plating step of forming the plating layer and the electroplating of the copper foil laminated plate 11 'subjected to the electroless plating and the outer layer copper laminate, the second through hole 30' Or a dry film attaching step of preventing the plating layer 60 plated in the second via hole 40 'from being etched.

상술한 바와 같이 본 발명에 따른 다층 연성 인쇄회로기판의 제조방법은 다음과 같은 효과를 제공한다.As described above, the manufacturing method of the multilayer flexible printed circuit board according to the present invention provides the following effects.

첫째, 굴곡부에 있어서 동박 특유의 연신율을 유지시킬 수 있어, 굴곡특성을 계속하여 유지시킬 수 있는 장점이 있다.First, it is possible to maintain the elongation peculiar to the copper foil in the bent portion, there is an advantage that can continue to maintain the bending characteristics.

둘째, 내층 및 외층에 형성된 관통홀 및 비아홀만을 선택적으로 동도금하기 때문에 회로 형성시 미세 회로를 형성할 수 있는 장점이 있다.Second, since only through-holes and via-holes formed in the inner layer and the outer layer are selectively copper plated, there is an advantage in that a fine circuit can be formed when the circuit is formed.

이상과 같이, 본 발명은 비록 한정된 실시예와 도면에 의해 설명되었으나, 본 발명은 이것에 의해 한정되지 않으며 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자에 의해 본 발명의 기술 사상과 아래에 기재될 특허 청구범위의 균등 범위 내에서 다양한 수정 및 변형이 가능함은 물론이다.As mentioned above, although this invention was demonstrated by the limited embodiment and drawing, this invention is not limited by this, The person of ordinary skill in the art to which this invention belongs, Of course, various modifications and variations are possible within the scope of equivalent claims.

Claims (6)

삭제delete 삭제delete 삭제delete 베이스필름에 동박층이 적층된 동박적층판에 관통홀 또는 비아홀을 가공하는 홀가공단계;A hole processing step of processing through-holes or via holes in the copper-clad laminate in which the copper foil layer is laminated on the base film; 상기 홀가공단계를 거친 동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금과, 무전해도금을 거친 동박적층판을 동도금시키는 전해도금을 포함하는 도금단계;A plating step including an electroless plating for forming a plating layer and an electroplating for copper plating the copper foil laminated plate that has undergone electroless plating to impart electrical conductivity to the copper foil laminated plate that has undergone the hole processing step; 동박적층판에 드라이필름을 라미네이트시켜 관통홀 또는 비아홀에 도금된 도금층이 에칭되는 것을 방지하는 드라이필름부착단계;A dry film attaching step of laminating a dry film on the copper-clad laminate to prevent etching of the plated layer plated in the through hole or the via hole; 드라이필름이 부착된 동박적층판의 관통홀 또는 비아홀을 제외한 부분을 하프에칭시키는 하프에칭단계;A half etching step of half-etching portions except through-holes or via holes of the copper-clad laminate to which the dry film is attached; 상기 하프에칭단계를 거친 후 드라이필름을 박리하는 드라이필름박리단계; A dry film peeling step of peeling the dry film after the half etching step; 동박적층판의 양면에 회로패턴을 형성시키는 회로형성단계;A circuit forming step of forming circuit patterns on both sides of the copper-clad laminate; 회로패턴이 형성된 동박적층판의 양면에 외층동박적층판을 적층시키는 적층단계;A laminating step of laminating an outer layer copper laminated sheet on both sides of the copper laminated sheet having a circuit pattern formed thereon; 외층동박적층판과 동박적층판을 관통하는 제2관통홀 또는 외층동박적층판에 제2비아홀을 가공하는 홀가공단계;A hole processing step of processing a second through hole through the outer copper clad laminate and the copper clad laminate, or a second via hole in the outer copper clad laminate; 상기 홀가공단계를 거친 외층동박적층판에 통전성을 부여하기 위하여 도금층을 형성하는 무전해도금과, 무전해도금을 거친 외층동박적층판을 동도금시키는 전해도금을 포함하는 외층도금단계;An outer layer plating step including an electroless plating for forming a plating layer and an electroplating for copper plating the outer layer copper foil laminated plate through the electroless plating in order to impart electrical conductivity to the outer layer copper laminate sheet which has undergone the hole processing step; 외측동박적층판에 드라이필름을 라미네이트시켜 제2관통홀 또는 제2비아홀에 도금된 도금층이 에칭되는 것을 방지하는 드라이필름부착단계;A dry film attaching step of laminating a dry film on the outer copper laminate to prevent etching of the plating layer plated on the second through hole or the second via hole; 제2관통홀 또는 제2비아홀을 제외한 부분을 선택적으로 하프에칭시키는 외층하프에칭단계를; 포함하는 다층 연성 인쇄회로기판의 제조방법.An outer layer half etching step of selectively half-etching portions other than the second through hole or the second via hole; Method of manufacturing a multilayer flexible printed circuit board comprising a. 삭제delete 삭제delete
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