KR100728993B1 - Method of manufacturing semiconductor device - Google Patents
Method of manufacturing semiconductor device Download PDFInfo
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- KR100728993B1 KR100728993B1 KR1020060061549A KR20060061549A KR100728993B1 KR 100728993 B1 KR100728993 B1 KR 100728993B1 KR 1020060061549 A KR1020060061549 A KR 1020060061549A KR 20060061549 A KR20060061549 A KR 20060061549A KR 100728993 B1 KR100728993 B1 KR 100728993B1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229910003481 amorphous carbon Inorganic materials 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000005468 ion implantation Methods 0.000 claims abstract description 17
- 239000007789 gas Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 5
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 7
- 239000001257 hydrogen Substances 0.000 abstract description 7
- 239000011248 coating agent Substances 0.000 abstract 2
- 238000000576 coating method Methods 0.000 abstract 2
- 238000004140 cleaning Methods 0.000 description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 230000007261 regionalization Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
도 1은 종래의 문제점을 나타낸 평면도.1 is a plan view showing a conventional problem.
도 2a 내지 도 2c는 본 발명의 실시예에 따른 반도체 소자의 제조방법을 설명하기 위한 공정별 단면도.2A to 2C are cross-sectional views of processes for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
10: 반도체기판 20: 식각대상층10: semiconductor substrate 20: etching target layer
30: 비정질 탄소막 40: 난반사막30: amorphous carbon film 40: diffuse reflection film
본 발명은 반도체 소자의 제조방법에 관한 것으로, 보다 상세하게는, 하드마스크로서 비정질 탄소막을 사용하는 경우에 발생하는 문제점을 해결할 수 있는 반도체 소자의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device that can solve a problem that occurs when an amorphous carbon film is used as a hard mask.
최근 소자의 집적도가 증가함에 따라 패터닝 및 식각 공정의 CD(Critical Demension)도 비례하여 작아지는 추세에 있다. Recently, as the integration of devices increases, the critical dimension (CD) of the patterning and etching processes also decreases in proportion.
이에, 초고집적 반도체 소자의 패턴 형성을 위하여 하드마스크막으로서 비정질 탄소막(armorphous carbon film)을 사용하려는 연구가 활발히 진행되고 있다.Accordingly, studies are being actively conducted to use an amorphous carbon film as a hard mask film for pattern formation of an ultra-high density semiconductor device.
일반적으로, 소자의 패턴 형성을 위한 공정은, 우선, 식각대상층 상에 하드마스크막용 비정질 탄소막과 산화막 또는 질화막 계열의 난반사막을 증착한 후, 상기 난반사막 상에 감광막을 도포, 노광 및 현상해서 감광막 패턴을 형성하고, 그리고, 상기 감광막패턴을 식각마스크로 이용하여 난반사막과 비정질 탄소막을 식각하고 나서, 상기 비정질 탄소막을 식각마스크로 이용하여 식각대상층을 식각하는 방식으로 진행한다.In general, a process for forming a pattern of a device includes first depositing an amorphous carbon film for a hard mask film and an diffused film based on an oxide film or a nitride film on an etching target layer, and then applying, exposing and developing a photosensitive film on the diffused film to form a photosensitive film pattern. Next, the diffuse reflection film and the amorphous carbon film are etched using the photoresist pattern as an etch mask, and then the etching target layer is etched using the amorphous carbon film as the etch mask.
그러나, 상기 난반사막을 SiON과 같은 질화막 계열로 형성하는 경우에는, 산화막 계열의 하지층과 막의 성질이 다름으로 인해, 후속 상기 식각 공정 후의 세정(cleaning) 공정에서 질화막 제거 공정 및 산화막 제거 공정으로 진행되는 2번의 세정 공정이 진행되어야 하므로, 세정 공정의 번거러움이 따르게 된다. However, in the case where the diffuse reflection film is formed of a nitride film series such as SiON, since the underlying layer of the oxide film series and the properties of the film are different, the nitride film removal step and the oxide film removal step are performed in a subsequent cleaning step after the etching step. Since two cleaning processes have to be performed, the cumbersome cleaning process is followed.
반면, 상기 난반사막을 산화막 계열로 형성하는 경우에 후속의 세정 공정을 1번만 수행하면 되는 장점은 있으나, 상기 비정질 탄소막 상에 난반사막의 산화막 증착시, 상기 산화막 계열의 난반사막이 리프팅(lifting)되는 현상이 발생하는 문제점이 있다.On the other hand, when the diffuse reflection film is formed as an oxide film-based, there is an advantage in that only one subsequent cleaning process is performed. However, when the diffuse reflection film is deposited on the amorphous carbon film, the phenomenon that the oxide reflection film is lifted is lifted. There is a problem that occurs.
구체적으로, 상기 비정질 탄소막의 증착은, 수소와 탄소가 결합하게 되면서 비정질 탄소막의 표면에 수소기가 형성하게 되는데, 이러한 수소기가 형성된 비정질 탄소막의 표면 상에 난반사막인 산화막을 증착하게 되면, 상기 산화막 내의 산소가 비정질 탄소막의 수소기와 반응하게 되면서 상기 난반사막이 리프팅되는 현상이 발생하게 된다. Specifically, in the deposition of the amorphous carbon film, hydrogen and carbon are bonded to form a hydrogen group on the surface of the amorphous carbon film. When the oxide film, which is a diffuse reflection film, is deposited on the surface of the amorphous carbon film on which the hydrogen group is formed, As the oxygen reacts with the hydrogen group of the amorphous carbon film, the diffuse reflection film is lifted.
이처럼, 상기 난반사막의 리프팅 현상은, 상기 비정질 탄소막과 난반사막의 접착력이 저하시키면서, 이로 인해, 소자의 특성을 저하시키는 원인이 된다.As described above, the lifting phenomenon of the diffuse reflection film decreases the adhesion between the amorphous carbon film and the diffuse reflection film, thereby causing deterioration of the characteristics of the device.
도 1은 산화막 계열의 난반사막과 비정질 탄소막의 접착 불량을 나타내는 도면으로서, 난반사막이 비정질 탄소막의 전체에 형성되어 있지 않고, 일부 뜯겨져 있는 모습을 볼 수 있다.FIG. 1 is a view showing poor adhesion between an oxide-based diffuse reflection film and an amorphous carbon film, and the diffuse reflection film is not formed in the entirety of the amorphous carbon film, but is partially broken.
따라서, 본 발명은 상기와 같은 종래의 문제점을 해결하기 위해 안출된 것으로서, 하드마스크용 비정질 탄소막 상에 증착하는 산화막 계열인 난반사막의 리프팅 현상을 방지하여 난반사막과 비정질 탄소막의 접착력을 향상시킬 수 있는 반도체 소자의 제조방법을 제공함에 그 목적이 있다.Accordingly, the present invention has been made to solve the above conventional problems, it is possible to improve the adhesion between the diffuse reflection film and the amorphous carbon film by preventing the lifting phenomenon of the diffuse reflection film which is an oxide film based on the amorphous carbon film for the hard mask. Its purpose is to provide a method for manufacturing a semiconductor device.
또한, 본 발명은 난반사막의 세정 공정 단순화를 이룰 수 있는 반도체 소자의 제조방법을 제공함에 그 다른 목적이 있다.Another object of the present invention is to provide a method for manufacturing a semiconductor device capable of simplifying the cleaning process of the diffuse reflection film.
상기와 같은 목적을 달성하기 위하여, 본 발명은, 하드마스크막으로서 비정질 탄소막을 사용하는 반도체 소자의 제조방법에 있어서, 반도체기판 상에 식각대상층과 하드마스크막용 비정질 탄소막을 차례로 증착하는 단계; 상기 비정질 탄소막 표면의 수소기가 제거되도록 상기 비정질 탄소막에 이온주입을 수행하는 단계; 상기 수소기를 제거한 비정질 탄소막 상에 산화막 계열의 난반사막을 형성하는 단계;를 포함하는 반도체 소자의 제조방법을 제공한다.In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device using an amorphous carbon film as a hard mask film, comprising the steps of: depositing an etching target layer and an amorphous carbon film for a hard mask film on a semiconductor substrate; Performing ion implantation into the amorphous carbon film to remove hydrogen groups on the surface of the amorphous carbon film; It provides a semiconductor device manufacturing method comprising the step of forming an oxide film-based diffuse reflection film on the amorphous carbon film removed the hydrogen group.
삭제delete
여기서, 상기 이온주입은 O2 가스를 이용하여 수행하는 것을 특징으로 한다.In this case, the ion implantation is characterized in that performed using O 2 gas.
상기 O2 이온주입은 1.0E11∼1.0E14 /㎠의 도우즈 및 1∼30KeⅤ의 에너지로 수행하는 것을 특징으로 한다.The O 2 ion implantation is performed with a dose of 1.0E11 to 1.0E14 / cm 2 and an energy of 1 to 30 KeV.
상기 난반사막은 SiH4 가스와 O2 가스의 분율을 1:1∼2:1로 하고, 압력을 1∼20Torr로 하며, 파워를 10∼1500Ｗ하여 형성하는 것을 특징으로 한다.The diffuse reflection film is formed with a fraction of SiH 4 gas and O 2 gas of 1: 1 to 2: 1, a pressure of 1 to 20 Torr, and a power of 10 to 1500 kW.
상기 SiH4 가스의 유량은 50∼150sccm의 유량을 갖는 것을 특징으로 한다.The flow rate of the SiH 4 gas is characterized by having a flow rate of 50 ~ 150sccm.
(실시예)(Example)
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명하도록 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
먼저, 본 발명의 기술적 원리를 설명하면, 본 발명은 하드마스크용 비정질 탄소막 상에 산화막 계열의 난반사막 증착시 상기 난반사막의 리프팅(lifting) 현상을 방지하기 위한 것으로서, 식각대상층이 형성된 기판 상에 비정질 탄소막을 증착하고, 상기 비정질 탄소막 표면의 수소기가 제거되도록 상기 비정질 탄소막에 이온주입을 수행한다. First, the technical principle of the present invention, the present invention is to prevent the lifting (lifting) of the diffuse reflection film when the oxide-based diffuse reflection film is deposited on the amorphous carbon film for the hard mask, an amorphous layer on the substrate A carbon film is deposited, and ion implantation is performed to the amorphous carbon film to remove hydrogen groups on the surface of the amorphous carbon film.
이렇게 하면, 수소기가 제거된 비정질 탄소막 상에 난반사막 증착시 난반사막이 리프팅되는 현상을 억제할 수 있으며, 그래서, 상기 난반사막과 비정질 탄소막의 접착력을 향상시킬 수 있다.In this way, the phenomenon in which the diffuse reflection film is lifted when the diffuse reflection film is deposited on the amorphous carbon film from which the hydrogen groups have been removed can be suppressed, so that the adhesion between the diffuse reflection film and the amorphous carbon film can be improved.
자세하게, 도 2a 내지 도 2c는 본 발명에 따른 반도체 소자의 제조방법을 설 명하기 위한 공정별 단면도로서, 이를 설명하면 다음과 같다. 2A to 2C are cross-sectional views illustrating processes for manufacturing a semiconductor device according to the present invention, which will be described below.
도 2a를 참조하면, 식각대상층(20)이 형성된 반도체기판(10)을 마련한다. 그런다음, 상기 식각대상층(20) 상에 하드마스크막용 비정질 탄소막(30)을 증착한다. 이때, 상기 비정질 탄소막(30) 증착시 수소와 탄소가 결합하게 되면서 비정질 탄소막의 표면에 수소기가 형성하게 된다.Referring to FIG. 2A, a
도 2b를 참조하면, 상기 비정질 탄소막 표면의 수소기가 제거되도록 비정질 탄소막(30)에 이온주입을 수행한다. 바람직하게, 상기 이온주입은 O2 을 사용하며 1.0E11∼1.0E14 /㎠의 도우즈 및 1∼30KeⅤ의 에너지의 조건으로 수행한다. Referring to FIG. 2B, ion implantation is performed to the
이처럼, 본 발명은 반도체 소자의 패턴 형성을 위한 하드마스크막으로서 비정질 탄소막을 사용하는 경우, 상기 비정질 탄소막에 O2 이온주입을 수행함으로서, 상기 비정질 탄소막의 표면에 형성된 수소기를 제거하도록 한다.As described above, when the amorphous carbon film is used as the hard mask film for pattern formation of the semiconductor device, O 2 ion implantation is performed on the amorphous carbon film to remove hydrogen groups formed on the surface of the amorphous carbon film.
다시말하면, 그 표면에 수소기가 형성된 상기 비정질 탄소막에 O2 이온주입을 수행하게 되면, 상기 O2 이온주입시 힘을 가진 입자들이 수소와 탄소의 결합에 물리적으로 부딪치면서 강제로 수소와 탄소의 결합을 끊어지게 하여 비정질 탄소막의 표면에 형성된 수소기를 제거하게 된다.In other words, when O 2 ion implantation is performed on the amorphous carbon film having a hydrogen group formed on the surface thereof, the particles having the force during the O 2 ion implantation physically collide with the bond between hydrogen and carbon, forcing a bond between hydrogen and carbon. And the hydrogen groups formed on the surface of the amorphous carbon film are removed.
따라서, 본 발명은 수소기가 제거된 비정질 탄소막 상에 후속에 형성되는 산화막 계열의 난반사막 증착시, 비정질 탄소막 상에 리프팅 현상없이 안정적인 난반사막을 증착할 수 있게 된다.Accordingly, the present invention enables the deposition of a stable diffuse reflection film without a lifting phenomenon on the amorphous carbon film when the oxide-based diffuse reflection film is subsequently formed on the amorphous carbon film from which the hydrogen groups have been removed.
도 2c을 참조하면, 상기 수소기가 제거된 비정질 탄소막(30) 상에 산화막 계열의 난반사막(40)을 형성한다. 여기서, 상기 난반사막(40)은 SiH4 가스와 O2 가스의 분율을 1:1∼2:1로 하고, 압력을 1∼20Torr로 하며, 파워를 10∼1500Ｗ하여 형성하도록 하며, 아울러, 상기 SiH4 가스의 유량은 50∼150sccm으로 하도록 한다.Referring to FIG. 2C, an oxide-based
여기서, 상기 난반사막(40)을 산화막 계열로 형성함으로서, 후속 난반사막의 식각 공정 후 진행되는 세정 공정을 1번만 수행하게 되어, 질화막 계열의 난반사막에 비해 세정 공정을 단순화 시킬 수 있는 잇점이 있다.In this case, since the
이후, 도시하지는 않았으나, 상기 난반사막 상에 식각대상층의 식각 예정 영역을 노출시키는 감광막패턴을 형성한 후, 상기 감광막패턴을 식각마스크로 이용하여 난반사막과 비정질 탄소막을 식각한다.
다음으로, 상기 감광막패턴을 공지된 공정으로 제거한 후, 상기 비정질 탄소막을 식각마스크인 하드마스크 패턴으로 이용하여 상기 식각대상층을 식각하여 원하는 반도체 소자의 패턴을 형성하고, 이후, 공지된 일련의 후속 공정을 차례로 진행하여 본 발명의 실시예에 따른 반도체 소자를 제조한다.Subsequently, although not shown, after the photoresist pattern is formed on the diffuse reflection film to expose the etched region of the etch target layer, the diffuse reflection film and the amorphous carbon film are etched using the photoresist pattern as an etching mask.
Next, after removing the photoresist pattern by a known process, the etching target layer is etched by using the amorphous carbon film as a hard mask pattern as an etching mask to form a pattern of a desired semiconductor device, and then a known series of subsequent processes. To proceed in order to manufacture a semiconductor device according to an embodiment of the present invention.
이상, 여기에서는 본 발명을 특정 실시예에 관련하여 도시하고 설명하였지만, 본 발명이 그에 한정되는 것은 아니며, 이하의 특허청구의 범위는 본 발명의 정신과 분야를 이탈하지 않는 한도 내에서 본 발명이 다양하게 개조 및 변형될 수 있다는 것을 당업계에서 통상의 지식을 가진 자가 용이하게 알 수 있다.As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.
이상에서와 같이, 본 발명은 반도체 소자의 패턴 형성을 위한 하드마스크막으로 사용하는 비정질 탄소막에 대해 O2 이온주입을 수행하여 상기 비정질 탄소막 표면의 수소기를 제겅함으로써, 상기 비정질 탄소막 상에 형성하는 산화막 계열인 난반사막의 리프팅 현상을 방지할 수 있다.
따라서, 본 발명은 비정질 탄소막과 산화막 계열인 난반사막의 접착력을 향상시킬 수 있다.As described above, the present invention provides an oxide film formed on the amorphous carbon film by performing hydrogen implantation on the surface of the amorphous carbon film by performing O 2 ion implantation on an amorphous carbon film used as a hard mask film for pattern formation of a semiconductor device. It is possible to prevent the lifting phenomenon of a series of diffuse reflection film.
Therefore, the present invention can improve the adhesion between the amorphous carbon film and the diffuse reflection film of the oxide film series.
또한, 본 발명은 난반사막을 산화막 계열로 형성함으로서, 난반사막의 세정 공정시, 공정 단순화가 가능하다.In addition, according to the present invention, by forming the diffuse reflection film in an oxide film series, the process can be simplified during the cleaning process of the diffuse reflection film.
Claims (6)
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH06333916A (en) * | 1993-05-21 | 1994-12-02 | Fuji Electric Co Ltd | Hardening method for amorphous carbon film |
| KR19990019538A (en) * | 1997-08-29 | 1999-03-15 | 윤종용 | Anti-reflective film formation method using hydrocarbon gas |
| JPH11150115A (en) | 1997-08-25 | 1999-06-02 | Internatl Business Mach Corp <Ibm> | Multilayered structure and its manufacture |
| KR20060030205A (en) * | 2004-10-05 | 2006-04-10 | 삼성전자주식회사 | Method for forming a layer |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06333916A (en) * | 1993-05-21 | 1994-12-02 | Fuji Electric Co Ltd | Hardening method for amorphous carbon film |
| JPH11150115A (en) | 1997-08-25 | 1999-06-02 | Internatl Business Mach Corp <Ibm> | Multilayered structure and its manufacture |
| KR19990019538A (en) * | 1997-08-29 | 1999-03-15 | 윤종용 | Anti-reflective film formation method using hydrocarbon gas |
| KR20060030205A (en) * | 2004-10-05 | 2006-04-10 | 삼성전자주식회사 | Method for forming a layer |
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