KR100722113B1 - Light emitting display - Google Patents

Abstract

The present invention relates to a light emitting display device, comprising: a plurality of pixels, a plurality of data lines for applying a data signal to the plurality of pixels, a plurality of scanning lines for applying a scan signal to the plurality of pixels, and emission control for the plurality of pixels A plurality of light emission control lines for applying a signal and a plurality of power lines for transmitting power to the plurality of pixels, wherein two adjacent pixels in one row of the plurality of pixels are connected to one of the plurality of data lines; An image display unit is provided which shares a data line and is connected to two different scan lines among the plurality of scan lines, respectively.

Therefore, two adjacent pixels share the data line and / or the power supply line in common, thereby reducing the number of wiring lines of the pixel, thereby simplifying the wiring process. In addition, a pixel is positioned between the power supply line and the data line, so that the power supply line and the data line can be maintained at a constant distance, thereby preventing short circuit failure between the power supply line and the data line.

In addition, the threshold voltage of the driving transistor generated during the manufacturing process may be compensated to prevent unevenness of brightness and brightness.

Light emitting display. Threshold Voltage, Initialization Signal

Description

Light emitting display device {LIGHT EMITTING DISPLAY}

1 is an equivalent circuit diagram illustrating a plurality of pixels of a light emitting display device according to the related art.

2 is a structural diagram illustrating an embodiment of a light emitting display device according to the present invention.

3 is an equivalent circuit diagram illustrating a pixel employed in a light emitting display device according to the present invention.

4 is a timing diagram illustrating an operation of a pixel of FIG. 3.

5 is a circuit diagram showing a first embodiment of the circuit of the image display unit of the light emitting display device according to the present invention.

6 is a circuit diagram showing a second embodiment of the circuit of the image display unit of the light emitting display device according to the present invention.

7 is a circuit diagram showing a third embodiment of the circuit of the image display unit of the light emitting display device according to the present invention.

FIG. 8 is a timing diagram illustrating an operation of the image display unit circuit shown in FIG. 7.

*** Explanation of symbols on main parts of drawings ***

100: image display unit 110: pixels

200: scan driver 300: data driver

The present invention relates to a light emitting display device, and more particularly, to provide a light emitting display device which reduces the load of an initialization signal and increases the resolution by realizing a small pixel size.

Recently, various flat panel display devices having a smaller weight and volume than the cathode ray tube have been developed. In particular, a light emitting display device having excellent luminous efficiency, brightness, viewing angle, and fast response speed has been attracting attention.

The light emitting device has a structure in which a light emitting layer, which is a thin film that emits light, is positioned between a cathode electrode and an anode electrode, and excitons are generated by injecting electrons and holes into the light emitting layer to recombine them, and the excitons fall to low energy to emit light. have.

In the light emitting device, the light emitting layer is formed of an inorganic material or an organic material, and is classified into an inorganic light emitting device and an organic light emitting device according to the type of light emitting layer.

1 is an equivalent circuit diagram illustrating a plurality of pixels of a light emitting display device according to the related art. Referring to FIG. 1, four pixels adjacent from right to left are referred to as a first pixel 10, a second pixel 20, a third pixel 30, and a fourth pixel 40. Each pixel Has the same configuration and performs the same operation. Each pixel includes a light emitting device (hereinafter, referred to as an LED), a switching transistor M1, a driving transistor (Thin Film Transistor: M2), and a capacitor (C). The scan line S1, the data lines Dm, Dm + 1, Dm + 2, and Dm + 3 and the power supply line Vdd are connected to the pixel. The scanning line Sn is formed in the row direction, and the data lines D1, D2, D3, D4 and the power supply line Vdd are formed in the column direction.

In the first pixel 10, the first switching transistor M1 is connected to the first data line D1, and in the second pixel 20, the first switching transistor M1 is connected to the data line D2. In the pixel 30, the first switching transistor M1 is connected to the data line D3, and in the fourth pixel 40, the first switching transistor M1 is connected to the data book D4.

Since the first pixel 10 to the fourth pixel 40 perform the same operation, the operation of the pixel will be described through the operation of the first pixel 10.

When the first pixel 10 receives the scan signal through the scan line S1 and the first switching transistor M1 is turned on, the first pixel 10 is transferred to the first pixel 10 through the data line D1. . In this case, the voltage difference between the pixel power supply and the data signal is stored in the storage capacitor Cst.

The LED stored in the storage capacitor Cst is applied to the gate electrode of the driving transistor M2 so that a constant current flows from the source electrode of the driving transistor M2 toward the drain electrode and is connected to the driving transistor M2. An electric current flows in and emits light.

Equation 1 below represents the amount of current flowing from the source electrode of the driving transistor M2 toward the drain electrode.

Where I is the current flowing through the LED, Vgs is the gate-source voltage of the driving transistor M2, Vth is the threshold voltage of the driving transistor M2, Vdata is the voltage of the data signal, and β is the gain coefficient of the driving transistor M2. Gain factor).

According to Equation 1, the current flowing through the LED is affected by the pixel voltage and the threshold voltage of the driving transistor M2.

As the size of the pixel display unit increases, more pixels are connected to the pixel power supply line Vdd, causing a voltage drop in the pixel voltage. The threshold voltage of the driving transistor M2 is nonuniform in the manufacturing process of the light emitting display device. Will appear.

Therefore, there is a problem that the current flowing through the LED flows unevenly for each pixel.

Accordingly, the present invention was created to solve the problems of the prior art, and an object of the present invention is to allow a current flowing in a driving transistor to flow regardless of the threshold voltage of the driving transistor, so that the difference in the threshold voltage of the driving transistor is reduced. It is an object of the present invention to provide a light emitting display device that is compensated to prevent unevenness of luminance of the light emitting display device.

As a technical means for achieving the above object, a first aspect of the present invention is a plurality of pixels, a plurality of data lines for applying a data signal to the plurality of pixels, a plurality of scanning lines for applying a scan signal to the plurality of pixels, A plurality of light emission control lines for applying light emission control signals to the plurality of pixels and a plurality of power supply lines for supplying power to the plurality of pixels, wherein two adjacent pixels in one row of the plurality of pixels include: An image display unit which shares one data line among a plurality of data lines and is connected to two different scan lines among the plurality of scan lines, respectively.

According to a second aspect of the present invention, there is provided an image display unit including a plurality of pixels, a plurality of data lines, a plurality of scan lines, a plurality of light emission control lines, and a plurality of power supply lines, and a scan driver for applying scan signals and light emission control signals to the scan lines. And the image display unit, wherein two adjacent pixels in one row of the plurality of pixels share one data line of the plurality of data lines and are respectively connected to two different scan lines of the plurality of scan lines. Provided is a light emitting display device.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

2 is a structural diagram illustrating an embodiment of a light emitting display device according to the present invention. Referring to FIG. 2, the light emitting display device includes an image display unit 100, a scan driver 200, and a data driver 300.

The image display unit 100 includes a pixel 110 including N × M LEDs, a plurality of scan lines arranged in a row direction, a plurality of data lines arranged in a column direction, and a plurality of pixel power lines arranged in a column direction. do.

The pixel 110 stores a voltage corresponding to the data signal and generates a current by using the stored voltage to flow the LED to emit light.

Scan lines S1, S2, ... Sn-1, Sn are connected to two scan lines to one pixel 110, and two scan signals are sequentially input and are stored in the pixel 110 by the first scan signal. The voltage is initialized and the data signal is inputted to the pixel by the second scan signal so that a voltage corresponding to the data signal can be stored in the pixel.

The data lines D1, D2,... Dm-1, Dm transfer the data signal to the pixel 110 selected by the scan signal to store a voltage corresponding to the data signal in the pixel.

The pixel power supply line Vdd is connected to a pixel to supply the pixel power to flow a current corresponding to the data signal by the pixel power.

The scan driver 200 generates a scan signal and an initialization signal and transmits the scan signal and the initialization signal to the image display unit 100 to select a row of the image display unit. In addition, the scanning signals are sequentially transmitted to the image display unit 100 to sequentially select all rows of the image display unit 100.

The data driver 300 generates a data signal and transmits the data signal to the image display unit 100, and transmits the data signal to one row of the image display unit 100 selected by the scan signal.

3 is an equivalent circuit diagram illustrating a pixel employed in a light emitting display device according to the present invention. Referring to FIG. 3, the pixel 110 includes an LED and a peripheral circuit thereof, and includes a first switching transistor M1, a second switching transistor M2, a third switching transistor M3, and a fourth switching transistor ( M4), a fifth switching transistor M5, a driving transistor M6, and a capacitor Cst. The first to fifth switching transistors M1, M2, M3, M4 and M5 and the driving transistor M6 include a gate electrode, a source electrode and a drain electrode, and the capacitor Cst includes the first electrode and the second electrode. .

In the first switching transistor M1, a gate electrode is connected to the first scan line Sn, a source electrode is connected to a data line, and a drain electrode is connected to the first node A. Therefore, the data signal is transmitted to the first node A by the second scan signal input through the first scan line Sn.

In the second switching transistor M2, the gate electrode and the source electrode are connected to the second scan line Sn- 1, and the drain electrode is connected to the second node B. Therefore, the first scan signal input through the second scan line Sn- 1 is transmitted to the second node B, and the first scan signal may be referred to as an initialization signal.

In the third switching transistor M3, the gate electrode is connected to the first scan line Sn, the source electrode is connected to the gate electrode of the driving transistor M6, and the drain electrode is connected to the third node C. Therefore, the potential of the gate electrode of the driving transistor M6 and the third node C are made equal by the first scan signal input through the first scan line Sn.

The fourth switching transistor M4 has a source electrode connected to the pixel power supply line Vdd, a drain electrode connected to the first node A, and a gate electrode connected to the emission control line El. Therefore, the pixel power is selectively transferred to the driving transistor M6 according to the emission control signal transmitted through the emission control line El.

In the fifth switching transistor M5, the source electrode is connected to the third node C, the drain electrode is connected to the LED, and the gate electrode is connected to the emission control line El. Therefore, the current is selectively transmitted to the LED according to the emission control signal transmitted through the emission control line El.

In the driving transistor M6, the source electrode is connected to the first node A, the drain electrode is connected to the third node C, and the gate electrode is connected to the second node B. Therefore, when the potentials of the second node B and the third node C are equal by the operation of the third switching transistor M3, the driving transistor M6 is diode-coupled and transferred to the first node A. FIG. The data signal reaches the second node B through the driving transistor M6. When the pixel power is delivered to the first node A, current flows from the source electrode through the drain electrode in response to the voltage applied to the gate electrode. That is, the amount of current flowing through the driving transistor M6 that is determined by the potential of the second node B is determined.

In the capacitor Cst, the first electrode is connected to the pixel power supply line Vdd and the second electrode is connected to the second node B. Therefore, when the initialization signal is transmitted to the second node B by the second switching transistor M2, the capacitor Cst stores the initialization voltage, and the first switching transistor M1 and the third switching transistor M3. When the data signal is transferred to the driving transistor M6, the voltage corresponding to the data signal is charged. The capacitor Cst transfers the stored voltage to the second node B so that the voltage stored in the capacitor Cst is applied to the gate electrode of the driving transistor M6.

4 is a timing diagram illustrating an operation of a pixel of FIG. 3. Referring to FIG. 4, the pixel is operated by inputting the first scan signal sn-1, the second scan signal sn, and the emission control signal el to the pixel. The first scan signal sn-1, the second scan signal sn, and the emission control signal el are periodic signals, and the first period T1, the second period T2, and the third period ( T3) and the third section T3 is maintained until one frame ends.

The first scan signal sn-1 maintains a low state in the first section T1, maintains a high state in the second section T2 and the third section T3, and the second scan signal sn A high state is maintained in the first section T1 and a third section T3, and a low state is maintained in the second section T2. In addition, the light emission control signal el maintains a high state in the first section T1 and the second section T2 and is switched to a low state in the third section T3 to maintain a low state.

In the first period T1, the second switching transistor M2 is turned on by the first scan signal sn-1. Therefore, the initialization signal is transmitted to the second node B so that the capacitor Cst is initialized by the initialization signal.

In the second period T2, the first switching transistor M1 and the third switching transistor M2 are turned on by the second scanning signal sn. Therefore, the data signal is transmitted to the first node A through the first switching transistor M1 and the potentials of the second node B and the third node C are equal by the third switching transistor M3. The driving transistor M6 is diode-coupled so that the data signal transmitted to the first node A is transferred to the second node B.

Therefore, the voltage corresponding to Equation 1 below is stored in the storage capacitor Cst, and the voltage corresponding to Equation 1 is applied to the gate electrode of the driving transistor M6.

Where Vsg is the voltage between the source and gate electrode of the driving transistor M6, Vdd is the pixel power supply voltage, Vdata is the voltage of the data signal, and Vth is the threshold voltage of the driving transistor M6.

In the third period T3, the fourth switching transistor M4 and the fifth switching transistor M5 are turned on by the light emission control signal, and the pixel power is applied to the driving transistor M6. In this case, a voltage corresponding to Equation 1 is applied to the gate electrode of the driving transistor M6 so that a current corresponding to Equation 2 below flows from the source of the driving transistor M6 to the drain electrode.

Where I is the current flowing through the LED, Vgs is the voltage applied to the gate electrode of the driving transistor M6, Vdd is the voltage of the pixel power supply, Vth is the threshold voltage of the driving transistor M6, and Vdata is the voltage of the data signal.

Therefore, the current flowing through the LED flows regardless of the threshold voltage of the driving transistor M6.

5 is a circuit diagram showing a first embodiment of the image display unit employed in the light emitting display device according to the present invention. For simplicity, an image display portion having a size of 2x4 is shown. Referring to FIG. 5, scan lines and emission control lines are arranged in the horizontal direction in the image display unit 100, data lines and power supply lines are alternately connected in the vertical direction, and the plurality of pixels 110 include scan lines, data lines, and the like. It is connected between power supply lines.

The scanning lines are arranged in two adjacently arranged scanning lines at regular intervals, and the scanning lines in the top to bottom direction are the first scanning line S1, the second scanning line S2, the third scanning line S3, the fourth scanning line S4, It is called a 5th scanning line S5 and a 6th scanning line S6.

The emission control line is arranged adjacent to the scan line, and two emission control lines are connected to one pixel row. From the top to the bottom, the light emission control line E1, the second light emission control line E2, the third light emission control line E3, the fourth light emission control line E4 and the fifth light emission control line ( It is called E5).

The data lines are arranged at a predetermined interval, and are called first data lines D1, second data lines D2, third data lines D3, and fourth data lines D4 from left to right. The first data line D1 and the second data line D2 and the third data line D3 and the fourth data line D4 are arranged adjacent to each other.

The power supply line is positioned between the data line and the data line and is referred to as a first power supply line Vdd1, a second power supply line Vdd2, and a third power supply line Vdd3 in a left-to-right direction.

Each pixel includes a first pixel 111, a second pixel 112, a third pixel 113, a fourth pixel 114, a fifth pixel 115, a sixth pixel 116, and a seventh pixel. 117 and an eighth pixel 118.

In the first row, the gate electrode of the first switching transistor M1 of the first pixel 111 and the third pixel 113 is connected to the second scan line S2 and the gate electrode of the second switching transistor M2. The source electrode is connected to the first scan line S1, the gate electrode of the first switching transistor M1 of the second pixel 112 and the fourth pixel 114 is connected to the third scan line S3, and the second switching transistor. The gate electrode and the source electrode of M2 are connected to the second scan line S2. The source electrode of the first switching transistor M1 of the first pixel 111 is connected to the first data line D1, and the source electrode of the first switching transistor M1 of the second pixel 112 is formed of the first electrode. The source electrode of the first switching transistor M1 of the third pixel 113 is connected to the third data line D2. In addition, the source electrode of the fourth pixel 114 is connected to the fourth data line D4 to receive the data signal. Therefore, each pixel positioned in the same row receives a data signal through different data lines. On the other hand, the same power line receives the pixel power through the second power supply line Vdd2 in the second pixel 112 and the third pixel 113.

In the second row, the gate electrode of the first switching transistor M1 of the fifth pixel 115 and the seventh pixel 117 is connected to the fourth scanning line S5 and the gate electrode and the source of the second switching transistor M2 are connected. The electrode is connected to the third scan line S3, the gate electrode of the first switching transistor M1 of the sixth pixel 116 and the eighth pixel 118 is connected to the fifth scan line S5, and the second switching transistor. The gate electrode and the source electrode of M2 are connected to the fourth scan line S4. In addition, the source electrode of the first switching transistor M1 of the fifth pixel 115 is connected to the first data line D1, and the source electrode of the first switching transistor M1 of the sixth pixel 116 is formed of a first electrode. The source electrode of the first switching transistor M1 of the seventh pixel 117 is connected to the third data line D2. In addition, the source electrode of the eighth pixel 118 is connected to the fourth data line D4 to receive the data signal. Therefore, each pixel positioned in the same row receives a data signal through different data lines. On the other hand, in the sixth pixel 112 and the seventh pixel 113, the same power line receives the pixel power through the second power supply line Vdd2.

Therefore, the adjacent second pixel 112, the third pixel 113, and the sixth pixel 116 and the seventh pixel 117 share the second power supply line Vdd2.

6 is a circuit diagram showing a second embodiment of the circuit of the image display unit of the light emitting display device according to the present invention. Referring to FIG. 6, scan lines are arranged in the horizontal direction at regular intervals in the image display unit 100, and a power supply line and a data line are connected in a vertical direction.

The first data line D1 is arranged on the leftmost side, the first power supply line Vdd1 is arranged at a predetermined distance from the first data line D1, and the second power supply line is adjacent to the first power supply line Vdd1. (Vdd2) is arranged. The second data line D2 is arranged at regular intervals from the second power supply line Vdd2, and the third power supply line Vdd3 is arranged at regular intervals from the second data line D2, and the third power source is arranged. The fourth power supply line Vdd4 is arranged adjacent to the supply line Vdd3 and the third data line D3 is arranged at regular intervals from the fourth power supply line Vdd4. Further, the first pixel 111 to the eighth pixel 118 are connected between the scan line, the data line, and the power supply line, and the first pixel 111 to the eighth pixel 118 are connected to the scan line as shown in FIG. 5. Two scan lines are connected to one pixel.

In addition, the first pixel 111 and the fifth pixel 115 receive the pixel power and the data signal through the first power supply line Vdd1 and the first data line D1, and the second pixel 112 and the sixth pixel. The pixel 116 receives the pixel power supply and the data signal through the second power supply line Vdd2 and the second data line D2, and the third pixel 113 and the seventh pixel 117 have a third power supply line Vdd3. And the pixel power and the data signal through the second data line D2. The fourth pixel 114 and the eighth pixel 118 receive the pixel power and the data signal through the fourth power supply line Vdd4 and the third data line D3.

That is, the second pixel 112, the third pixel 113, the sixth pixel 116, and the seventh pixel 117 receive a data signal through the second data line D2.

Accordingly, the number of pixels simultaneously receiving the initialization signal can be reduced, and the two adjacent pixels receive the data signal through one data line, thereby reducing the number of data lines arranged in the image display unit 100 and the wiring of the image display unit. The process is simplified.

7 is a circuit diagram showing a third embodiment of the circuit of the image display unit of the light emitting display device according to the present invention. Referring to FIG. 7, in the image display unit 100, scan lines are arranged at regular intervals in a horizontal direction, and a power supply line and a data line are connected in a vertical direction.

The first power supply line Vdd1 is arranged on the leftmost side and has a constant distance from the first power supply line Vdd1, and the first data line D1 is arranged and the second power source has a constant distance from the first data line D1. The supply line Vdd2 is arranged. The second data line D2 is arranged at regular intervals from the second power supply line Vdd2, and the third power supply line Vdd3 is arranged at regular intervals on the second data line D2. Further, the first pixel 111 to the eighth pixel 118 are connected between the scan line, the data line, and the power supply line, and the first pixel 111 to the eighth pixel 118 are connected to the scan line as shown in FIG. 5. Two scan lines are connected to one pixel.

In addition, the first pixel 111 and the fifth pixel 115 receive the pixel power and the data signal through the first power supply line Vdd1 and the first data line, and the second pixel 112 and the sixth pixel 116. ) Receives the pixel power and the data signal through the second power supply line Vdd2 and the first data line D1, and the third pixel 113 and the seventh pixel 117 are connected to the second power supply line Vdd2 and the second power supply line Vdd2 and the first data line D1. The pixel power and the data signal are received through the two data lines D2. The fourth pixel 114 and the eighth pixel 118 receive the pixel power and the data signal through the third power supply line Vdd3 and the second data line D2.

That is, the adjacent second pixel 112, the third pixel 113, the fifth pixel 115, and the sixth pixel 116 receive pixel power through the second power supply line Vdd2, and the first pixel 111. ) And the second pixel 112 receive the data signal through the first data line D1, and the third pixel 113 and the fourth pixel 114 receive the data signal through the second data line D2. I receive it. Therefore, the number of data lines and the number of power supply lines of the image display unit 100 can be reduced.

FIG. 8 is a timing diagram illustrating an operation of the image display unit circuit shown in FIG. 7. Referring to FIG. 8, the pixel power is input through the first to third power supply lines Vdd1 to Vdd3, the data signals are input through the first and second data lines D1 and D2, and the first The first to sixth scan signals s1 to s6 are sequentially input through the scan lines to sixth scan lines S1 to S2. The first to fourth emission control signals e1 to e4 are sequentially input through the first to fourth emission control lines E1 to E4.

When the first scan signal s1 is input, the first pixel 111 and the third pixel 113 are initialized. When the second scan signal s2 is input, the first pixel 111 and the third pixel 113 are initialized. In this case, a data signal is transmitted to the first pixel 111 and the third pixel 113. The first emission control signal e1 is transmitted to the first pixel 111 and the third pixel 113 to emit light. . In addition, the second pixel 112 and the fourth pixel 114 are initialized by the second scan signal s2.

When the third scan signal s3 is input, a data signal is transmitted to the second pixel 112 and the fourth pixel 114. In this case, a second signal is transmitted to the second pixel 112 and the fourth pixel 114. The emission control signal e2 is transmitted to cause the second pixel 112 and the fourth pixel 114 to emit light. In addition, the fifth pixel 115 and the seventh pixel 117 are initialized by the third scan signal s3.

When the fourth scan signal s4 is input, a data signal is transmitted to the fifth pixel 115 and the seventh pixel 117. At this time, a third signal is transmitted to the fifth pixel 115 and the seventh pixel 117. The emission control signal e3 is transmitted to emit the fifth pixel 115 and the seventh pixel 117, and the sixth pixel 116 and the eighth pixel 118 are initialized by the fourth scan signal s4. Becomes

When the fifth scan signal s5 is input, a data signal is transmitted to the sixth pixel 116 and the eighth pixel 118. In this case, a fourth signal is transmitted to the sixth pixel 116 and the eighth pixel 118. The emission control signal e4 is transmitted to cause the sixth pixel 116 and the eighth pixel 118 to emit light.

That is, two pixels among four pixels positioned in one row receive the scan signal and the data signal at the same time, and the other two pixels receive the scan signal and the data signal next time.

In this case, when the low signal is input as the scan signal, the first switching transistor M1 and the third switching transistor M3 of the pixel perform only the switching operation by the scan signal, so that the load connected to the scan signal is not large. . However, when the low signal is input as the initialization signal, the capacitor C is connected in series with the second switching transistor M2, so that a load by the capacitor C exists.

Therefore, compared with the simultaneous application of the initialization signal to all the pixels in a row, the load applied to the initialization signal is reduced by half, thereby reducing the number of pixels connected to the scan line to which the initialization signal is applied, thereby reducing the resistance and capacitor components connected to the scan line. This decreases.

In addition, the pixel of the image display unit according to the present invention is not limited to the pixel shown in FIGS. 3 to 8, but the pixel for switching the flow of the driving current according to the emission control signal for controlling the emission of the light emitting element is applicable. It is possible.

In addition, unlike FIG. 5 to FIG. 7, one light emission control line may be connected to pixels located in one row so that one row may simultaneously emit light according to an emission control signal output from the same light emission control line. Do. In this case, the region in which the emission control signal is an off signal is applied longer than the emission control signal shown in FIG. 8.

While preferred embodiments of the present invention have been described using specific terms, such descriptions are for illustrative purposes only and it is understood that various changes and modifications may be made without departing from the spirit and scope of the following claims. You must lose.

According to the light emitting display device according to the present invention, two adjacent pixels share the data line and / or the power supply line in common, thereby reducing the number of wiring lines of the pixel, thereby simplifying the wiring process.

In addition, a pixel is positioned between the power supply line and the data line, so that the power supply line and the data line can be maintained at a constant distance, thereby preventing short circuit failure between the power supply line and the data line.

In addition, the threshold voltage of the driving transistor generated during the manufacturing process may be compensated to prevent unevenness of brightness and brightness.

Claims (21)

A plurality of pixels; A plurality of data lines for applying a data signal to the plurality of pixels; A plurality of scan lines for applying a scan signal to the plurality of pixels; A plurality of emission control lines for applying an emission control signal to the plurality of pixels; And It includes a plurality of power lines for transmitting power to the plurality of pixels, Two adjacent pixels in one row of the plurality of pixels share one data line of the plurality of data lines and are respectively connected to two different scan lines of the plurality of scan lines. The method of claim 1, Two power lines of the plurality of power lines are connected to the two adjacent pixels, respectively. The method of claim 2, And two pixels are connected to one of the plurality of power lines, and the two pixels are positioned in the same row. The method of claim 1, Two pixels are connected to one of the plurality of power lines, and the two pixels are connected to two different data lines. The method of claim 1, wherein the pixel, Light emitting element; A driving element for forming a current corresponding to the data signal transmitted while the scan signal is applied; And And a switching element connected to the emission control line to block a current flowing through the light emitting element. The method of claim 1, wherein the pixel, Light emitting element; A driving transistor for driving a driving current through the light emitting device; A first switching transistor for selectively transferring a data signal to a source electrode of the driving transistor; A second switching transistor for selectively transferring an initialization signal; A third switching transistor for selectively diode coupling the driving transistor; A storage capacitor receiving the initialization signal and storing a first voltage corresponding to the initialization signal, and receiving the data signal from a gate electrode of the driving transistor and storing a second voltage corresponding to the data signal; And And a blocking unit selectively transferring pixel power to the driving transistor and allowing the driving current to flow to the light emitting element. The method of claim 6, wherein the blocking unit, And a fourth switching transistor for selectively blocking the pixel power supply and a fifth switching transistor for selectively blocking the driving current. The method of claim 6, And the first switching transistor operates by a first scan signal, the second switching transistor operates by a second scan signal, and the third switching transistor operates by a third scan signal. The method according to any one of claims 6 to 8, And an image display unit configured to sequentially apply an initialization signal and a scanning signal to different scanning lines to the pixels. The method of claim 3, wherein And pixels in the same row are arranged in a zigzag form. An image display unit including a plurality of pixels, a plurality of data lines, a plurality of scanning lines, a plurality of light emission control lines, and a plurality of power lines; And A scan driver for applying a scan signal and a light emission control signal to the scan line; The image display unit, And two adjacent pixels in one row of the plurality of pixels share one data line of the plurality of data lines and are respectively connected to two different scan lines of the plurality of scan lines. The method of claim 11, Two power lines of the plurality of power lines are respectively connected to the two adjacent pixels. The method of claim 11, Two pixels are connected to one of the plurality of power lines, and the two pixels are positioned in the same row. The method of claim 13, Two pixels are connected to one of the plurality of power lines, and the two pixels are positioned in the same row. The method of claim 11, Two pixels are connected to one power line of the plurality of power lines, and the two pixels are connected to two different data lines. The method of claim 11, And a data driver connected to the data line to transmit the data signal to the image display unit. The method of claim 11, wherein the pixel, Light emitting element; A driving element for forming a current corresponding to the data signal transmitted while the scan signal is applied; And And a switching element connected to the emission control line to block a current flowing through the light emitting element. The method of claim 11, wherein the pixel, Light emitting element; A driving transistor for driving a driving current through the light emitting device; A first switching transistor for selectively transferring a data signal to the driving transistor; A second switching transistor for selectively transferring an initialization signal; A third switching transistor for selectively diode coupling the driving transistor; A storage capacitor receiving the initialization signal and storing a first voltage corresponding to the initialization signal, and receiving the data signal from a gate electrode of the driving transistor and storing a second voltage corresponding to the data signal; And And a blocking unit selectively transferring pixel power to the driving transistor and allowing the driving current to flow through the light emitting element. The method of claim 18, wherein the blocking unit, And a fourth switching transistor for selectively blocking the pixel power supply and a fifth switching transistor for selectively blocking the driving current. The method according to claim 18 or 19, A light emitting display device in which different scan lines are sequentially applied to the pixel to sequentially apply an initialization signal and a scan signal. The method of claim 14, The pixels located in the same row are arranged in a zigzag form.

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