KR100739317B1 - Pixel and light emitting display - Google Patents

Abstract

The present invention relates to a light emitting display device, which is commonly connected to first to fourth light emitting devices, the first to fourth light emitting devices, a driving circuit for driving the first to fourth light emitting devices, and the first to fourth light emitting devices. A pixel and a light emitting display device connected between a fourth light emitting device and the driving circuit and including a switching circuit for sequentially controlling the driving of the first to fourth light emitting devices are provided.

As four light emitting devices are connected to one pixel, the number of pixel circuits of the light emitting display device is reduced, which requires a smaller number of devices than a conventional technology in which one pixel is connected to one light emitting device. As the number decreases, the number of scan, data lines, and emission control lines that transmit signals decreases, thereby reducing the size of the scan driver and the data driver, thereby reducing unnecessary space. In addition, as the number of wirings decreases, the aperture ratio of the light emitting display device increases.

Light emitting display, pixel, organic light emission control

Description

Pixel and light emitting display device {PIXEL AND LIGHT EMITTING DISPLAY}

1 is a circuit diagram illustrating a part of a light emitting display device according to the related art.

2 is a structural diagram illustrating a first embodiment of a light emitting display device according to the present invention.

3 is a structural diagram illustrating a second embodiment of a light emitting display device according to the present invention.

4 is a circuit diagram illustrating an embodiment of a pixel employed in the light emitting display device of FIG. 2.

FIG. 5 is a waveform diagram illustrating waveforms of signals transmitted to a light emitting display device employing the pixel illustrated in FIG. 4.

6 is a circuit diagram illustrating a first embodiment of a pixel employed in the light emitting display device of FIG. 3.

FIG. 7 is a circuit diagram illustrating a second embodiment of a pixel employed in the light emitting display device of FIG. 3.

8 is a waveform diagram illustrating waveforms of signals transmitted to a light emitting display device employing the pixels illustrated in FIGS. 6 and 7.

9A to 9D illustrate a light emission process in the light emitting display device of FIG. 3.

*** Explanation of symbols on main parts of drawings ***

100: image display unit 110: pixels

200: data driver 300: scan driver

OLED: light emitting element

The present invention relates to a pixel and a light emitting display device. More particularly, the present invention relates to a pixel and a light emitting display device in which a plurality of light emitting elements are connected to one pixel to emit light to increase the aperture ratio of the light emitting display device.

Recently, various flat panel display devices having a smaller weight and volume than the cathode ray tube have been developed. In particular, a light emitting display device having excellent luminous efficiency, brightness, viewing angle, and fast response speed has been attracting attention.

The light emitting device has a structure in which a light emitting layer, which is a thin film that emits light, is positioned between a cathode electrode and an anode electrode, and excitons are generated by injecting electrons and holes into the light emitting layer to recombine them, and the excitons fall to low energy to emit light. have.

In the light emitting device, the light emitting layer is formed of an inorganic material or an organic material, and is classified into an inorganic light emitting device and an organic light emitting device according to the type of the light emitting layer.

1 is a circuit diagram illustrating a part of a light emitting display device according to the related art. Referring to FIG. 1, four pixels are formed adjacent to each other, and each pixel includes a light emitting device OLED and a pixel circuit. The pixel circuit includes a first transistor M1, a second transistor M2, a third transistor M3, and a capacitor Cst. The first transistor M1, the second transistor M2, and the third transistor M3 each have a gate, a source, and a drain, and the capacitor Cst has a first electrode and a second electrode.

When the pixels have the same configuration and describe the pixel at the upper left, the first transistor M1 has a source connected to the power supply line Vdd, a drain connected to a source of the third transistor M3, and a gate It is connected to one node (A). The first node A is connected to the drain of the second transistor M2. The first transistor M1 supplies a current corresponding to the data signal to the light emitting device OLED.

The second transistor M2 has a source connected to the data line D1, a drain connected to the first node A, and a gate connected to the first scan line S1. The data signal is transferred to the first node A according to the scan signal applied to the gate.

The third transistor M3 has a source connected to the drain of the first transistor M1, a drain connected to the anode electrode of the light emitting device OLED, and a gate connected to the light emission control line E1 to provide a light emission control signal. Answer. Accordingly, light emission of the light emitting device OLED is controlled by controlling the flow of current flowing from the first transistor M1 to the light emitting device OLED according to the light emission control signal.

In the capacitor Cst, a first electrode is connected to the power supply line Vdd and a second electrode is connected to the first node A. Then, the charge is charged according to the data signal, and the charged charge is applied to the gate of the first transistor M1 for one frame time to maintain the operation of the first transistor M1 for one frame time. Let's do it.

However, a pixel employed in the conventional light emitting display device requires a plurality of pixel circuits in order to emit light of a plurality of light emitting devices by connecting one light emitting device OLED to one pixel circuit, thereby implementing a pixel circuit. There is a problem that the number of.

In addition, since one light emission control line is connected to the pixel row, the aperture ratio of the light emitting display device by the light emission control line is lowered.

Accordingly, the present invention has been made to solve the problems of the prior art, and an object of the present invention is to connect a plurality of light emitting devices to one pixel circuit, thereby reducing the number of elements of the light emitting display device, increasing the aperture ratio, and providing a plurality of light emitting devices. The present invention relates to a pixel and a light emitting display device which minimizes color separation by adjusting a light emitting time of the light emitting device.

As a technical means for achieving the above object, a first aspect of the present invention is connected to the first to fourth light emitting elements, the first to fourth light emitting elements in common, and for driving the first to fourth light emitting elements. And a switching circuit connected between the driving circuit and the first to fourth light emitting elements and the driving circuit to sequentially control the driving of the first to fourth light emitting elements, wherein the driving circuit is connected to the data signal. A first transistor through which a current flows by the first power source according to a corresponding first voltage, a second transistor receiving a first scan signal, and selectively transferring the data signal to the first transistor; A capacitor for storing for a predetermined time, the third transistor receiving a second scan signal and selectively connecting the first transistor to a diode, and A fourth transistor for initializing the capacitor by transmitting an initialization signal according to the second scan signal, a fifth transistor for selectively transmitting the first power to the first transistor according to the first light emission control signal, and the second transistor A sixth transistor for selectively transferring the first power to the first transistor according to an emission control signal, a seventh transistor for selectively transferring the first power to the first transistor according to the third emission control signal and the According to a fourth emission control signal, a pixel including an eighth transistor configured to selectively transfer the first power source to the first transistor is provided.

A second aspect of the invention, the image display unit including a plurality of pixels; And a data driver for transmitting a data signal to the pixel and a scan driver for transmitting a scan signal and a light emission control signal to the pixel, wherein the pixel provides a light emitting display device according to the first aspect.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

2 is a structural diagram illustrating a first embodiment of a light emitting display device according to the present invention. Referring to FIG. 2, the light emitting display device includes an image display unit 100, a data driver 200, and a scan driver 300.

The image display unit 100 includes a plurality of pixels 110, a plurality of scan lines S1, S2,... Sn-1, Sn arranged in a row direction, and a plurality of first emission control lines E11 arranged in a row direction. , E12, ... E1n-1, E1n, second emission control lines E21, E22, ... E2n-1, E2n, third emission control lines E31, E32, ... E3n-1, E3n), fourth emission control lines E41, E42, ... E4n-1, E4n, a plurality of data lines D1, D2, ... Dm-1, Dm arranged in the column direction and the pixel power source It includes a plurality of pixel power lines (not shown) for supplying the. The pixel power line is supplied with power from the outside to supply the pixel power.

The pixel circuit 110 transmits data signals transmitted from the data lines D1, D2, ..., Dm-1, Dm by the scanning lines S1, S2, ... Sn-1, Sn and the scanning signals. The pixel circuit 110 generates a current corresponding to the data signal, and the first emission control lines E11, E12, ... E1n-1, E1n to the fourth emission control lines E41, E42,. An electric current is transmitted to the light emitting element OLED by the light emission control signal transmitted through the E4n-1 and E4n to represent an image.

The data driver 200 is connected to the data lines D1, D2,... Dm-1, Dm to transmit data signals to the image display unit 100. The data driver 200 sequentially transmits red and green, green and blue, or blue and red data in one data line.

The scan driver 300 is configured on the side of the image display unit 100, and includes a plurality of scan lines S1, S2, ... Sn-1, Sn and a plurality of first emission control lines E11, E12, ... It is connected to the E1n-1, E1n to fourth emission control lines E41, E42, ... E4n-1, E4n to transfer the scan signal and the emission control signal to the image display unit 100.

3 is a structural diagram illustrating a second embodiment of a light emitting display device according to the present invention. Referring to FIG. 3, the light emitting display device includes an image display unit 100, a data driver 200, and a scan driver 300.

The image display unit 100 includes a plurality of pixels 110 including light emitting elements OLED, four light emitting elements OLED connected to one pixel circuit 110, and a plurality of scan lines S0 and row lines arranged in a row direction. S1, S2, ... Sn-1, Sn, a plurality of first emission control lines E11, E12, ... E1n-1, E1n arranged in the row direction, second emission control lines E21, E22 , ... E2n-1, E2n), third emission control lines E31, E32, ... E3n-1, E3n, fourth emission control lines E41, E42, ... E4n-1, E4n And a plurality of data lines D1, D2, ..., Dm-1, Dm arranged in the column direction, and a plurality of pixel power lines (not shown) for supplying pixel power. The pixel power line is supplied with power from the outside to supply the pixel power.

The pixel 110 receives the scan signal and the scan signal of the previous line through the scan lines S1, S2, Sn-1, Sn, and the data lines D1, D2, Dm-1. And a current corresponding to the data signal is generated by the data signal transmitted from Dm), and the first emission control lines E11, E12, ... E1n-1, E1n to the fourth emission control lines E41, E42, ... The driving current is transmitted to the light emitting element OLED by the light emission control signal transmitted through E4n-1, E4n to represent an image.

The data driver 200 is connected to the data lines D1, D2,... Dm-1, Dm to transmit data signals to the image display unit 100. The data driver 200 sequentially transmits red and green, green and blue, or blue and red data in one data line.

The scan driver 300 is configured on the side of the image display unit 100, and includes a plurality of scan lines S1, S2, ... Sn-1, Sn and a plurality of first emission control lines E11, E12, ... It is connected to the E1n-1, E1n to fourth emission control lines E41, E42, ... E4n-1, E4n to transfer the scan signal and the emission control signal to the image display unit 100.

4 is a circuit diagram illustrating an embodiment of a pixel employed in the light emitting display device of FIG. 2. Referring to FIG. 4, the pixel 110 includes a light emitting device and a pixel circuit, and four light emitting devices OLED are connected to one pixel circuit. Each pixel circuit 110 is divided into a driving circuit 111, a first switching circuit 112, and a second switching circuit 113.

The driving circuit 111 includes first and second transistors M1 and M2 and a capacitor Cst, and the first switching circuit 112 includes third and fourth transistors M3 and M3. The second switching circuit 113 includes fifth and sixth transistors M5 and M6.

The first to sixth transistors M1 to M6 have a source, a drain, and a gate, and the source and the drain of each transistor have no physical difference, and thus may be referred to as a first electrode and a second electrode. In addition, the capacitor Cst includes a first electrode and a second electrode. Four light emitting devices are referred to as first to fourth light emitting devices OLED1 to OLED4.

The first transistor M1 has a source connected to the pixel power line Vdd, a drain connected to the first node A, and a gate connected to the second node B, and drained from the source according to a voltage applied to the gate. The amount of current of the current flowing in the direction is determined.

The second transistor M2 has a source connected to the data line Dm, a drain connected to the second node B, and a gate connected to the scan line Sn to be turned on by the scan signal Sn transmitted through the scan line. An off operation is performed to transmit a data signal to the second node B. FIG.

The third transistor M3 has a source connected to the first node A, a drain connected to the first light emitting device OLED1, and a gate connected to the first light emission control line E1n, so that the first light emission control line E1n The on-off operation is performed by the first light emission control signal e1n transmitted through the C1, so that a current flowing in the first node A flows to the first light emitting device OLED1.

The fourth transistor M4 has a source connected to the first node A, a drain connected to the second light emitting device OLED2, and a gate connected to the second light emission control line E2n, and through the second light emission control line. The on-off operation is performed by the received second light emission control signal so that a current flowing in the first node A flows to the second light emitting device OLED2.

The fifth transistor M5 has a source connected to the first node A, a drain connected to the third light emitting device OLED3, and a gate connected to the third light emission control line E3n, so that the third light emission control line E3n The third light emitting device OLED3 emits light by transferring a current flowing from the source of the fifth transistor M5 to the drain according to the third light emitting control signal e3n transmitted through the third light emitting device OLED3. .

The sixth transistor M6 has a source connected to the first node A, a drain connected to the fourth light emitting device OLED4, and a gate connected to the third emission control line E3n, so that the third emission control line E3n The fourth light emitting element OLED4 emits light by transferring a current flowing from the source to the drain of the sixth transistor M6 to the fourth light emitting element OLED4 according to the third light emitting control signal e3n transmitted through .

FIG. 5 is a waveform diagram illustrating waveforms of signals transmitted to a light emitting display device employing the pixel illustrated in FIG. 4. Referring to FIG. 5, the pixel operates by the scan signal sn, the data signal, and the first to fourth light emission control signals e4n. The scan signal sn and the first to fourth light emission control signals e4n are periodic signals, and the first to fourth sections T1 to T4 are repeated.

In the first section T1, the first emission control signal e1n is in the low state, in the second section T2, the fourth emission control signal e4n is in the low state, and in the third section T3, the third emission is in the third state. The control signal e3n is in a low state. In the fourth section T4, the fourth emission control signal e4n is in a low state, and the scan signal sn is temporarily in a low state at the start of each section.

In the first period T1, the second transistor M2 is turned on by the scan signal sn, and the data signal is transmitted to the second node B through the second transistor M2. The pixel power is transferred to the first electrode of the capacitor Cst, and the capacitor Cst stores a voltage value corresponding to the difference Vdd-Vdata between the pixel power and the data signal.

The capacitor Cst applies a voltage corresponding to the difference between the pixel power supply and the data signal to the gate of the first transistor M1 through the second node B so that the first transistor M1 receives a current corresponding to the data signal. Flow to the first node (A).

The third transistor M3 is turned on by the first light emission control signal e1n so that a current flows to the first light emitting device OLED1.

In the second period T2, a voltage value corresponding to a difference between the pixel power supply and the data signal is stored in the capacitor Cst by the scan signal sn and the data signal, so that the first transistor M1 corresponds to a current corresponding to the data signal. To flow to the first node (A). The fourth transistor M4 is turned on by the second light emission control signal e2n, and current flows to the second light emitting device OLED2.

The third section T3 and the fourth section T4 generate current in the same manner as the first section T1 and the second section T2, and allow the current to flow to the first node A. In the period T3, the current flows to the third light emitting element OLED3 by the third emission control signal, and in the fourth period T4, the current flows to the fourth light emitting element OLED4 by the fourth emission control signal. do.

Therefore, the first to fourth light emitting elements OLED4 sequentially emit light.

6 is a circuit diagram illustrating a first embodiment of a pixel employed in the light emitting display device of FIG. 3. Referring to FIG. 6, the pixel 110 includes a light emitting device and a pixel circuit, and four light emitting devices OLED are connected to one pixel circuit. Each pixel circuit 110 is divided into a driving circuit 111, a first switching circuit 112, and a second switching circuit 113.

The driving circuit 111 includes first to eighth transistors M1 to M8 and a capacitor Cst, and the first switching circuit 112 includes ninth and tenth transistors M9 and M10. The second switching circuit 113 includes eleventh and twelfth transistors M11 and M12, each transistor having a source, a drain, and a gate. The capacitor Cst includes a first electrode and a second electrode.

The drain and the source of the first to twelfth transistors M1 to M12 are not physically different, and the source and the drain may be referred to as first and second electrodes, respectively.

The first transistor M1 has a drain connected to the first node A, a source connected to the second node B, a gate connected to the third node C, and according to the voltage of the third node C. A current flows from the second node B to the first node A. FIG.

The second transistor M2 has a source connected to the data line Dm, a drain connected to the second node B, and a gate connected to the first scan line Sn, and transferred through the first scan line Sn. The switching operation is performed by one scan signal sn to selectively transfer the data signal transmitted through the data line Dm to the second node B.

In the third transistor M3, a source is connected to the first node A, a drain is connected to the third node C, and a gate is connected to the first scan line Sn to be transferred through the first scan line Sn. The first transistor M1 is diode-connected by equalizing the potentials of the first node A and the third node C by the first scan signal sn.

In the fourth transistor M4, a source and a gate are connected to the second scan line Sn- 1, and a drain is connected to the third node C to transmit an initialization signal to the third node C. The initialization signal is a second scan signal sn-1 input to a row one row ahead of the row into which the first scan signal sn is input and is received through the second scan line Sn-1. The second scan line Sn-1 refers to a scan line connected to a row one row before the row to which the first scan line Sn is connected.

In the fifth transistor M5, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the first emission control line E1n so that the first emission control line E1n is connected. The pixel power is selectively transferred to the second node B by the first emission control signal e1n transmitted through the second emission signal.

The sixth transistor M6 has a source connected to the pixel power line Vdd, a drain connected to the second node B, and a gate connected to the second emission control line E2n, so that the second emission control line E2n The pixel power is selectively transferred to the second node B by the second emission control signal e2n transmitted through the second emission control signal e2n.

In the seventh transistor M7, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the third emission control line E3n so that the third emission control line E3n is connected. The pixel power is selectively transmitted to the second node B by the third emission control signal e3n transmitted through the second emission control signal e3n.

In the eighth transistor M8, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the fourth emission control line e4n to form a fourth emission control line e4n. The pixel power is selectively transferred to the second node B by the fourth emission control signal e4n transmitted through the second emission control signal e4n.

The ninth transistor M9 has a source connected to the first node A, a drain connected to the first light emitting device OLED1, and a gate connected to the first light emission control line E1n, so that the first light emission control line ( The first light emitting device OLED1 emits light by causing a current flowing through the first node A to flow through the first light emitting device OLED1 by the first light emission control signal e1n transmitted through E1n.

The tenth transistor M10 has a source connected to the first node A, a drain connected to the second light emitting device OLED2, and a gate connected to the second light emission control line E2n, so that the second light emission control line ( The second light emitting device OLED2 emits light by allowing a current flowing through the first node A to flow through the second light emitting device OLED2 by the second light emission control signal e2n transmitted through the E2n.

The eleventh transistor M11 has a source connected to the first node A, a drain connected to the third light emitting device OLED3, and a gate connected to the third light emitting control line E3n, so that the third light emitting control line ( The third light emitting device OLED3 emits light by causing a current flowing through the first node A to flow through the third light emitting device OLED3 by the third light emission control signal e3n transmitted through E3n.

The twelfth transistor M12 has a source connected to the first node A, a drain connected to the fourth light emitting device OLED4, and a gate connected to the fourth light emitting control line e4n, so that the fourth light emitting control line ( The fourth light emitting device OLED4 emits light by causing a current flowing through the fourth node A to flow through the fourth light emitting device OLED4 by the fourth light emission control signal e4n transmitted through the e4n.

In the capacitor Cst, the first electrode is connected to the pixel power line Vdd, the second electrode is connected to the third node C, and the initialization signal is transmitted to the third node C through the fourth transistor M4. The capacitor Cst is initialized by storing the voltage corresponding to the data signal and transferring the voltage to the third node C to maintain the gate voltage of the first transistor M1 for a predetermined period of time.

FIG. 7 is a circuit diagram illustrating a second embodiment of a pixel employed in the light emitting display device of FIG. 3. Referring to FIG. 7, the pixel 110 includes a light emitting device and a pixel circuit, and four light emitting devices OLED are connected to one pixel circuit. Each pixel circuit 110 is divided into a driving circuit 111, a first switching circuit 112, and a second switching circuit 113.

The driving circuit 111 includes first to eighth transistors M1 to M8 and a capacitor Cst, and the first switching circuit 112 includes ninth and tenth transistors M9 and M10. The second switching circuit 113 includes eleventh and twelfth transistors M11 and M12, each transistor having a source, a drain, and a gate. The capacitor Cst includes a first electrode and a second electrode.

The drain and the source of the first to twelfth transistors M1 to M12 are not physically different, and the source and the drain may be referred to as first and second electrodes, respectively.

The first transistor M1 has a drain connected to the first node A, a source connected to the second node B, a gate connected to the third node C, and according to the voltage of the third node C. A current flows from the second node B to the first node A. FIG.

In the second transistor M2, a source is connected to the data line Dm, a drain is connected to the first node A, and a gate is connected to the first scan line Sn to be transferred through the first scan line Sn. The switching operation is performed by the first scan signal sn to selectively transmit the data signal transmitted through the data line Dm to the first node A. FIG.

The third transistor M3 has a source connected to the second node B, a drain connected to the third node B, a gate connected to the first scan line Sn, and transferred through the first scan line Sn. The first transistor M1 is diode-connected by equalizing the potentials of the second node B and the third node C by the first scan signal sn.

The fourth transistor M4 has a source connected to the anode of the light emitting device, a drain connected to the third node C, and a gate connected to the second scan line Sn-1, so that the second scan signal sn-1 Accordingly, the voltage when the current does not flow to the first to fourth light emitting elements OLED1 to OLED4 is transmitted to the third node C. At this time, the voltage transmitted to the third node according to the second scan signal sn-1 is used as an initialization signal for initializing the capacitor Cst.

In the fifth transistor M5, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the first emission control line E1n so that the first emission control line E1n is connected. The pixel power is selectively transferred to the second node B by the first emission control signal e1n transmitted through the second emission signal.

The sixth transistor M6 has a source connected to the pixel power line Vdd, a drain connected to the second node B, and a gate connected to the second emission control line E2n, so that the second emission control line E2n The pixel power is selectively transferred to the second node B by the second emission control signal e2n transmitted through the second emission control signal e2n.

In the seventh transistor M7, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the third emission control line E3n so that the third emission control line E3n is connected. The pixel power is selectively transmitted to the second node B by the third emission control signal e3n transmitted through the second emission control signal e3n.

In the eighth transistor M8, a source is connected to the pixel power line Vdd, a drain is connected to the second node B, and a gate is connected to the fourth emission control line e4n to form a fourth emission control line e4n. The pixel power is selectively transferred to the second node B by the fourth emission control signal e4n transmitted through the second emission control signal e4n.

The ninth transistor M9 has a source connected to the first node A, a drain connected to the first light emitting device OLED1, and a gate connected to the first light emission control line E1n, so that the first light emission control line ( The first light emitting device OLED1 emits light by causing a current flowing through the first node A to flow through the first light emitting device OLED1 by the first light emission control signal e1n transmitted through E1n.

The tenth transistor M10 has a source connected to the first node A, a drain connected to the second light emitting device OLED2, and a gate connected to the second light emission control line E2n, so that the second light emission control line ( The second light emitting device OLED2 emits light by allowing a current flowing through the first node A to flow through the second light emitting device OLED2 by the second light emission control signal e2n transmitted through the E2n.

The eleventh transistor M11 has a source connected to the first node A, a drain connected to the third light emitting device OLED3, and a gate connected to the third light emitting control line E3n, so that the third light emitting control line ( The third light emitting device OLED3 emits light by causing a current flowing through the first node A to flow through the third light emitting device OLED3 by the third light emission control signal e3n transmitted through E3n.

The twelfth transistor M12 has a source connected to the first node A, a drain connected to the fourth light emitting device OLED4, and a gate connected to the fourth light emitting control line e4n, so that the fourth light emitting control line ( The fourth light emitting device OLED4 emits light by causing a current flowing through the fourth node A to flow through the fourth light emitting device OLED4 by the fourth light emission control signal e4n transmitted through the e4n.

In the capacitor Cst, the first electrode is connected to the pixel power line Vdd, the second electrode is connected to the third node C, and the initialization signal is transmitted to the third node C through the fourth transistor M4. The capacitor Cst is initialized by storing the voltage corresponding to the data signal and transferring the voltage to the third node C to maintain the gate voltage of the first transistor M1 for a predetermined period of time.

8 is a waveform diagram illustrating waveforms of signals transmitted to a light emitting display device employing the pixels illustrated in FIGS. 6 and 7. Referring to FIG. 8, the pixel operates by the first and second scan signals sn and sn -1, the data signal, and the first to fourth emission control signals e1n to e4n. The first and second scan signals sn and sn-1 and the first to fourth emission control signals e1n to e4n are periodic signals, and the first to fourth sections T1 to T4 are repeated.

In the first section T1, the first emission control signal e1n is in a low state, in the second section T2, the third emission control signal e3n is in a low state, and in the third section T3, the second emission is in the second state. The control signal e2n is in a low state, and the fourth emission control signal e4n is in a low state in the fourth section T3. The second scan signal sn-1 is a line scan signal before the first scan signal sn, and the first scan signal sn and the second scan signal sn-1 are sequentially at the start of each section. It will go low for a while.

In the first section T1, the fourth transistor M4 is first turned on by the second scan signal sn-1, and the initialization signal is transferred to the capacitor Cst through the fourth transistor M4. Transferred to initialize the capacitor Cst. The second transistor M2 and the third transistor M3 are turned on by the first scan signal sn, so that the potentials of the second node B and the third node C are equal to each other. M1 is diode-connected, and the data signal is transmitted to the second node B through the second transistor M2. Therefore, the data signal is transmitted to the second electrode of the capacitor Cst through the second transistor M2, the first transistor M1, and the third transistor M3, and the capacitor Cst has the data signal and the threshold voltage. The voltage corresponding to the difference is transmitted to the second electrode of the capacitor Cst.

When the first light emission control signal e1n is changed to a low state and the low state is maintained for a predetermined period after the first scan signal sn is changed to the high state again, the first light emission control signal e1n is applied to the first light emission control signal e1n. As a result, the fifth transistor M5 and the ninth transistor M9 are turned on, and a voltage corresponding to Equation 1 below is applied between the gate and the source of the first transistor M1.

Where Vsg is the voltage between the source and gate electrode of the first transistor M1, Vdd is the pixel power supply voltage, Vdata is the voltage of the data signal, and Vth is the threshold voltage of the first transistor M1.

Then, the ninth transistor M9 is turned on so that a current flows to the light emitting device, and a current corresponding to Equation 2 below flows.

Where I _OLED is the current flowing through the light emitting device, Vgs is the voltage applied to the gate of the first transistor M1, Vdd is the voltage of the pixel power supply, Vth is the threshold voltage of the first transistor M1, and Vdata is the voltage of the data signal. Indicates.

Therefore, the current flowing to the first light emitting device OLED1 flows regardless of the threshold voltage of the first transistor M1.

In the second period T2, a voltage value corresponding to the difference between the pixel power supply and the data signal is stored in the capacitor Cst by the first and second scan signals sn and sn-1 and the data signal. The voltage corresponding to the first transistor M1 is transferred to the first transistor M1, and the seventh transistor M7 and the eleventh transistor M11 are turned on by the third emission control signal e3n, and Current flows to the third light emitting device OLED3.

The third section T3 and the fourth section T4 generate current in the same manner as the first section T1 and the second section T2, and in the third section T3, the second emission control signal e2n. As a result, the sixth transistor M6 is turned on and current flows to the second light emitting element OLED2. In the fourth section T4, the fourth transistor M6 is connected to the eighth transistor M8 by the fourth emission control signal e4n. The twelfth transistor M12 is turned on to allow current to flow to the fourth light emitting device OLED4.

Therefore, the first to fourth light emitting elements OLED4 sequentially emit light.

9A to 9D illustrate a light emission process in the light emitting display device of FIG. 3. In the image display unit 100, three pixel circuits are arranged vertically, and twelve light emitting elements are arranged in a 2 × 6 form. The upper pixel circuit may be referred to as the first pixel circuit, the central pixel circuit may be referred to as the second pixel circuit, and the lower pixel circuit may be referred to as the third pixel circuit. Referring to FIGS. 9A to 9D, four light emitting devices sequentially emit light during one frame time during which all light emitting devices OLEDs connected to one pixel circuit emit light. It can be divided into sub-fields. And,

The first light emitting device OLED1 and the third light emitting device OLED3, which are connected to one of the two pixel circuits adjacent to one data line, receive the red data signal R, emit light, and emit the second light. The device OLED2 and the fourth light emitting device OLED4 receive the green data signal G and emit light. In addition, the first light emitting device OLED1 and the third light emitting device OLED3 connected to the other pixel circuit emit light by receiving the green data signal G, and the second light emitting device OLED2 and the fourth light emission. The device OLED4 receives the red data signal R and emits light. Then, red data and green data are alternately transmitted through one data line.

Accordingly, FIG. 9A shows the first field of the four subfields. As shown in FIG. 9A, the first pixel circuit and the third pixel circuit emit red light when the first light emitting device A receives red data and emits the second pixel. The circuit causes the first light emitting element to emit green data and emit light, thereby causing red and green to emit light simultaneously.

9B shows a second field, and the first and third pixel circuits emit light when the third light emitting device OLED3 receives green data, and the third light emitting device OLED3 emits red data. Receives light and emits red and green at the same time. In addition, the third and fourth fields shown in FIGS. 9C and 9D also cause red and green to emit light simultaneously.

Therefore, when only one color emits light in one subfield, color separation occurs. In each subfield, red and green light simultaneously emit light. In the entire image display unit, red, green, and blue light simultaneously appear in each subfield. The light emission can prevent color separation. In addition, the light emitting display device illustrated in FIG. 2 may operate as described above to prevent color separation.

While the preferred embodiments of the present invention have been described using specific terms, such description is for illustrative purposes only and it is understood that various changes and changes may be made without departing from the spirit and scope of the following claims. Should be done.

According to the pixel and the light emitting display device according to the present invention, as four light emitting devices are connected to one pixel circuit, the number of pixel circuits of the light emitting display device is reduced so that one pixel is connected to one light emitting device. As the number of elements is smaller and the number of pixel circuits is reduced, the number of scan, data lines, and light emission control lines that transmit signals is reduced, so that the size of the scan driver and the data driver can be reduced, thereby reducing unnecessary space. Will be. In addition, as the number of wirings decreases, the aperture ratio of the light emitting display device increases.

In addition, color separation of the light emitting display device can be prevented by adjusting the light emitting order of the light emitting devices.

Claims (10)

First to fourth light emitting devices; A driving circuit connected to the first to fourth light emitting elements in common and driving the first to fourth light emitting elements; And A switching circuit connected between the first to fourth light emitting devices and the driving circuit to sequentially control driving of the first to fourth light emitting devices, The drive circuit, A first transistor configured to flow a current by the first power supply according to a first voltage corresponding to the data signal; A second transistor receiving a first scan signal and selectively transferring the data signal to the first transistor; A capacitor for storing the first voltage for a predetermined time; The third transistor receiving a second scan signal to selectively diode-connect the first transistor; A fourth transistor configured to initialize the capacitor by transmitting an initialization signal according to the second scan signal; A fifth transistor for selectively transferring the first power to the first transistor according to the first light emission control signal; A sixth transistor for selectively transferring the first power source to the first transistor according to the second emission control signal; A seventh transistor configured to selectively transfer the first power supply to the first transistor according to the third light emission control signal; And And an eighth transistor configured to selectively transfer the first power supply to the first transistor according to the fourth emission control signal. The method of claim 1, The switching circuit includes: a first switching circuit for flowing the current by the first and second light emission control signals; And A pixel including a second switching circuit for flowing the current by the third and fourth light emission control signals; The method of claim 1, wherein the first to fourth emission control signals are periodic signals having first to fourth intervals. The first emission control signal and the second emission control signal maintain different states, and repeat the high state and the low state in each section, And the third emission control signal has the same state in the first section, the second section, and the third section and the fourth section. The method of claim 2, The first switching circuit, A ninth transistor configured to transfer the current to the first light emitting device by the first light emission control signal; And A tenth transistor configured to transfer the current to the second light emitting device by the second light emission control signal; The second switching circuit, An eleventh transistor transferring the current to the third light emitting device by the third light emission control signal; And And a twelfth transistor configured to transfer the current to the fourth light emitting device by the fourth light emission control signal. The method of claim 1, And the initialization signal is the second scan signal. The method of claim 1, And the initialization signal is a voltage applied to the light emitting device while no current flows through the light emitting device. An image display unit including a plurality of pixels; A data driver transferring a data signal to the pixel; And A scan driver for transmitting a scan signal and a light emission control signal to the pixel; The pixel is a light emitting display device according to any one of claims 1 to 6. The method of claim 7, wherein Adjacent first and second pixels that receive the data signal through the same data line among the plurality of pixels include a light emission sequence of a first light emitting element and a second light emitting element of a first pixel, and a first light emission of a second pixel. The light emission order of the device and the second light emitting device are implemented differently, and the light emission order of the third and fourth light emitting devices of the first pixel is different from that of the third and fourth light emitting devices of the second pixel. A light emitting display device implemented. The method of claim 7, wherein And the second scan signal is a scan signal generated before the first scan signal among a plurality of scan signals. The method of claim 7, wherein And the data driver sequentially outputs two data signals having different color information through one data line.

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