KR100709440B1 - A method for forming a capacitor of a semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a capacitor of a semiconductor device, in order to prevent a phenomenon in which the capacitance of the storage electrode is etched by the etching of the storage electrode during the planarization etching process to isolate the storage electrodes when the storage electrode of the concave type is formed. By forming an intermediate layer having an overhang on the upper side of the concave shape and forming a conductive layer for the storage electrode, and then removing the intermediate layer, the conductive layer for the storage electrode thereon is lifted off to realize device separation between the storage electrodes and thereby It is a technology that can reduce the production cost.

Description

A method for forming a capacitor of a semiconductor device

1A to 1G are cross-sectional views illustrating a method of forming a capacitor of a semiconductor device in accordance with an embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

11: semiconductor substrate 13: bit line

15 hard mask layer 17 insulating film spacer

19: storage electrode contact plug 21: interlayer insulating film

23 oxide film for storage electrode 25 intermediate layer

27: conductive layer for storage electrode 29: antireflection film

31 dielectric film 33 plate electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a capacitor of a semiconductor device, and in particular, a process of separating a storage electrode after formation of a storage electrode in a process of forming a capacitor of a concave type, referred to as chemical mechanical polishing (hereinafter referred to as CMP). ) To prevent capacitance reduction.

As semiconductor devices are highly integrated and cell size is reduced, it is difficult to secure a capacitance that is proportional to the surface area of the storage electrode.

In particular, in a DRAM device having a unit cell composed of one MOS transistor and a capacitor, it is important to reduce the area while increasing the capacitance of a capacitor, which occupies a large area on a chip, which is an important factor for high integration of the DRAM device.

Thus, the capacitance C of the capacitor represented by (εo × εr × A) / T (where, εo is the dielectric constant of the dielectric, εr is the dielectric constant of the dielectric film, A is the area of the storage electrode and T is the thickness of the dielectric film). In order to increase the dielectric constant, a material having a high dielectric constant was used as the dielectric film, a thin dielectric film was formed, or the surface area of the storage electrode was increased.

In the conventional concave-type capacitor forming process, a CMP process for forming storage electrodes and separating them is performed.

However, the CMP process is expensive and difficult to secure process uniformity.

In other words, in the CMP process for separating the entire die of the wafer, oxide loss for the storage electrode in a specific region is increased, resulting in a decrease in the height of the storage electrode.

As described above, the method of forming a capacitor of a semiconductor device in the related art has a problem of reducing the capacitance of the capacitor due to the decrease in the height of the storage electrode.

 The present invention to solve the problems of the prior art as described above,

After forming the storage electrode oxide layer to form the storage electrode, an intermediate layer having an overhang is formed on the upper side, and the storage electrode region is etched by an anisotropic etching method, and then removed by a wet method to damage the storage electrode oxide film. It is an object of the present invention to provide a method of forming a capacitor of a semiconductor device to minimize the reduction of capacitance.

Capacitor forming method of a semiconductor device according to the present invention for achieving the above object,
Forming an interlayer insulating film having a bit line and a storage electrode contact plug on the semiconductor substrate;
Forming an oxide film for a storage electrode having a contact hole in a concave shape so as to expose the storage electrode contact plug on an entire surface thereof;
Forming an intermediate layer having an overhang on the entire surface,
Forming a conductive layer for a storage electrode on the entire surface;
Forming an anti-reflection film to fill the concave contact holes;
Exposing the intermediate layer by an anisotropic etching process using the anti-reflection film as an etching prevention film;
Lift-off a conductive layer for a storage electrode on the intermediate layer by removing the exposed intermediate layer;
And removing the anti-reflection film to separate and form a concave-type storage electrode;
The intermediate layer is formed of a PE-TEOS oxide film,

The intermediate layer removing process may be performed by a wet method using an etching selectivity difference between the storage electrode contact plug adjacent to the intermediate layer, the oxide layer for the storage electrode, and the conductive layer for the storage electrode.

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Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1A to 1G are cross-sectional views illustrating a method of forming a capacitor of a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 1A, an isolation layer (not shown) and a word line (not shown) are formed on the semiconductor substrate 11, and a lower insulating layer (not shown) is formed to planarize an upper portion thereof.

In this case, the lower insulating layer is formed of a device isolation insulating film, a gate oxide film, a gate electrode (not shown) or a bit line (not shown), and the B.P.G. (BPSG: Boro Phospho Silicate Glass, hereinafter BPSG)

In addition, the bit line 13 having the hard mask layer 15 is formed.

An insulating layer spacer 17 is formed on the sidewalls of the bit line 13. In this case, the insulating film spacers 17 are formed by forming an insulating film on the entire surface and anisotropically etching them.

Next, a storage electrode contact plug 19 connected to the active region of the semiconductor substrate 11 is formed.

An interlayer insulating film 21 covering the entire surface is formed and planarized and etched to expose the hard mask layer 15 and to fill the gaps between the bit lines 13.

Referring to FIG. 1B, the storage electrode oxide film 23 is formed on the entire surface to have a predetermined thickness, and the contact hole 50 exposing the storage electrode contact plug 19 is formed.

In this case, the contact hole 50 is formed only in a portion where the storage electrode is to be formed by a photolithography process using a storage electrode contact mask (not shown). In addition, the contact hole 50 is formed in a concave shape due to a deep step.

Referring to FIG. 1C, an intermediate layer 25 is formed on an entire surface including the contact hole 50 using an oxide film having a poor step coverage such as PE-TEOS.

In this case, the intermediate layer 25 is formed so as to cause an overhang on the storage electrode oxide layer 23 by controlling process variables such as deposition temperature and deposition pressure, thereby forming the intermediate layer 25 on the upper surface of the oxide layer for the storage electrode. do.
Then, the conductive layer 27 for the storage electrode is formed to have a predetermined thickness on the entire surface.

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Referring to FIG. 1D, an antireflection film 29 filling the contact hole 50 is formed.

Referring to FIG. 1E, the entire surface is etched by an anisotropy etch process using the anti-reflection film 29 as an etch stop layer. At this time, the overhang portion is etched faster than other portions due to the etching characteristics and exposes the intermediate layer 25.

Referring to FIG. 1F, the intermediate layer 25 is removed by a wet method to lift off the conductive layer 27 for a storage electrode thereon.

The anti-reflection film 29 is removed to form a concave-type storage electrode as the conductive layer 27 for the storage electrode.

Here, the removal process of the intermediate layer 25 and the anti-reflection film 29 is an etching selectivity of the peripheral layer, that is, the storage electrode contact plug 19, the storage electrode oxide film 23 and the storage electrode conductive layer 27. This is done using the difference.

Referring to FIG. 1G, a dielectric film 31 is formed over the entire surface, and a conductive layer 33 for plate electrodes, which is an upper electrode, is formed thereon.

As described above, in the method of forming a capacitor of a semiconductor device according to the present invention, a concave-type storage electrode oxide film exposing the storage electrode contact plug is formed and the upper surface of the storage electrode oxide film except the concave shape is formed. A CMP is formed by forming an intermediate layer, forming an overhang, forming a conductive layer for a storage electrode, and then forming a conductive layer, and then exposing the side surface of the planarized intermediate layer by a subsequent etching process and lifting it to separate the storage electrode and the storage electrode. By eliminating the process cost and preventing the surface area degradation of the storage electrode due to the CMP process, it is possible to improve the characteristics and reliability of the semiconductor device and to secure a capacitance of a predetermined size.

Claims (3)

Forming an interlayer insulating film having a bit line and a storage electrode contact plug on the semiconductor substrate; Forming an oxide film for a storage electrode having a contact hole in a concave shape so as to expose the storage electrode contact plug on an entire surface thereof; Forming an intermediate layer having an overhang on the entire surface, Forming a conductive layer for a storage electrode on the entire surface; Forming an anti-reflection film to fill the concave contact holes; Exposing the intermediate layer by an anisotropic etching process using the anti-reflection film as an etching prevention film; Lift-off a conductive layer for a storage electrode on the intermediate layer by removing the exposed intermediate layer; And removing the anti-reflection film to separate and form a concave-type storage electrode. The method of claim 1, Wherein the intermediate layer is formed of a PE-TEOS oxide film. The method of claim 1, And removing the intermediate layer by a wet method using an etching selectivity difference between the storage electrode contact plug adjacent to the intermediate layer, the oxide layer for the storage electrode, and the conductive layer for the storage electrode.

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