KR100703023B1 - Multilayer wiring board, method for producing the same, and method for producing fiber reinforced resin board - Google Patents

Abstract

The multilayer wiring board X1 of the present invention has a core portion 100 and an extracore wiring portion 30. The core portion 100 is formed of a carbon fiber reinforcement portion 10 made of a carbon fiber material 11 and a resin composition 12, and at least one insulating layer 21 and 10 to 10 containing a glass fiber material 21a. The core core wiring part 20 which has a laminated structure by the wiring pattern 22 which consists of a conductor which has the elasticity modulus of 40 GPa, and is joined to the carbon fiber reinforcement part 10 is included. The non-core wiring part 30 has a laminated structure by at least one insulating layer 31 and the wiring pattern 32, and is joined to the core part 100 by the in-core wiring part 20.

Multilayer wiring board, glass fiber material, carbon fiber material

Description

Multi-layered wiring board, its manufacturing method, and manufacturing method of fiber reinforced resin substrate {MULTILAYER WIRING BOARD, METHOD FOR PRODUCING THE SAME, AND METHOD FOR PRODUCING FIBER REINFORCED RESIN BOARD}

The present invention relates to a multilayer wiring board that can be applied to a semiconductor chip mounting substrate, a motherboard, a substrate for a probe card, a manufacturing method thereof, and a manufacturing method of a fiber reinforced resin substrate that can be used to manufacture the multilayer wiring board. will be.

In recent years, with the demand for high performance and miniaturization of electronic devices, high-density mounting of electronic parts to be assembled in electronic devices is rapidly progressing. In order to cope with such high density mounting, semiconductor chips are often surface-mounted, i.e., flip-chip mounted, on a wiring board in a bare chip state.

As a wiring board for mounting a semiconductor chip, there is a tendency that a multilayer wiring board suitable for achieving high density of wirings is adopted with the multiple pinning of the semiconductor chip. A semiconductor package having a mounting structure by such a semiconductor chip and a multilayer wiring board is also mounted on a motherboard in order to form part of a predetermined electronic circuit. Also for a motherboard, the multilayer wiring board suitable for achieving high density of wiring may be employ | adopted in some cases. On the other hand, when inspecting a semiconductor wafer in which a plurality of semiconductor elements are assembled or a single semiconductor chip, a multilayer wiring board is also adopted in the substrate of the probe card on which the wafer or the chip is mounted.

In flip chip mounting, the underfiller is generally filled with the gap between the wiring board and the semiconductor chip mounted thereon. In the state where the underfill agent is not filled, the reliability of the electrical connection between the wiring board and the semiconductor chip is often low due to the difference in the thermal expansion coefficient in the in-plane direction of the wiring board and the semiconductor chip. The thermal expansion rate of the in-plane direction in the semiconductor chip by a general semiconductor material is about 3.5 ppm / degreeC, The thermal expansion rate of the in-plane direction in the general wiring board which employs a glass epoxy board | substrate as a core substrate is 12-20 ppm / degreeC, both The difference in thermal expansion coefficient is relatively large. Therefore, a stress tends to generate | occur | produce in the electrical connection part between a wiring board and the semiconductor chip mounted in this by a change of environmental temperature or a change of environmental temperature. If a predetermined stress or more occurs at the electrical connection portion, cracks or peeling are likely to occur at the interface between the bump of the semiconductor chip at the connection portion and the electrode pad of the wiring board. The underfill agent filled between the semiconductor chip and the wiring board in flip chip mounting has a function of alleviating such stress generated at the electrical connection portion. This stress relaxation function suppresses cracking and peeling at the electrical connection portion, and secures connection reliability in flip chip mounting.

However, in the case where a large semiconductor chip is mounted on a wiring board, sufficient connection reliability cannot be secured only by an underfill stress relaxation function in many cases. This is because the absolute amount of the difference in thermal expansion of both caused by the difference in thermal expansion coefficient between the wiring board and the semiconductor chip increases as the chip becomes larger. The greater the difference in thermal expansion, the greater the stress generated at the electrical connections.

When a semiconductor wafer or a relatively large semiconductor chip is mounted on a probe card and tested while probing these functions, if the thermal expansion difference is large between the wafer or chip and the probe card, the electrode or probe of the wafer or chip The misalignment of the probe pins on the card increases. As a result, there may be a situation where an appropriate test cannot be executed.

As one of the methods for eliminating or reducing the above-described drawback caused by the difference in thermal expansion coefficient in the in-plane direction of the wiring board and the semiconductor chip, it is considered to employ a wiring board having a small thermal expansion rate. As a wiring board with a small thermal expansion rate, the wiring board which employ | adopts a low thermal expansion rate metal material as a core board | substrate is known conventionally. Generally as a metal material which comprises a metal core board | substrate, aluminum, copper, a silicon steel, nickel-iron alloy, CIC (clad material which has a laminated structure of copper / invar / copper), etc. are employ | adopted. However, since the metal material has a specific gravity large enough, the weight of the obtained wiring board becomes large, and it is not preferable to employ a metal core board. In addition, the metal core substrate is poor in workability due to a fine process and, for example, is often difficult to perforate or thin.

On the other hand, the technique using a carbon fiber material is known as a method of reducing the thermal expansion rate of a wiring board. Such a technique is disclosed in, for example, Japanese Patent Laid-Open No. 60-140898, Japanese Patent Laid-Open No. 11-40902, and Japanese Patent Laid-Open No. 2001-332828.

Japanese Laid-Open Patent Publication No. 60-140898 discloses a multilayer wiring board having a multilayer wiring structure in which a graphite layer, which is an insulating layer containing a carbon fiber sheet, and a copper wiring are alternately laminated. Since the thermal expansion rate of carbon fiber is generally about -1 to 1 ppm / degrees C (25 degreeC), since the graphite layer containing the carbon fiber sheet with such a small thermal expansion rate is provided, the thermal expansion rate of the multilayer wiring board Is small. However, according to Japanese Patent Laid-Open No. 60-140898, the multilayer wiring structure of such a wiring board is formed by a so-called batch lamination method. In the batch lamination method, it is known that it is difficult to form the fine multilayer wiring structure and also the electrode for external connection of a fine pitch. Therefore, the wiring board disclosed in Unexamined-Japanese-Patent No. 60-140898 is not suitable for mounting the semiconductor chip in which the electrode for external connection was formed in the fine pitch.

Japanese Unexamined Patent Publication No. 11-40902 discloses a multilayer wiring board having a multilayer wiring structure in which an insulating layer by a prepreg containing glass fiber and copper wiring are laminated on both surfaces of a core substrate containing a carbon fiber sheet as a substrate. Is disclosed. Since the core substrate contains a carbon fiber sheet, the thermal expansion coefficient of the wiring substrate is small. However, according to Japanese Patent Laid-Open No. 11-40902, the multilayer wiring structure of such a wiring board is formed by a batch lamination method. Therefore, the wiring board disclosed in Unexamined-Japanese-Patent No. 11-40902 is not suitable for mounting the semiconductor chip in which the electrode for external connection was formed in the fine pitch.

Japanese Laid-Open Patent Publication No. 2001-332828 discloses a wiring board having a laminated structure of an insulating layer and a copper wiring by a prepreg containing no glass fiber on both surfaces of a core substrate made of an insulating layer containing carbon fiber. have. However, the difference in the thermal expansion rate of the core substrate which consists of an insulating layer containing a carbon type fiber, and the prepreg which does not contain a glass fiber is considerably large. If the difference in thermal expansion rate is large, the core substrate and the insulating layer are easily peeled off. When the insulating layer is peeled off from the core substrate, an undue stress acts on the wiring formed on the insulating layer, and the wiring may be disconnected. Therefore, according to the technique disclosed in Unexamined-Japanese-Patent No. 2001-332828, it may be difficult to manufacture a wiring board with a small total thermal expansion rate appropriately.

[Initiation of invention]

The present invention has been invented in view of the above circumstances, and the present invention provides a multilayer wiring board that can have a fine wiring structure and can appropriately lower thermal expansion rate, a method of manufacturing the same, and a fiber reinforcement that can be used in the production of the multilayer wiring board. It aims at providing the manufacturing method of a resin substrate.

According to the first aspect of the present invention, a multilayer wiring board is provided. This multilayer wiring board has a laminated structure by the carbon fiber reinforcement part which consists of a carbon fiber material and a resin composition, and the wiring pattern which consists of a conductor which has the elasticity modulus of 10-40 GPa and at least 1 insulating layer containing a glass fiber material, The core part including the in-core wiring part joined to the carbon fiber reinforcement part, and the out-core wiring part having a laminated structure by at least one insulating layer and the wiring pattern, and joined to the core part by the in-core wiring part It has a laminated structure.

In the multilayer wiring board having such a structure, a fine wiring structure can be provided. The non-core wiring portion in the multilayer wiring board according to the first aspect of the present invention has a laminated structure of an insulating layer and a wiring pattern. This insulating layer does not contain fiber members, such as a carbon fiber material and a glass fiber material. Therefore, the extra-core wiring part can be formed by what is called a build-up method. It is known that a fine wiring pattern can be formed at a high density in the formation of a laminated wiring structure such as a multilayer wiring structure by the buildup method. Therefore, about the non-core wiring part in this invention, a fine wiring can be formed with high density by a buildup method.

Since fine wiring can be provided in the non-core wiring part, the electrode part for external connection can be provided in fine pitch in the uppermost or outermost wiring pattern of the non-core wiring part. In this case, with respect to the multilayer wiring board according to the first aspect of the present invention, it is possible to mount or mount a semiconductor chip in which electrodes for external connection are formed at a fine pitch. As described above, since the multilayer wiring board according to the first aspect of the present invention can be provided with fine wirings, it is possible to appropriately cope with multi-pinning of semiconductor chips, that is, high density mounting.

In the multilayer wiring board according to the first aspect of the present invention, it is possible to appropriately lower the thermal expansion coefficient. Specifically, according to the multilayer wiring board of the first aspect, the entire multilayer wiring board is achieved while achieving a good bonding state between the carbon fiber reinforcement part and the intercore wiring part, and between the intracore wiring part and the extracore wiring part. Net thermal expansion coefficient can be reduced suitably.

The carbon fiber reinforcement part contains a carbon fiber material as a base material. Examples of the carbon fiber material include carbon fiber mesh, carbon fiber fabric, carbon fiber nonwoven fabric, and chopped fiber type carbon fiber. In addition, the carbon fiber material includes carbon fibers having a unidirectional carbon fiber sheet cross-lamination structure. The carbon fiber material generally exhibits a small thermal expansion coefficient of about -1 to 1 ppm / ° C (25 ° C). Inside the carbon fiber reinforcement portion, a carbon fiber material having such a small coefficient of thermal expansion extends in the in-plane direction of the resin portion. Therefore, about the thermal expansion rate in the in-plane direction of a carbon fiber reinforcement part, it can set to a small extent with selection of the form of a carbon fiber material, and control of the content rate of the carbon fiber material in a carbon fiber reinforcement part. Since the thermal expansion rate in the in-plane direction throughout the multilayer wiring board strongly depends on the thermal expansion rate of the carbon fiber reinforcement portion, for example, by adjusting the content rate of the carbon fiber material in the carbon fiber reinforcement portion, the thermal expansion in the in-plane direction in the multilayer wiring substrate is controlled. The rate may be set to a value close to that of the semiconductor chip.

On the other hand, in the core wiring portion, the insulating layer contains a glass fiber material, and the conductor pattern is a conductor having an elastic modulus of 10 to 40 GPa. The modulus is the so-called longitudinal modulus (young's modulus). According to this structure, the thermal expansion rate of the carbon fiber reinforcement part mentioned above can be suitably adjusted with respect to the thermal expansion rate of the carbon fiber reinforcement part mentioned above and the thermal expansion rate of the said non-core wiring part mentioned above.

The glass fiber material has a larger coefficient of thermal expansion than the carbon fiber material and a smaller coefficient of thermal expansion than the resin material. In addition, the glass fiber material extends in the surface expansion direction of the insulating layer inside the insulating layer in the core wiring portion. Therefore, the thermal expansion rate of the insulating layer itself in the core wiring portion takes a value between the thermal expansion rate of the carbon fiber reinforced portion and the thermal expansion coefficient of the non-core wiring portion in which the insulating layer made of a resin material containing no base material occupies a significant volume. do.

Further, the wiring pattern in the core wiring portion is made of a conductor having a low elastic modulus of 10 to 40 GPa. Such a low-elasticity wiring pattern is soft enough to adequately harvest the thermal expansion of the insulating layer in the core wiring portion, and therefore, the thermal expansion rate of the insulating layer becomes dominant in the thermal expansion rate of the entire wiring portion in the core. Specifically, when the insulating layer to which the wiring pattern is bonded in the core wiring portion has a thermal expansion rate smaller than that of the wiring pattern, the expansion of the wiring pattern at the time of heating is small to the same extent as the thermal expansion of the insulating layer, and the insulating layer Does not unfairly promote thermal expansion Since the wiring pattern is sufficiently soft (low elasticity), expansion of the wiring pattern at the time of heating is suppressed by the insulating layer having a smaller thermal expansion rate. When the insulating layer to which the wiring pattern is bonded has a larger thermal expansion rate than the wiring pattern, the expansion of the wiring pattern at the time of heating is as large as the thermal expansion of the insulating layer and does not unduly prevent thermal expansion of the insulating layer. Since the wiring pattern is sufficiently soft (low elasticity), at the time of heating, the wiring pattern is harvested on the insulating layer which expands larger. As such, the wiring pattern of the conductor having a low modulus of elasticity of 10 to 40 GPa does not inhibit thermal expansion of the insulating layer, which occupies a significant volume in the core wiring portion. Therefore, the net thermal expansion rate of the inner core wiring portion is not unduly influenced by the thermal expansion ratio of the wiring pattern, and can be appropriately set with high degree of freedom between the thermal expansion coefficient of the carbon fiber reinforcement portion and the thermal expansion ratio of the non-core wiring portion.

In the multilayer wiring board according to the first aspect of the present invention, as described above, a carbon fiber reinforcement part having a low thermal expansion rate that sufficiently lowers the thermal expansion rate of the entire substrate and a fine wire can be formed, but the carbon fiber reinforcement part can be formed. In-core wiring section with a relatively large difference in thermal expansion rate, and in core where thermal expansion rate can be appropriately set so as to have a thermal expansion rate intermediate between the thermal expansion rate of the carbon fiber reinforced portion and the thermal expansion rate of the non-core wiring portion without being unduly influenced by the wiring pattern. A wiring part is provided. Therefore, according to the multilayer wiring board by a 1st side surface, the bonding state between a carbon fiber reinforcement part and an inner core wiring part, and the bonding state between an inner core wiring part and an outer core wiring part are maintaining a favorable multilayer, The net thermal expansion coefficient of the whole wiring board can be reduced.

Thus, according to the 1st aspect of this invention, a fine wiring structure can be provided in a multilayer wiring board, and low thermal expansion rate can be aimed suitably. Such a multi-layered wiring board is provided with an electrode portion for external connection at a fine pitch and is inherently suitable for mounting a semiconductor chip having a low thermal expansion rate.

According to the second aspect of the present invention, another multilayer wiring board is provided. The multilayer wiring board includes first and second core wiring portions each having a laminated structure by a wiring pattern composed of at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa, and a carbon fiber material And a core part made of a resin composition and including a carbon fiber reinforcement part interposed between the first core wiring part and the second core wiring part, and having a laminated structure by at least one insulating layer and a wiring pattern. The first non-core wiring portion joined to the core portion at the first core wiring portion, and the second bonded structure to the core portion at the second core wiring portion with a laminated structure formed by at least one insulating layer and wiring pattern. The laminated structure by the wiring part other than a core is provided.

The multilayer wiring board having such a configuration includes the configuration of the multilayer wiring board according to the first aspect of the present invention. Therefore, also with the 2nd side surface of this invention, the effect mentioned above regarding the 1st side surface is exhibited. In addition, the multilayer wiring board by a 2nd side has a symmetric laminated structure. Specifically, two intercore wiring portions are disposed on both sides of the carbon fiber reinforcement portion, and two non-core wiring portions are disposed on both sides of the carbon fiber reinforcement portion. Therefore, the configuration according to the second aspect is suitable for reducing the amount of warpage of the multilayer wiring board.

According to the third aspect of the present invention, another multilayer wiring board is provided. This multilayer wiring board is the glass interposed between the 1st and 2nd carbon fiber reinforcement part which consists of a carbon fiber material and a resin composition, the 1st carbon fiber reinforcement part which consists of a glass fiber material and a resin composition, respectively, and a 2nd carbon fiber reinforcement part, respectively. The first carbon fiber reinforcement part has a laminated structure by a wiring pattern composed of a fiber reinforcement part, at least one insulating layer containing a glass fiber material, and a conductor having an elastic modulus of 10 to 40 GPa, and on the opposite side to the glass fiber reinforcement part. On the side opposite to the glass fiber reinforcement part, a laminated structure is formed by a wiring pattern consisting of a first core wiring part bonded to each other, and at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa. A core portion including a second inner core wiring portion joined to the second carbon fiber reinforcement portion, and at least one insulating layer The first non-core wiring portion, which has a laminated structure by the wiring pattern and is joined to the core portion by the wiring portion in the first core, and has a laminated structure by at least one insulating layer and the wiring pattern, and further includes the wiring in the second core. The laminated structure by the 2nd non-core wiring part joined to the core part by the part is provided.

This wiring board includes the configuration of the wiring board according to the first aspect of the present invention. Therefore, also with the 3rd side surface of this invention, the effect mentioned above regarding the 1st side surface is exhibited. In addition, since the configuration according to the third aspect has a symmetrical laminated structure, it is suitable for reducing the amount of warpage of the wiring board.

Preferably, the carbon fiber reinforcement portion has a through-hole via extending in the thickness direction of the carbon fiber reinforcement portion and covered with an insulating material. According to this structure, the wiring pattern of the non-core wiring portion can be drawn out to the opposite side of the carbon fiber reinforcement portion via the through hole via. In addition, since the through hole via is covered with the insulating material, the insulation state of the carbon fiber material and the through hole via can be appropriately secured in the carbon fiber reinforcement portion.

Preferably, the conductor which comprises a wiring pattern is an electrolytic copper foil or a rolled copper foil. Electrolytic copper foil and rolled copper foil can be used suitably as a material which forms the wiring pattern which comprises an insulating layer and a laminated structure.

Preferably, the resin composition of the carbon fiber reinforcement portion contains a filler. In this case, it is preferable that the content rate of the filler in a resin composition is 5-30 vol%. The filler may be, for example, SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , AlN, ZrO ₂ , mullite, borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, quartz glass, or carbon black. Is done. When the resin composition of a carbon fiber reinforced part contains a filler, the thermal expansion rate isotropically falls in the resin composition. Therefore, the addition of the filler to the resin composition is often desirable for lowering the thermal expansion rate of the carbon fiber reinforcement portion.

Preferably, the carbon fiber material has a form of a mesh, a woven fabric, a nonwoven fabric, or a chopped fiber cloth, or a unidirectional carbon fiber sheet cross laminated structure. In the unidirectional carbon fiber sheet cross-lamination structure, a plurality of sheets in which a plurality of carbon fibers are paralleled in one direction are laminated so that parallel directions cross between adjacent sheets. Preferably, the content rate of the carbon fiber material in the carbon fiber reinforcement portion is 30 to 80 vol%. By selecting the form of the carbon fiber material and adjusting the content rate of the carbon fiber material in the carbon fiber reinforcement portion, the thermal expansion rate of the carbon fiber reinforcement portion can be adjusted.

According to the 4th aspect of this invention, the manufacturing method of a multilayer wiring board is provided. This manufacturing method comprises an annealing step for annealing the conductor foil for forming the first wiring pattern so that the elastic modulus of the conductor foil is 10 to 40 GPa, and an agent formed of at least one insulating layer containing the glass fiber material and the conductor foil. A process for forming a first wiring portion having a laminated structure by a single wiring pattern on a carbon fiber reinforcement portion made of a carbon fiber material and a resin composition, and having a laminated structure by at least one insulating layer and a second wiring pattern. The 2nd wiring part includes the process for forming on a 1st wiring part.

According to this method, the multilayer wiring board by a 1st side surface can be manufactured suitably. Therefore, according to the fourth aspect of the present invention, the same effect as described above with respect to the first aspect is obtained in the multilayer wiring board produced.

In the 4th aspect of this invention, Preferably, conductor foil is an electrolytic copper foil, In an annealing process, an electrolytic copper foil is annealed at 200-300 degreeC. This heating temperature range in the annealing step is suitable for lowering the modulus of elasticity of the electrolytic copper foil to 10 to 40 GPa. As conductor foil, a rolled copper foil can be used instead of an electrolytic copper foil. In this case, in a annealing process, a rolled copper foil is annealed at 150-250 degreeC. This heating temperature range in an annealing process is suitable for reducing the elasticity modulus of a rolled copper foil to 10-40 GPa before wiring formation.

In a fifth aspect of the present invention, there is provided another method of manufacturing a multilayer wiring board. This manufacturing method includes forming a first wiring part having a laminated structure by at least one insulating layer containing a glass fiber material and a first wiring pattern formed of a rolled copper foil on a carbon fiber reinforcement part made of a carbon fiber material and a resin composition. And a step including a heat treatment of 150 ° C. or higher, and a step for forming a second wiring part having a laminated structure by at least one insulating layer and a second wiring pattern on the first wiring part.

A rolled copper foil can significantly reduce elasticity modulus at the heating temperature of 150 degreeC or more. In addition, the heating temperature at the time of the press in the so-called batch lamination method at the time of forming a 1st wiring part-an internal wiring part in many cases exceeds 150 degreeC. Therefore, according to the 5th aspect of this invention, when using rolled copper foil as a conductor foil for forming the 1st wiring pattern of a 1st wiring part, even if it does not perform annealing process with respect to the conductor foil beforehand, 1st wiring In the section, a wiring pattern having a low modulus of 10 to 40 GPa can be formed.

According to the 6th aspect of this invention, the manufacturing method of a fiber reinforced resin substrate can be provided. This manufacturing method comprises a first carbon fiber reinforcement plate made of a carbon fiber material and a resin composition and having a first through hole, and a second through hole made of a carbon fiber material and a resin composition and corresponding to the first through hole. The resin composition in the resin material includes a lay-up process for interposing a resin material containing a resin composition between the second carbon fiber reinforcement plate, the first carbon fiber reinforcement plate, and the second carbon fiber reinforcement plate. The process for crimping | bonding through a resin material is included so that a 1st through-hole and a 2nd through-hole may be colored.

According to this method, the fiber reinforced resin substrate which can be used for manufacturing the core part containing a carbon fiber reinforced part, or a core substrate can be manufactured suitably. In the sixth aspect of the present invention, the resin composition enters into each of the through holes for through hole via formation provided in the two carbon fiber reinforced plates while extruding bubbles from the inside in the thickness direction of the laminated structure. Therefore, according to the sixth aspect of the present invention, the through hole can be appropriately colored while suppressing the mixing of bubbles into the through hole in the carbon fiber reinforcement part.

In the sixth aspect of the present invention, preferably, the resin material is a glass fiber reinforced plate made of a glass fiber and a resin composition. According to this structure, the board | substrate which has a laminated structure which consists of a carbon fiber reinforced part and a glass fiber reinforced part can be manufactured. The substrate can be suitably used for forming the core portion in the third aspect of the present invention.

1 is a partial cross-sectional view of a multilayer wiring board according to a first embodiment of the present invention.

2A and 2B are diagrams showing a part of the steps in the method for manufacturing the multilayer wiring board shown in FIG. 1.

3A-3C illustrate the process following FIG. 2B.

4A and 4B show a process following FIG. 3C.

5A to 5B show a process following FIG. 4B.

FIG. 6 shows a process following FIG. 5B. FIG.

7A to 7D are views showing a process following FIG. 6.

8 is a table describing the physical properties of various copper foils.

9 is a partial cross-sectional view of a multilayer wiring board according to a second embodiment of the present invention.

10A to 10D are diagrams illustrating a part of the steps in the method of manufacturing the multilayer wiring board shown in FIG. 9.

Best Mode for Carrying Out the Invention

1 is a partial cross-sectional view of a multilayer wiring board X1 according to the first embodiment of the present invention. The multilayer wiring board X1 is laminated on both sides of the core substrate 100 and the core substrate 100 having a laminated structure by a carbon fiber reinforced (CFR) portion 10 and two in-core wiring portions 20. It is provided with two build-up parts 30 formed. The core substrate 100 is provided with a through hole via 40 extending in the thickness direction thereof.

The CFR part 10 is processed from the board member of carbon fiber reinforced plastics (CFRP), and consists of the carbon fiber material 11, the resin material 12 hardened | cured by embracing this, and the insulated resin part 13.

In the present embodiment, the carbon fiber material 11 is a carbon fiber fabric woven by carbon fiber yarns in which carbon fibers are bundled, and is disposed so as to extend in the plane-expansion direction of the CFR portion 10. In the present embodiment, five carbon fiber materials 11 are laminated in the thickness direction and embedded in the resin material 12. As the carbon fiber material 11, a carbon fiber in the form of a carbon fiber mesh, a carbon fiber nonwoven fabric, or a chopped fiber may be used instead of the carbon fiber fabric. Alternatively, a carbon fiber having a unidirectional carbon fiber sheet cross laminated structure may be used as the carbon fiber material. The content rate of the carbon fiber material 11 in the CFR part 10 is 30 to 80 vol%. In this embodiment, the average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the CFR part 10 is set to -1 ppm / degreeC or more and less than 10 ppm / degreeC in this embodiment.

As the resin material 12 containing the carbon fiber material 11, for example, polysulfone, polyethersulfone, polyphenylsulfone, polyphthalamide, polyamideimide, polyketone, polyacetal, polyimide, polycarbonate Modified polyphenylene ether, polyphenylene oxide, polybutylene terephthalate, polyacrylate, polyphenylene sulfide, polyether ether ketone, tetrafluoroethylene, epoxy, cyanate ester, bismaleimide and the like. have.

The insulating resin part 13 is for ensuring electrical insulation between the carbon fiber material 11 of the CFR part 10 and the through-hole via 40. As the material for constituting the insulated resin portion 13, the above-described resin can be adopted as to the resin material 12.

The core wiring part 20 is a site | part in which wiring was multilayered by what is called a batch lamination method, and has a laminated structure by the insulating layer 21 and the wiring pattern 22. As shown in FIG.

The insulating layer 21 is formed using the prepreg which impregnates the glass cloth 21a with the resin material 21b, and the resin is hardened | cured. In view of the simplification of the drawing, in Fig. 1, the glass fabric 21a is shown only for the third insulating layer 21 from the CFR part 10 side, and is omitted for the other insulating layer 21. As the resin material 21b for constituting the insulating layer 21, for example, the resin described above with respect to the resin material 12 can be employed. In this embodiment, the average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the insulating layer 21 is less than 20 ppm / degreeC at 10 ppm / degreeC or more.

The wiring pattern 22 is a conductor having an elastic modulus of 10 to 40 GPa (250 ° C.), and has a desired shape, respectively. The conductor can be obtained, for example, by annealing the electrolytic copper foil or the rolled copper foil under predetermined conditions. The wiring patterns 22 of each layer are electrically connected to each other by the through hole vias 40.

The build-up part 30 is a site | part in which wiring was multilayered by what is called a buildup method, and has a laminated structure by the insulating layer 31 and the wiring pattern 32. As shown in FIG.

The insulating layer 31 can be comprised by the above-mentioned resin about the resin material 12, for example. In this embodiment, the average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the insulating layer 31 is set to 20 ppm / degreeC or more and less than 100 ppm / degreeC.

The wiring pattern 32 is comprised by copper plating in this embodiment, and has a desired shape, respectively. The wiring patterns 32 formed in the adjacent layers are electrically connected to each other by the vias 33. The electrode pads 32a for external connection are formed in the uppermost to outermost wiring patterns 32. On the uppermost surface of the build-up portion 30, an overcoat layer 34 that is opened corresponding to the electrode pad 32a is provided.

The through hole via 40 has a wiring structure provided on both sides of the core substrate 100, that is, the wiring pattern 22 of the core wiring part 20 and the wiring pattern 32 of the build-up part 30. It is for connecting a structure electrically. The through hole via 40 is formed by, for example, copper plating in the through hole 100a formed to penetrate the core substrate 100. In the present invention, a through hole via may be formed by filling the through hole 100a with a conductive paste containing silver powder or copper powder instead of or in addition to copper plating.

2A to 7D show a method of manufacturing the multilayer wiring board X1. 2A to 7D, the manufacturing process of the multilayer wiring board X1 is shown in partial cross-sectional views.

In manufacture of the multilayer wiring board X1, the CFRP board 10 'as shown to FIG. 2A is prepared first. In the present embodiment, the CFRP plate 10 'is composed of five carbon fiber materials 11 and a resin material 12 that is cured by embracing them. In the manufacture of the CFRP plate 10 ', for example, first, the liquid resin material 12 is impregnated with one carbon fiber material 11. Next, a carbon fiber reinforced prepreg is manufactured by drying the resin material 12 while maintaining an uncured state. Next, the five prepregs produced in this way are laminated | stacked, and 5 sheets of prepregs are integrated by pressing in the lamination direction under heating. In this way, the CFRP plate 10 'can be manufactured. In view of the simplification of the drawings, the carbon fiber material 11 is omitted in the subsequent process diagrams relating to the method for manufacturing the multilayer wiring board X1.

Next, as shown in FIG. 2B, the through hole 10a is formed at a predetermined position in the CFRP plate 10 ′. The through hole 10a is formed with an opening diameter larger than the diameter of the cross section of the through hole via 40 described above. Specifically, the opening diameter of the through hole 10a is larger than the diameter of the through hole via 40 in the range of 0.2 to 1.0 mm. As a method of forming the through hole 10a, a cutting process by a drill, a punching process by a punching die, or a laser ablation process can be employed.

Next, the CFRP plate 10 ms, the prepreg 21 ms, and the copper foil 22 ms, thus processed, are laid up in the order shown in FIG. 3A.

The prepreg 21 'consists of a glass fabric 21a and the uncured resin material 21b which embraces this. The prepreg 21 'can be manufactured by, for example, impregnating the liquid resin material 21b with the glass fabric 21a and then drying the resin material 21b while maintaining an uncured state. In view of the simplification of the drawings, the glass fabric 21a is omitted in the drawings later from FIG. 3A regarding the manufacture of the multilayer wiring board X1.

Copper foil (22 ') is an electrolytic copper foil or a rolled copper foil, and has an elasticity modulus (Young's modulus) of 10-40 GPa. The thickness of copper foil (22 micrometers) is 18 micrometers, for example. In this embodiment, an annealing process is performed on the copper foil 22 'so that the elasticity modulus may be 10-40 GPa before the layup process shown in FIG. 3A. In the case of an electrolytic copper foil, it is preferable to make heating temperature into 200-300 degreeC by an annealing process, and to make heating time into 0.5 to 2 hours. Moreover, in the case of a rolled copper foil, it is preferable to make heating temperature into 150-250 degreeC, and to make heating time into 0.5 to 2 hours. 8 shows an example of various physical properties of various copper foils. As shown in FIG. 8, an electrolytic copper foil and a rolled copper foil can exhibit the elasticity modulus of the range of 10-40 GPa by an annealing process. On the other hand, the commercially available electrolytic copper foil and rolled copper foil which did not go through the annealing process show the high elastic modulus or high rigidity of 60 GPa or more.

The elastic modulus of the copper ingot is generally about 130 GPa, and the elastic modulus of the commercially available electrolytic copper foil and the rolled copper foil generally shows high elastic modulus of 60 GPa or more based on this value. In this embodiment, the elastic modulus of the copper foil is reduced by annealing the high-elasticity modulus to the high-rigid copper foil in this manner. It is known that recrystallization of copper advances by an annealing process, As a result, the crystallinity of copper improves and an elasticity modulus falls.

In this invention, when using rolled copper foil as copper foil (22 '), you may not need to perform annealing process separately. Since a modulus of elasticity may fall significantly at the heating temperature of 150 degreeC or more, for example, in the formation process of the wiring part 20 in a core, when copper foil 22 degree is sufficient in 150 degreeC or more sufficient time, Even without performing annealing in advance, a low modulus of 10 to 40 GPa can be achieved with the copper foil (22 kPa).

In the manufacture of the multilayer wiring board X1, the laminated structure laid up in the order shown in FIG. 3A is then pressed in the thickness direction under heating. Thereby, as shown in FIG. 3B, CFRP board 10 'and copper foil 22' are integrated by thermosetting the resin material 21b of the prepreg 21 '. At this time, the through hole 10a of the CFRP plate 10 'is colored by the resin material 21b derived from the prepreg 21'. About the whole color of the through-hole 10a, you may perform beforehand using the resin material different from the resin material 21b derived from the prepreg 21b as resin which fills a hole before such batch lamination. In this way, the CFR portion 10 and the lowermost to innermost insulating layer 21 in the core wiring portion 20 are formed.

Next, by patterning the copper foil 22 ′, as shown in FIG. 3C, the wiring patterns 22 at the lowest to the innermost core 20 are formed. In formation of the wiring pattern 22, first, a resist pattern is formed on copper foil 22 '. The resist pattern has a predetermined mask pattern shape corresponding to the wiring pattern 22. Next, the wiring pattern 22 is formed by performing an etching process on the copper foil 22 'using the resist pattern as a mask. A cupric chloride aqueous solution can be used as an etching liquid. Also about subsequent copper etching, this etching liquid can be used. Thereafter, the resist pattern is peeled off.

Next, the laminated structure formed in this way, the prepreg 21 ', the laminated board 20', and the copper foil 32 'are layed up in the order shown to FIG. 4A.

Each laminated board 20 'is processed by the double-sided copper sheet, and consists of the glass fabric 21a, the resin material 21b hardened | cured by embracing this, and the predetermined wiring pattern 22. As shown in FIG. In manufacture of the laminated board 20 ', for example, first, the liquid resin material 21b is impregnated with respect to the glass fabric 21a. Next, the glass material reinforced prepreg is manufactured by drying the resin material 21b, maintaining an uncured state. Next, copper foil is crimped | bonded to both surfaces, heat-curing by heating the prepreg obtained in this way under pressure. In the present embodiment, the copper foil is subjected to annealing treatment in advance so that its elastic modulus is 10 to 40 GPa. Next, after forming a resist pattern on the copper foil for the purpose of wiring formation, the wiring pattern 22 is formed by performing an etching process with respect to the copper foil using the resist pattern as a mask. Thereafter, the resist pattern is peeled off. In this way, laminated sheets 20 'each having a predetermined wiring pattern 22 are manufactured.

The prepreg 21 'is produced in the same manner as used when the innermost insulating layer 21 is formed. In addition, the copper foil 32 'has a thickness of 5 micrometers, for example. Copper foil 32 'is used when forming the lowest wiring pattern 32 in the buildup part 30.

In the manufacture of the multilayer wiring board X1, the laminated structure laid up in the order shown in FIG. 4A is then pressed in the thickness direction under heating. Thereby, as shown in FIG. 4B, the CFR part 10, the laminated board 20 ', and copper foil 32' are integrated by thermosetting the resin material 21b of the prepreg 21 '. . In this way, the core substrate 100 having the in-core wiring portion 20 is formed.

In formation of the multilayer wiring structure of the core wiring part 20, instead of the construction method of this embodiment, you may form all the wiring patterns 22 for every layer as mentioned above with reference to FIGS. 3A-3C. Alternatively, as described above with reference to FIGS. 4A and 4B, all the wiring patterns 22 may be collectively formed using a laminated plate 20 ′ on which the wiring patterns 22 are already formed.

In manufacture of the multilayer wiring board X1, through-hole 100a is formed next with respect to the core board | substrate 100, as shown to FIG. 5A. The through hole 100a is formed to pass through the through hole 10a. As the method for forming the through hole 100a, the above-described processing method for the through hole 10a can be adopted.

Next, as shown in FIG. 5B, the innermost wiring pattern 32 of the build-up part 30 is formed on both surfaces of the core substrate 100, and the through hole via 40 is formed in the through hole 100 a. Form. Specifically, for example, first, a desmear treatment of the through-hole inner wall is performed as necessary, and then an electroless copper plating film is formed on the through-hole inner wall by the electroless plating method. At this time, a thin electroless copper plating film is formed also on the copper foil 32 '. Next, a predetermined resist pattern corresponding to the wiring pattern 32 is formed on the copper foil 32 '. Next, using the resist pattern as a mask, an electroless copper plated film is used as a seed layer by an electroplating method, and an electroplated copper plated film is grown on the electroless copper plated film. As a result, the through hole via 40 is formed in the through hole 100a. Next, after removing the resist pattern, the copper foil (32 ') not covered by the electrocopper plating film and the electroless copper plating film thereon are etched and removed. As a result, the wiring pattern 32 is formed.

Next, as shown in FIG. 6, the innermost insulating layer 31 of the build-up part 30 is formed on both surfaces of the core substrate 100. Specifically, a predetermined resin material is formed on the surface of the core substrate 100. At this time, by reducing the inside of the through hole 100a in which the through hole via 40 is formed, for example, the resin material is drawn into the through hole 100a, and the through hole 100a is completely colored by the resin material. (Iii) Regarding the full color of the through hole 100a, before forming the build-up portion 30, a resin material different from the resin material for forming the lowest insulating layer 31 in the build-up portion 30 is used as a resin to fill the hole. You may also carry out.

Next, as shown in FIG. 7A, the via hole 31a is formed in the insulating layer 31. The via hole 31a can be formed by a UV-YAG laser, a carbon dioxide laser, an excimer laser, a dry etching method using plasma, or the like. Alternatively, the via hole 31a can be formed by photolithography when the insulating layer 31 is formed of photosensitive resin. 7A and later, the formation process of one build-up part 30 is shown.

Next, as shown in FIG. 7B, the wiring pattern 32 is formed on the insulating layer 31 by the semi-additive method, and the via 33 is formed in the via hole 31a. Specifically, first, a desmear treatment is performed as necessary to roughen the surfaces of the insulating layer 31 and the via hole 31a, and then the insulating layer 31 and the via hole by the electroless plating method. An electroless copper plating film is formed on the surface of 31a. Next, after forming a photoresist on an electroless copper plating film, a resist pattern is formed by exposing and developing this. The resist pattern is formed leaving the non-masked region corresponding to the wiring pattern 32 for formation on the insulating layer 31. Next, by electroplating, electroless copper plating is deposited on the non-masked area using an electroless copper plating film as a seed layer. Next, after the resist pattern is etched and removed, the electroless copper plating film covered with the resist pattern is etched and removed until then. In this way, the wiring pattern 32 and the via 33 can be formed.

In the manufacture of the multilayer wiring board X1, the formation of the insulating layer 31 and the formation of the wiring pattern 32 and the via 33 are repeated a predetermined number of times by such a buildup method, as shown in FIG. 7C. Build-up multilayer wiring structure is formed. In this embodiment, the number of lamination | stacking of the wiring pattern 32 is six, and the electrode pad 32a for external connection is formed in the outermost wiring pattern 32. As shown in FIG.

Next, as shown to FIG. 7D, the overcoat layer 34 is formed in the surface of a buildup multilayer wiring structure. The overcoat layer 34 is opened corresponding to the electrode pad 32a. In formation of the overcoat layer 34, first, the resin material for overcoat layers is formed into a film on a buildup multilayer wiring structure by printing technique. Next, a predetermined opening is formed by photolithography. In this way, a buildup portion 30 having a buildup multilayer wiring and whose surface is covered with the overcoat layer 34 is formed. The steps described above with reference to FIGS. 7A-7D are performed in parallel on both sides of the core substrate 100.

In this way, a multi-layer comprising a core substrate 100 having a laminated structure by the CFR unit 10 and the in-core wiring unit 20, and the build-up unit 30 formed on both surfaces of the core substrate 100. The wiring board X1 is manufactured.

The multilayer wiring board X1 has a fine and high density wiring structure in the build-up section 30, and in the outermost wiring pattern 32 in the build-up section 30, the electrode pad 32a for external connection is minutely fined. It can provide in pitch. Therefore, the multilayer wiring board X1 is suitable for mounting or mounting a semiconductor chip in which electrodes for external connection are formed at a fine pitch.

The CFR part 10 of the multilayer wiring board X1 is comprised including the carbon fiber material 11 with a very small thermal expansion rate. The average thermal expansion coefficient of 25 degreeC-150 degreeC of the whole multilayer wiring board X1 which has such CFR part 10 is 3-5 ppm / degreeC in this embodiment. Such a low thermal expansion rate multilayer wiring board X1 has a small difference in thermal expansion rate between the semiconductor chip and the semiconductor chip, so that a decrease in connection reliability due to the difference in thermal expansion rate can be suppressed.

In the multilayer wiring board X1, a good bonding state is achieved between the CFR unit 10 and the in-core wiring unit 20, and between the in-core wiring unit 20 and the build-up unit 30. The multilayer wiring board X1 includes a CFR unit 10 having a low thermal expansion rate sufficiently lowering the thermal expansion rate of the entire substrate, and a buildup unit 30 having a relatively large thermal expansion rate by forming fine wirings by the buildup method. For example, if the CFR portion 10 and the build-up portion 30 are directly bonded together, the difference in thermal expansion coefficient between them is relatively large, so that peeling is likely to occur between the two. In the multilayer wiring board X1, the in-core wiring section 20, which represents a value between the CFR section 10 and the buildup section 30 with respect to the thermal expansion rate, is located between the CFR section 10 and the buildup section 30. Intervened in

In the multilayer wiring board X1, since the wiring pattern 22 is soft having an elastic modulus of 10 to 40 GPa, the net thermal expansion rate of the in-core wiring portion 20 does not unduly depend on the thermal expansion rate of the wiring pattern 22. It is suitably set between the thermal expansion rate of the carbon fiber reinforcement part 10 and the thermal expansion rate of the non-core wiring part 20. In the multi-layered wiring structure formed by the so-called batch lamination method as in the core wiring portion 20, the thermal expansion coefficient is generally larger than that of the conductor constituting the wiring pattern, and the elastic modulus is higher than that of the insulating layer. The conductor side is large. When the conductors constituting the wiring pattern have an excessive elastic modulus, for example, 60 GPa or more, the high elastic modulus wiring pattern generates relatively large stresses at the time of thermal expansion. Therefore, at the net thermal expansion rate of the multilayer wiring structure, the thermal expansion rate of the wiring pattern is Become dominant. As a result, it may be difficult to adjust the net thermal expansion coefficient of the multilayer wiring structure as desired. On the other hand, in the present invention, the wiring pattern 22 in the core wiring portion 20 is made of a conductor having a low modulus of elasticity of 10 to 40 GPa. The low elastic modulus wiring pattern 22 is soft enough to adequately harvest the thermal expansion of the insulating layer 21 in the core wiring portion 20. As a result, the overall thermal expansion rate of the core wiring portion 20 is large. The coefficient of thermal expansion of the insulating layer 21 becomes dominant. Therefore, the net thermal expansion rate of the inter-core wiring portion 20 does not unduly depend on the thermal expansion rate of the wiring pattern 22, but the thermal expansion rate of the carbon fiber reinforcement portion 10 and the thermal expansion rate of the non-core wiring portion 20. It can be appropriately set with a high degree of freedom between. In the multilayer wiring board X1 having the core wiring portion 20 suitably set with a high degree of thermal expansion, the CFR portion 10 and the core may be changed even if the environmental temperature changes or the environmental temperature changes. The bonded state between the wiring portions 20 and the bonded state between the core wiring portion 20 and the buildup portion 30 can be maintained satisfactorily.

9 is a partial cross-sectional view of the multilayer wiring board X2 according to the second embodiment of the present invention. The multilayer wiring board X2 includes a core substrate 200 having a laminated structure by a glass fiber reinforced (GFR) portion 50, two CFR portions 10, and two intra-core wiring portions 20, and Two build-up units 30 are formed on both sides of the core substrate 200. The core substrate 200 is provided with a through hole via 40 extending in the thickness direction thereof.

The GFR part 50 is processed from the board | plate material of glass fiber reinforced plastics (GFRP), and consists of the glass fiber material 51 and the resin material 52 hardened | cured by embracing this.

The glass fiber material 51 is a glass cloth, for example, and is arrange | positioned so that it may extend in the surface expansion direction of the GFR part 50. In the present embodiment, three glass fiber materials 51 are laminated in the thickness direction and embedded in the resin material 52. The content rate of the glass fiber material 51 in the GFR part 50 is 20-50 vol%.

As the resin material 52 which contains the glass fiber material 51, the above-mentioned material can be employ | adopted with respect to the resin material 12 mentioned above, for example.

The CFR part 10 is processed from the board | plate material of carbon fiber reinforced plastics (CFRP), and consists of the carbon fiber material 11, the resin material 12 hardened | cured by embracing this, and the insulated resin part 13. Each CFR portion 10 in the present embodiment has the same configuration as the CFR portion 10 in the first embodiment except that the stacked number of the carbon fiber materials 11 is three.

The core wiring part 20 is a site | part in which wiring was multilayered by what is called a batch lamination method, and has a laminated structure by the insulating layer 21 and the wiring pattern 22. As shown in FIG. The buildup part 30 is a site | part in which wiring was multilayered by what is called a buildup method, and has a laminated structure by the insulating layer 31 and the wiring pattern 32. As shown in FIG. The overcoat layer 34 is provided in the uppermost surface of the buildup part 30. The through hole via 40 has a wiring structure provided on both sides of the core substrate 200, that is, wiring by the wiring pattern 22 of the core wiring unit 20 and the wiring pattern 32 of the build-up unit 30. The structure is for electrically connecting each other. The through hole via 40 is formed by, for example, copper plating in the through hole 200a formed to penetrate the core substrate 200.

The other configurations of the in-core wiring section 20, build-up section 30, and through hole via 40 are the same as those described above with respect to the first embodiment. In view of the simplification of the drawing, in FIG. 9, the glass fabric 21a included in the insulating layer 21 in the core wiring portion 20 is attached to the insulating layer 21 in the third stage from the CFR section 10 side. Is shown only, and the other insulating layers 21 are omitted.

10 shows a part of the manufacturing process of the multilayer wiring board X2. In FIG. 10, the manufacturing process of multilayer wiring board X2 is shown by partial sectional drawing.

In manufacture of the multilayer wiring board X2, first, the CFRP board 10 'as shown to FIG. 10A is prepared. In the present embodiment, the CFRP plate 10 'is composed of three carbon fiber materials 11 and a resin material 12 that is cured by embracing them.

Next, as shown in FIG. 10B, the through hole 10a is formed at a predetermined position in the CFRP plate 10 ′. The through hole 10a is formed with an opening diameter larger than the diameter of the cross section of the through hole via 40 described above. Specifically, the opening diameter of the through hole 10a is larger than the diameter of the through hole via 40 in the range of 0.2 to 1.0 mm. As a method of forming the through-hole 10a, the cutting process by a drill, the punching process by a punching die, or the laser ablation process can be employ | adopted.

Next, two CFRP plates (10 ms) and three GFRP plates (50 ms) thus produced are laid up in the order shown in Fig. 10C. The GFRP plate 50 'is made of a glass fiber material 51 and a resin material 52 which embraces this in an uncured state, respectively.

Next, as shown to FIG. 10D, CFRP board 10 'is crimped | bonded through three GFRP boards (50 microseconds) under the conditions of predetermined pressurization and temperature. At this time, the through hole 10a of the CFRP plate 10 'is colored by the resin material 52 of the GFRP plate 50'. In this embodiment, the resin material 52 enters into each through hole 10a provided in the CFRP board 10 'while extruding bubbles from the inside in the thickness direction of the laminated structure. Therefore, the through hole 10a can be appropriately colored while suppressing mixing of bubbles into the through hole 10a in the CFR section 10. A part of the resin material 52 that colors the through hole 10a is later processed into the insulating resin portion 13 of the CFR portion 10. In this way, a laminated structure consisting of the GFR portion 50 and the CFR portion 10 is formed.

Next, the laminated structure shown in FIG. 10D is used instead of the CFRP plate 10 'and the steps described above with reference to FIGS. 3A and 3B are performed in the first embodiment. Thereby, almost the same as that shown in FIG. 3B, the innermost insulating layer 21 and the copper foil 22 'in the core wiring part 20 are laminated | stacked with respect to the laminated structure. However, at this time, since the through-hole 10a is already filled with the resin material, the resin material 12 derived from the prepreg 21 'does not color the through-hole 10a.

Subsequently, the multilayer wiring board X2 of this embodiment can be manufactured by going through the same process as described above with reference to FIGS. 3C to 7D with respect to the first embodiment.

Similarly to the multilayer wiring board X1, the multilayer wiring board X2 is provided with the buildup part 30 which has the electrode pad 32a which can be provided in fine pitch as a terminal for external connection. Therefore, the multilayer wiring board X2 is suitable for mounting or mounting a semiconductor chip in which electrodes for external connection are formed at a fine pitch.

The CFR part 10 of the multilayer wiring board X2 is comprised including the carbon fiber material 11 with a very small thermal expansion rate. The average thermal expansion coefficient of 25 degreeC-150 degreeC of the whole multilayer wiring board X2 which has such CFR part 10 is 3-5 ppm / degreeC in this embodiment. Such a low thermal expansion rate multilayer wiring board X2 has a small difference in thermal expansion rate between the semiconductor chip and the semiconductor chip, so that a decrease in connection reliability caused by the difference in thermal expansion rate can be suppressed.

In the present embodiment, as described above, the mixing of bubbles into the through hole 10a in the CFR section 10 is appropriately suppressed. If bubbles are mixed when the through hole 10a is colored with a resin material, electrical insulation between the carbon fiber material 11 and the through hole via 40 may not be secured. Specifically, if bubbles are mixed when the through-hole 10a is colored with a resin material, when the through-hole 100a passing through the resin material is formed, the bubbles that have been closed until then are opened to open the through-hole 100a. ), The carbon fiber material 11 may be exposed. When the carbon fiber material 11 is exposed in this manner, the through hole via 40 formed in the through hole 100a and the carbon fiber material 11 come into contact with and short.

In the multilayer wiring board X2, similarly to the multilayer wiring board X1, between the CFR unit 10 and the in-core wiring unit 20, and between the core wiring unit 20 and the build-up unit 30. In between, good joining state is achieved.

Example 1

<Manufacture of a multilayer wiring board>

In this embodiment, a composite of a carbon fiber fabric and an epoxy resin was used as the CFRP material. In the manufacture of the CFRP plate of the present embodiment, first, the carbon fiber fabric (trade name: TORAYCA, manufactured by Toray) is impregnated with an epoxy resin varnish (a varnish containing a monomer polymerized with an epoxy resin, etc.), and then dried to obtain a thickness. A 0.2 mm prepreg was prepared. This carbon fiber fabric is a plain weave of carbon fiber yarn in which carbon fibers having a cross-sectional diameter of 10 µm or less are bundled in an average number of 1,000 or more. Thus prepared five prepregs were laminated, and a vacuum CFRP plate having a thickness of about 1.0 mm was produced by pressing in a lamination direction at a peak temperature of 200 ° C. for 30 minutes. The pressurized pressure at this time was 40 kgf / cm <2>. The average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of this CFRP board was 1 ppm / degreeC.

Next, through holes were drilled to form a through hole having an opening diameter of 0.8 mm at a predetermined location of the CFRP plate.

Next, about both surfaces of a CFRP board, the prepreg of thickness 0.1mm and the copper foil of thickness 18micrometer were collectively laminated | stacked and integrated from the side of a CFRP board using a vacuum press. The prepreg is a prepreg (trade name: R-1650, manufactured by Matsushita Denko) of a FR-4 material in which a glass cloth and an epoxy resin are combined. Copper foil is an electrolytic copper foil (brand name: F1-WS, Koga Circuit Co., Ltd. product) which made elasticity modulus 22 GPa by performing an annealing process. About press conditions, the peak temperature was 185 degreeC, the press time was 2 hours, and the pressure was 30 kgf / cm <2>. At this time, through-holes of the CFRP plate were developed by a part of the resin of the prepreg bonded to both surfaces of the CFRP plate.

Next, with respect to both surfaces of the laminated structure obtained as described above, a prepreg having a thickness of 0.1 mm, a laminated plate having a predetermined wiring pattern as a thickness of 0.1 mm on both sides, and a prepreg having a thickness of 0.1 mm from the laminated structure side. And 5 micrometers-thick copper foil were laminated | stacked collectively using the vacuum press, and were integrated. The prepreg is a prepreg (trade name: R-1650, manufactured by Matsushita Denko) of a FR-4 material in which a glass cloth and an epoxy resin are combined. The laminated board is an electrolytic copper foil (trade name: F1-WS) having an elastic modulus of 10 to 40 GPa after annealing on both surfaces of a prepreg (trade name: R-1650, manufactured by Matsushita Denko) made of a glass cloth and an epoxy resin. Nose circuit files manufactured by Co., Ltd. are laminated, and a predetermined wiring pattern is formed from the copper foil. About the press conditions, the peak temperature was 185 degreeC, the press time was 30 minutes, and the pressure was 30 kgf / cm <2>. In this way, a core substrate (about 1.8 mm thick) including a CFR portion and two in-core wiring portions joined to both surfaces thereof was produced. The average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of a core board | substrate was 2.0 ppm / degreeC.

Next, a through hole having an aperture diameter of 0.35 mm was formed by drilling to the core substrate so as to pass through substantially the center of the through hole of the CFRP plate.

Next, a through hole via was formed in the through hole, and a predetermined wiring pattern was formed on the surface of the core substrate by a semiadditive method. Specifically, first, after the desmear treatment of the through-hole inner wall, an electroless copper plating film was formed on the through-hole inner wall and the raw copper foil by the electroless plating method. Next, a resist pattern having a pattern shape corresponding to a predetermined wiring pattern was formed on the raw copper foil. In the formation of the resist pattern, first, a dry film resist (trade name: NIT-240, manufactured by Nicomoton) is bonded to the surface of the copper foil, and then exposed and developed to form a resist pattern having a pattern shape corresponding to the wiring pattern for formation purposes. Formed. Next, an electroless copper plating film was grown on the electroless copper plating film by using an electroless copper plating film as a seed layer by the electroplating method. As a result, a through hole via was formed in the through hole. Next, after removing the resist pattern, the copper foil not covered by the electrocopper plating film and the electroless copper plating film thereon were etched and removed. A cupric chloride aqueous solution was used as the etching solution. Thereafter, the resist pattern was peeled off using an aqueous 3 wt% sodium hydroxide solution. This formed the wiring pattern in the lowermost to innermost part in a buildup part on the surface of a core board | substrate. Next, the through-holes in which the through-hole vias have already been formed as described above were colored by epoxy resin.

Next, buildup insulating layers were formed on both surfaces of the core substrate. In formation of a buildup insulating layer, a thermoplastic polyimide resin sheet (brand name: Espanex, Shinnitetsu Chemical Co., Ltd.) is first made by vacuum press so that it may become thickness 0.05mm on conditions of 200 degreeC of peak temperature, and 30 minutes. And laminated on both surfaces of the core substrate. The average thermal expansion coefficient of 25 degreeC-150 degreeC of this polyimide layer was 60 ppm / degreeC. Next, via holes were formed by UV-YAG laser at predetermined locations of the build-up insulating layer.

Next, the copper wiring pattern was formed on the insulating layer by the semiadditive method. At this time, copper was also deposited on the via hole surface to form a via together with the copper wiring pattern. Specifically, first, after the desmear treatment was performed on the insulating layer surface and the via hole surface, an electroless copper plating film was formed on the surface of the insulating layer and the via hole by the electroless plating method. Next, after forming a photoresist on an electroless copper plating film, the resist pattern was formed by exposing and developing this. The resist pattern has a pattern shape corresponding to the wiring pattern for the purpose of formation. Next, the electroplating was deposited on the electroless plating film not masked by the resist pattern by the electroplating method using an electroless copper plating film as the seed layer. Next, the resist pattern was etched away, and then the electroless copper plated film covered with the resist pattern was etched and removed. By this semi-additive method, wiring patterns and vias were formed on the buildup insulating layer.

Subsequently, a series of processes from lamination of the buildup insulating layer to formation of the wiring pattern and the via are repeated three more times on both sides of the core substrate, thereby forming the buildup portion of the five layer wiring structure on both sides of the core substrate. .

Next, an overcoat layer was formed on the surface of the buildup portion by screen printing and photolithography. At predetermined positions of the overcoat layer, openings were provided such that a part of the uppermost wiring pattern in the build-up portion came as an electrode pad.

Thus, the average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the manufactured multilayer wiring board was 4.0 ppm / degreeC. In the measurement of the thermal expansion rate, a differential thermal analysis thermomechanical analyzer (trade name: TMA6000, manufactured by Seiko Instruments Industries, Inc.) was used. Moreover, as a result of measuring the warpage amount with respect to the multilayer wiring board of a present Example, it was 10 micrometers or less in the 20 mm span of the chip mounting area provided in the multilayer wiring board surface.

<Temperature cycle test>

In the multilayer wiring board of the present embodiment, a predetermined semiconductor chip having a plurality of bump electrodes for external connection is mounted without using an underfill agent, and the connection reliability between the semiconductor chip and the multilayer wiring board is tested by a temperature cycle test. Was investigated. Specifically, the initial conduction resistance was first measured for each electrical connection portion between the semiconductor chip and the multilayer wiring board. Next, after conducting a temperature cycle test in the range of -65 ° C to 125 ° C, the conduction resistance of each electrical connection portion was measured again. The temperature cycle test used one cycle of 30 minutes of cooling at -65 ° C and 30 minutes of heating at 125 ° C, and repeated this cycle 1000 times. As a result, the resistance change rate in each electrical connection part was less than 10%, and it was confirmed that favorable connection is maintained. After 1000 cycles, no crack or peeling occurred between the bump electrode of the semiconductor chip and the electrode pad of the multilayer wiring board.

In addition, after 1000 cycles, the multilayer wiring board of the present example was polished and its cross section was exposed, and the exposed cross section was observed by an optical microscope. Peeling was not observed even between up parts (outside core wiring part).

Example 2

<Manufacture of a multilayer wiring board>

In this embodiment, a composite of a carbon fiber fabric and an epoxy resin was used as the CFRP material. In the manufacture of the CFRP plate of the present embodiment, first, the carbon fiber fabric (trade name: TORAYCA, manufactured by Toray) is impregnated with an epoxy resin varnish (a varnish containing a monomer polymerized with an epoxy resin, etc.), and then dried to obtain a thickness. A 0.2 mm prepreg was prepared. This carbon fiber fabric is the same as that of Example 1. Thus prepared three prepregs were laminated, and a vacuum CFRP plate having a thickness of about 0.6 mm was produced by pressing in a lamination direction at a peak temperature of 200 ° C. for 30 minutes. The pressurized pressure at this time was 40 kgf / cm <2>. The average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of this CFRP board was 0.5 ppm / degreeC. Subsequently, through the drill, a through hole having an opening diameter of 0.8 mm was formed in a predetermined location of the CFRP plate. Thus, two CFRP plates in which a plurality of through holes (φ 0.8 mm) were provided at a thickness of 0.6 mm were manufactured.

Next, two CFRP plates produced in this manner were pressed by pressing in the lamination direction at a peak temperature of 185 ° C. for 30 minutes by a vacuum press through three GFRP plates. Each GFRP board is a prepreg (trade name: R-1650, manufactured by Matsushita Denko) of a FR-4 material in which a glass cloth and an epoxy resin are compounded, and each has a thickness of 0.1 mm. At this time, the through hole of the CFRP plate was colored with an epoxy resin derived from the GFRP plate.

Next, about both surfaces of a CFRP board, the prepreg of thickness 0.1mm and the copper foil of thickness of 18 micrometers were laminated | stacked collectively using the vacuum press, and were integrated from the CFRP board side. The prepreg is a prepreg (trade name: R-1650, manufactured by Matsushita Denko) of a FR-4 material in which a glass cloth and an epoxy resin are combined. Copper foil is an electrolytic copper foil (brand name: F1-WS, Koga Circuit Co., Ltd. product) which made elasticity modulus 22 GPa by performing an annealing process. About press conditions, the peak temperature was 185 degreeC, the press time was 2 hours, and the pressure was 30 kgf / cm <2>. Next, in the same manner as in Example 1, with respect to both surfaces of the laminate structure obtained as described above, a laminate having a prepreg having a thickness of 0.1 mm and a predetermined wiring pattern as a thickness of 0.1 mm on both sides from the laminate structure side. And a prepreg having a thickness of 0.1 mm and a copper foil having a thickness of 5 µm were collectively laminated using a vacuum press to integrate the core substrate. The average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the core board | substrate of this Example was 2.0 ppm / degreeC.

Next, a through hole having an aperture diameter of 0.35 mm was formed by drilling to the core substrate so as to pass through substantially the center of the through hole of the CFRP plate.

Subsequently, in the same manner as in Example 1, the GFR portion, the CFR portion, the in-core wiring portion, and the build-up portion are formed by performing the formation of the wiring pattern and the through hole via on the surface of the core substrate to the formation of the overcoat layer. The multilayer wiring board of the present Example which has a laminated structure was manufactured.

The average thermal expansion coefficient of 25 degreeC-150 degreeC in the surface expansion direction of the multilayer wiring board of this Example was 4.0 ppm / degreeC. In the measurement of thermal expansion rate, a parallax expansion thermomechanical analyzer (trade name: TMA6000, manufactured by Seiko Instruments Industries) was used. Moreover, as a result of measuring the warpage amount about the multilayer wiring board of a present Example, it was 10 micrometers or less in the 20 mm span of the chip mounting area provided in the multilayer wiring board surface.

<Temperature cycle test>

With respect to the multilayer wiring board of the present embodiment, a predetermined semiconductor chip having a plurality of bump electrodes for external connection is mounted without using an underfill agent, and the semiconductor chip is carried out in the same manner as in Example 1 by a temperature cycle test. Connection reliability between the multilayer wiring boards was investigated. As a result, the resistance change rate in each electrical connection part was less than 10%, and it confirmed that the favorable connection part was formed. In addition, after 1000 cycles, no crack or peeling occurred between the bump electrode of the semiconductor chip and the electrode pad of the multilayer wiring board.

In addition, as a result of observing the cross section of the multilayer wiring board of this embodiment which passed through 1000 cycles in the same manner as in Example 1, peeling was performed between the CFR portion and the core wiring portion and between the core wiring portion and the buildup portion. Not observed.

Comparative Example 1

Instead of the core board | substrate of Example 1, the organic core board | substrate of the same size was prepared and the multilayer wiring board of this comparative example was manufactured by forming a buildup part similarly to Example 1 with respect to this organic core board | substrate. The organic core board | substrate forms in-core wiring part of the same wiring layer number as Example 1 with respect to both surfaces of a BT resin board | substrate. The copper wiring pattern in the core wiring part was formed from the electrolytic copper foil which did not go through the annealing process, and the elasticity modulus is 72 GPa. As a result of measuring the amount of warpage of the organic core multilayer wiring board of this comparative example, it was about 30 micrometers in 20 mm span of a chip mounting area. Moreover, about the organic core multilayer wiring board of this comparative example, the predetermined semiconductor chip which has some bump electrode for external connection is mounted without using an underfill agent, and it carried out similarly to Example 1 by the temperature cycling test. The connection reliability between the semiconductor chip and the multilayer wiring board was investigated. As a result, in 1000 cycles, the junction part in which a crack was observed in the interface of the bump electrode of a semiconductor chip and the electrode pad of a multilayer wiring board existed.

[evaluation]

According to the temperature cycle test of the semiconductor chip mounting state, in-core wiring having a CFR portion having a low thermal expansion coefficient in the in-plane direction by containing carbon fiber fabric and a wiring pattern formed of an electrolytic copper foil having a low modulus of elasticity of 22 GPa The multilayer wiring boards of Example 1 and Example 2 with a part were found to have higher connection reliability with a semiconductor chip than the conventional organic core multilayer wiring board according to Comparative Example 1. Since the CFR portion having a very low thermal expansion rate exists and the wiring pattern of the core wiring portion is sufficiently low in elasticity so as not to impair the low thermal expansion coefficient of the core substrate, the thermal expansion coefficient in the in-plane direction of the core substrate and the multilayer wiring substrate It is thought that it can control suitably small and, as a result, can obtain high connection reliability in the multilayer wiring board of Example 1 and Example 2.

Thus, according to this invention, low thermal expansion coefficient can be suitably achieved by a multilayer wiring board. Such a wiring board is inherently suitable for mounting a semiconductor chip having a low thermal expansion rate, and can be applied to a semiconductor chip mounting substrate, a motherboard, a substrate for a probe card, and the like.

Claims (16)

A carbon fiber reinforcement part made of a carbon fiber material and a resin composition, and a laminated structure formed by a wiring pattern made of at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa. A core portion including an interconnecting core portion in the core, The non-core wiring part which has a laminated structure by the at least 1 insulating layer and wiring pattern which do not contain a fiber member, and is joined to the said core part in the said inner core wiring part. The multilayer wiring board provided with the laminated structure by this. First and second core wiring portions each having a laminated structure by a wiring pattern composed of at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa, and a carbon fiber material and a resin composition A core portion comprising a carbon fiber reinforcement portion formed between the first inner core portion and the second inner core portion; A first non-core wiring portion having a laminated structure by at least one insulating layer and a wiring pattern not containing a fiber member and joined to the core portion by the first in-core wiring portion; A second non-core wiring portion having a laminated structure by at least one insulating layer and a wiring pattern not containing a fiber member, and joined to the core portion by the wiring portion in the second core. The multilayer wiring board provided with the laminated structure by this. Glass fibers each made of a first and second carbon fiber reinforcement part, a glass fiber material, and a resin composition each made of a carbon fiber material and a resin composition and interposed between the first carbon fiber reinforcement part and the second carbon fiber reinforcement part. A reinforcing portion, having a laminated structure formed by a wiring pattern composed of at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa, and having the first carbon fiber reinforced portion on the side opposite to the glass fiber reinforced portion A wiring structure formed by a wiring pattern composed of a first intercore wiring portion bonded to each other, and at least one insulating layer containing a glass fiber material and a conductor having an elastic modulus of 10 to 40 GPa, and opposite to the glass fiber reinforced portion. A core portion including a second inner core wiring portion joined to the second carbon fiber reinforcement portion at A first non-core wiring portion having a laminated structure by at least one insulating layer and a wiring pattern not containing a fiber member and joined to the core portion by the first in-core wiring portion; A second non-core wiring portion having a laminated structure by at least one insulating layer and a wiring pattern not containing a fiber member, and joined to the core portion by the wiring portion in the second core. The multilayer wiring board provided with the laminated structure by this. The multilayer wiring board according to any one of claims 1 to 3, wherein the core portion has a through hole via extending in the thickness direction of the core portion and covered with an insulating material. The multilayer wiring board according to claim 1 or 2, wherein the conductor is an electrolytic copper foil or a rolled copper foil. The multilayer wiring board according to any one of claims 1 to 3, wherein the resin composition of the carbon fiber reinforced portion contains a filler. The multilayer wiring board of Claim 6 whose content rate of the said filler in the said resin composition is 5-30 vol%. The method of claim 6, wherein the filler is SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , AlN, ZrO ₂ , mullite, borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, quartz glass, or carbon black The multilayer wiring board which consists of. The multilayer wiring board according to any one of claims 1 to 3, wherein the carbon fiber material has a mesh, a woven fabric, a nonwoven fabric, or a chopped fiber, or a unidirectional carbon fiber sheet cross laminated structure. The multilayer wiring board as described in any one of Claims 1-3 whose content rate of the said carbon fiber material in the said carbon fiber reinforcement part is 30-80 vol%. An annealing step for annealing the conductor foil for forming the first wiring pattern so that the elastic modulus of the conductor foil is 10 to 40 GPa; A process for forming a first wiring portion having a laminated structure by at least one insulating layer containing a glass fiber material and a first wiring pattern formed of the conductor foil on a carbon fiber reinforcement portion made of a carbon fiber material and a resin composition; , The manufacturing method of the multilayer wiring board which includes the process for forming the 2nd wiring part which has a laminated structure by the at least 1 insulating layer which does not contain a fiber member, and a 2nd wiring pattern on the said 1st wiring part. The said conductor foil is an electrolytic copper foil, and the said electrolytic copper foil is annealed at 200-300 degreeC in the said annealing process, The manufacturing method of the multilayer wiring board of Claim 11 characterized by the above-mentioned. The said conductor foil is a rolled copper foil, and the rolled copper foil is annealed at 150-250 degreeC in the said annealing process, The manufacturing method of the multilayer wiring board of Claim 11 characterized by the above-mentioned. 150 degreeC or more for forming the 1st wiring part which has a laminated structure by the 1st wiring pattern formed from the at least 1 insulating layer containing glass fiber material, and the rolled copper foil on the carbon fiber reinforced part which consists of a carbon fiber material and a resin composition A process including heat treatment, The manufacturing method of the multilayer wiring board which includes the process for forming the 2nd wiring part which has a laminated structure by the at least 1 insulating layer which does not contain a fiber member, and a 2nd wiring pattern on the said 1st wiring part. delete delete

Images