KR100701402B1 - 반도체 패키지 - Google Patents
반도체 패키지 Download PDFInfo
- Publication number
- KR100701402B1 KR100701402B1 KR1020010014140A KR20010014140A KR100701402B1 KR 100701402 B1 KR100701402 B1 KR 100701402B1 KR 1020010014140 A KR1020010014140 A KR 1020010014140A KR 20010014140 A KR20010014140 A KR 20010014140A KR 100701402 B1 KR100701402 B1 KR 100701402B1
- Authority
- KR
- South Korea
- Prior art keywords
- inner lead
- etched
- semiconductor package
- resin
- lead
- Prior art date
Links
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
Claims (1)
- 저면 테두리 부분이 에칭처리된 칩탑재판과; 상기 칩탑재판의 사방에 인접되게 위치되고, 저면 안쪽 일부가 에칭 처리된 구조의 내부리드와; 상기 칩탑재판의 상면에 접착수단에 의하여 부착된 반도체 칩과; 상기 반도체 칩의 본딩패드와 상기 내부리드의 본드핑거간에 연결된 와이어와; 상기 칩탑재판의 저면과 내부리드의 저면 및 외측면을 외부로 노출시키면서 상기 반도체 칩과, 와이어와, 내부리드등을 몰딩하고 있는 수지로 구성된 반도체 패키지에 있어서,상기 내부리드의 바깥쪽 상면의 일정 구간이 하프에칭 처리되고, 이 하프 에칭된 구간에 수지가 채워져 몰딩된 것을 특징으로 하는 반도체 패키지.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010014140A KR100701402B1 (ko) | 2001-03-19 | 2001-03-19 | 반도체 패키지 |
US09/998,844 US6605865B2 (en) | 2001-03-19 | 2001-10-19 | Semiconductor package with optimized leadframe bonding strength |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010014140A KR100701402B1 (ko) | 2001-03-19 | 2001-03-19 | 반도체 패키지 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20020074279A KR20020074279A (ko) | 2002-09-30 |
KR100701402B1 true KR100701402B1 (ko) | 2007-03-28 |
Family
ID=27697905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020010014140A KR100701402B1 (ko) | 2001-03-19 | 2001-03-19 | 반도체 패키지 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100701402B1 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100868662B1 (ko) * | 2007-03-02 | 2008-11-13 | 에스티에스반도체통신 주식회사 | 엠.엘.에프(mlf)형 반도체 패키지 및 그 제조방법 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11260989A (ja) * | 1998-03-12 | 1999-09-24 | Matsushita Electron Corp | 樹脂封止型半導体装置及びその製造方法 |
JP2000021919A (ja) * | 1998-06-30 | 2000-01-21 | Fujitsu Ltd | 半導体装置及びその製造方法 |
KR20000028854A (ko) * | 1998-10-21 | 2000-05-25 | 김규현 | 플라스틱 집적회로 장치 패키지와 마이크로 리드프레임 및패키지의 제조 방법 |
US20020130400A1 (en) * | 2001-03-19 | 2002-09-19 | Jeong Jung Ho | Semiconductor package with lead frame |
KR100364845B1 (en) * | 2001-04-06 | 2002-12-16 | Amkor Technology Inc | Leadframe and molding die of semiconductor package |
-
2001
- 2001-03-19 KR KR1020010014140A patent/KR100701402B1/ko active IP Right Grant
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11260989A (ja) * | 1998-03-12 | 1999-09-24 | Matsushita Electron Corp | 樹脂封止型半導体装置及びその製造方法 |
JP2000021919A (ja) * | 1998-06-30 | 2000-01-21 | Fujitsu Ltd | 半導体装置及びその製造方法 |
KR20000028854A (ko) * | 1998-10-21 | 2000-05-25 | 김규현 | 플라스틱 집적회로 장치 패키지와 마이크로 리드프레임 및패키지의 제조 방법 |
US20020130400A1 (en) * | 2001-03-19 | 2002-09-19 | Jeong Jung Ho | Semiconductor package with lead frame |
KR100364845B1 (en) * | 2001-04-06 | 2002-12-16 | Amkor Technology Inc | Leadframe and molding die of semiconductor package |
Also Published As
Publication number | Publication date |
---|---|
KR20020074279A (ko) | 2002-09-30 |
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