KR100688823B1 - Manufacturing method of high density PCB - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a high density substrate, and in particular, a metal layer formed by applying a peelable adhesive layer on a reinforcing substrate (rigid substrate or carrier film) used as a base substrate and forming a plating or laminating or sputtering metal thin film on the adhesive layer. The present invention relates to a method for producing a high density substrate in which a high density circuit is formed by pattern plating using a thin film as a seed layer.

In addition, the present invention comprises a first step of attaching an adhesive means to one end of the reinforcing substrate (rigid substrate or carrier film); Forming a seed layer on the bonding means and forming a circuit pattern on the seed layer; Stacking an insulating layer on the circuit pattern and removing the reinforcing base material (rigid substrate or carrier film); And after the third step, a fourth step of removing the seed layer is provided.

High density, multi-pinned, printed circuit board, fine pattern

Description

Manufacturing method of high density PCB

1A to 1E are flowcharts of a method for manufacturing a high density substrate using the subtractive method according to the prior art.

2A to 2E are flowcharts illustrating a method for manufacturing a high density substrate by the semiadditive process according to the prior art.

3A to 3D are flowcharts illustrating a method for manufacturing a high density substrate by the full additive method according to the prior art.

4A to 4G are flowcharts illustrating a method of manufacturing a high density substrate using a base substrate having an adhesive layer according to an embodiment of the present invention.

5A to 5G are flowcharts illustrating a method of manufacturing a high density substrate using a base substrate having an adhesive layer according to another embodiment of the present invention.

6A to 6G are flowcharts illustrating a method of manufacturing a high density substrate using a base substrate having an adhesive tape according to another embodiment of the present invention.

7A to 7G are flowcharts illustrating a method of manufacturing a high density substrate using a base substrate having an adhesive tape according to another embodiment of the present invention.

<Description of the reference numerals for the main parts of the drawings>

401, 501, 603, 703: base material for reinforcement 402, 502: adhesive

403, 503, 604, 704: seed layer 404, 504, 605, 705: pattern plating layer

405, 505, 606, 706: insulating layer 601, 701: tape base material

602a, 602b, 702a, 702b: adhesive

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a high density substrate, and in particular, a metal layer formed by applying a peelable adhesive layer on a reinforcing substrate (rigid substrate or carrier film) used as a base substrate and forming a plating or laminating or sputtering metal thin film on the adhesive layer. The present invention relates to a method for producing a high density substrate in which a high density circuit is formed by pattern plating using a thin film as a seed layer.

Without software, a computer is simply a hard metal box. Likewise, no matter how many high-performance integrated circuits (ICs) and various electronic components are collected, they are not useful alone.

By properly arranging them, they are electrically connected to each other and supplied with power to be electronics that operate as designed. As such, the PCB (Printed Circuit Board) is the basis for installing the electronic components, as well as electrically connecting the components.

Since the term PCB was formed by screen printing during the initial manufacturing process, the term Print was created.

At present, in the single-sided PCB manufacturing process, the printing ink is partially used, but since the wiring is formed using a photosensitive film or the like on both sides of the PCB, the term printed circuit board is not appropriate. It would be more desirable to call it an electronic circuit board. In East Asia, including Korea, the term PCB is used a lot, but in Europe, the term PWB (Printed Wiring Board) is used.

As mentioned above, the PCB also serves to mechanically fix the components in addition to the electrical connection between the electronic components. To increase mechanical strength, raw materials of PCBs contain about 50% glass fiber as a reinforcement material.

During the manufacturing process, the PCB is exposed to high temperatures of 200 ° C. or higher, requiring heat resistance that does not bend or deform the raw material.

In recent years, with the demand for high functionalization and light weight and shortening of electronic devices, high-density integration and high-density mounting of electronic components have been advanced, and semiconductor packages used in these electronic devices have conventionally increased in size and miniaturization. Coming.

The conventional circuit board is called a printed wiring board, and after patterning the copper foil which could be stuck to the glass epoxy board from the laminated board which impregnated the epoxy resin to the nonwoven fabric of glass fiber, a plurality of sheets were piled up and laminated, and the through hole is drilled and this hole is made. After copper plating was performed on the wall surface of the via to form vias, the use of wiring boards with electrical connection between layers was mainstream.

However, miniaturization and high density of mounting components have progressed, and the wiring density is insufficient in the above wiring board, causing problems in mounting the components.

In recent years, build-up multilayer wiring boards have been adopted in recent years. The buildup multilayer wiring board is molded while stacking the insulating layer and the conductor which consist of resin only.

As a via formation method, densification is achieved by arranging via holes of small diameter freely over various aspects, such as laser method, plasma method, and photo method, instead of conventional drill processing.

As the layer indirect portion, there are blind vias and buried vias (a structure in which vias are filled with conductors), and a buried via capable of stacking vias forming vias on the vias is of particular interest. .

The buried vias can be divided into a method of filling via holes by plating, and a case of filling via vias or the like.

On the other hand, as a method of forming a wiring pattern, a method of etching copper foil (Subtractive process), electrolytic copper plating method (Semi additive process; semi additive method), and electroless copper plating method (Full additive process) Full additive method) and the like, and the semi-additive method that can cope with the higher density of wiring density is drawing attention.

The method of etching copper foil (subtractive method) is by attaching a photosensitive resist on copper foil or copper plating, forming a resist pattern by exposure and development Photo Lithograph method, removing unnecessary copper by etching, and then removing the resist on the last circuit. Remove it.

1A to 1E are flowcharts of a method for manufacturing a high density substrate using the subtractive method according to the prior art.

Referring to FIG. 1A, a reinforcing substrate (rigid substrate or carrier film) 101 to be used as a base substrate is prepared. Referring to FIG. 1B, a reinforcing substrate (rigid substrate or carrier film) 101 is used as a base substrate. The electroless copper plating layer 102 is formed on the electroless copper plating layer.

Then, an electrolytic copper plating layer 103 is formed on the electroless copper plating layer 102 to form an electrolytic copper plating layer. Referring to FIG. 1C, an image forming process is performed on the electrolytic copper plating layer 103 to form a corrosion resist using a photosensitive material. The pattern of 104 is formed on a substrate.

Next, referring to FIG. 1D, the corrosion solution is sprayed to remove copper foil in the remaining regions except for the area protected by the corrosion resist. Referring to FIG. 1E, the corrosion resist which has played a role is removed to finally form a wiring pattern of the copper foil. do.

The ability to form microcircuits when using this method is affected by copper thickness and the resolution of the resist, which is generally said to have an aspect ratio of about 2.0 because of the mechanism of etching copper. If the copper thickness is 10um, the limit is L / S = 20 / 20um.

2A to 2E are flowcharts illustrating a method for manufacturing a high density substrate by the semiadditive process according to the prior art.

Referring to FIG. 2A, a method for manufacturing a high density substrate by the semiadditive process according to the prior art first prepares a reinforcing substrate (rigid substrate or carrier film) 201 to be used as a base substrate.

Referring to FIG. 2B, a thin seed layer 202 is formed on the base substrate by electroless copper plating.

Referring to FIG. 2C, a wiring pattern is formed by exposure and development after laminating a dry film on the thin seed layer 202 formed by electroless copper plating.

Next, referring to FIG. 2D, the electrolytic copper plating layer 204 is formed by electrolytic copper plating on the wiring pattern by a dry film formed on the thin seed layer 202 formed by electroless copper plating to complete the wiring pattern by copper foil. do.

Then, as shown in FIGS. 2E and 2F, the dry film 203 and the seed layer 202 are sequentially removed to complete the circuit pattern.

According to the semiadditive method, when etching an electroless copper seed layer, the residue of the seed layer and the overetching of the circuit width occur, so the limit of the current technology is L / S = 15 / 15um.

3A to 3D are flowcharts illustrating a method for manufacturing a high density substrate by the full additive method according to the prior art.

Referring to FIG. 3A, a method of manufacturing a high density substrate by the full additive method according to the prior art first prepares an insulating resin 301 to be used as a base substrate.

3B, the photosensitive resist 302 is pasted on the insulating resin 301 to form a resist pattern by exposure and development.

Next, referring to FIG. 3C, the electroless copper plating layer 303 is formed by electroless copper plating on the wiring pattern formed by the photosensitive resist 302.

Thereafter, the photosensitive resist 302 is removed to form a circuit.

When using this method, the ability to form microcircuits is affected by the resolution of the resist and the deposition ability of electroless copper plating. The current technology is limited to L / S = 15 / 15um.

On the other hand, when the circuit is formed by the subtractive method described above, there is a limit in the formation of the microcircuit due to the side etching (etching) by the etching solution, each PCB manufacturers adopt the semi-additive method. .

In the case of the semiadditive process, the adhesion of the resist and the adhesion of the copper circuit are largely influenced by the insulating layer material and the surface state when forming the microline. have.

In addition, there is a seed etching process of etching a seed layer formed of an electroless copper or a sputtering copper, and thus there is a limitation in miniaturization due to the harmful effects. Specifically, the circuit is also etched at the same time as the seed layer by seed etching, so it is necessary to correct the plating thickness to be thick and the line width to be thick at the time of pattern plating.

This correction acts as a limit of refinement. In addition, in the case of seed etching, an etching solution penetrates under the copper circuit, resulting in a defect in which the circuit is lifted up. If seed etching is insufficient, short defects may occur due to the residue of the seed layer. This problem is more pronounced as the circuit spacing becomes smaller.

Japanese Laid-Open Patent Publication No. 2004-63575 has the purpose of increasing the area of the copper pad to be mounted, using the cross-sectional CCL as a material, forming a circuit by the subtractive method, and etching the resin. It is completely different from the present invention, and is not suitable for high density because it is formed by a subtractive method.

Japanese Patent Laid-Open No. 2002-335079, Japanese Patent Laid-Open No. 2003-51676, Japanese Patent Laid-Open No. 2003-168867, Japanese Patent Laid-Open No. 2003-218524, Japanese Patent Laid-Open No. 2003-218532, Japanese Patent Laid-Open No. 2003-234577, Japanese Laid Open The circuit forming method described in Japanese Patent Laid-Open Publication No. 2003-289182 and Japanese Laid-Open Patent Publication No. 2004-6687 differs in that the present invention peels the release layer, whereas the metal plate or the metal foil is used as the current application portion, and finally the metal portion is removed by etching. .

Japanese Laid-Open Patent Publication No. 2004-071821 is a method of forming a copper foil on an adhesive layer, forming a circuit by using a subtracted method, and transferring the circuit onto an insulating substrate, which cannot be miniaturized by a subtracted method using a copper foil. There is a flaw.

On the other hand, the wire transfer method by the semi-additive method is drawing particular attention from the advantage that it can cope with free circuit design and can also cope with the multilayer by a batch lamination process. Although the wiring transfer method by this semi-additive process includes the process of forming an insulated resin layer in the wiring formation side surface of a conductive frame, it heat-processes in order to ensure close_contact | adherence with the said wiring surface and the said insulated resin layer.

At this time, the temperature at the time of the said heat processing often reaches the temperature of 200 degreeC or more, and the copper used as a conductive frame and the gold used as a barrier metal generate | occur | produce mutual diffusion by this heat history. After diffusion, an alloy layer is formed to remove the conductive frame, and then the copper-gold alloy is exposed. For example, poor bonding of the flip chip with the gold stud bumps, poor adhesion of the solder bonding agent during solder bonding, Reliability, mounting reliability, and the fall of product ratio may be caused.

In order to solve this problem, Japanese Patent Laid-Open No. 2004-47898 discloses a method for manufacturing a printed wiring board and a method for manufacturing a multilayer printed wiring board. The disclosed method for manufacturing a printed wiring board and a method for manufacturing a multilayer printed wiring board include a metal diffusion barrier layer. Provided is a method of manufacturing a high density substrate.

However, the manufacturing method of the printed wiring board and the manufacturing method of the multilayer printed wiring board of Japanese Patent Application Laid-open No. 2004-47898 have a problem that it takes too much time to remove the conductive frame by etching.

That is, in order to remove the Ni board, which is a conductive wire frame, in the manufacturing method of the wiring board and the manufacturing method of the multilayer printed wiring board of Japanese Patent Laid-Open Publication No. 2004-47898, the first etching based on H2SO4 and the second selective etching are required. The time is 1320 seconds for the first etching, 3600 seconds for the second etching, and the total etching time is 4920 seconds, which is about 1 hour and 30 minutes, so it is difficult to actually use.

More specifically, the nickel board used as the conductive frame in the manufacturing method of the wiring board of Japanese Patent Laid-Open No. 2004-47898 and the manufacturing method of the multilayer printed wiring board is approximately 200 um in thickness.

In this case, the first etching condition is a solution containing 20% H 2 NO 3 and 1.75% H 2 O 2, the temperature is in the range of 30-37.6 ° C., the pressure of the spray is 0.1 MPa, and the chamber length is 1.3 m. The speed is 0.65 m / min.

Then, in the first etching under the above conditions, the etching rate is 7-8um / min, the number of times of the etching is repeated 11 times, and the time required is 1320 seconds.

Next, the second etch uses a solution containing 10% H2SO4 and 1.75% H2O2 as conditions for selective etching only on Nigel boards, using a temperature range of 25.0-27.5 ° C, and spray pressure Is 0.1 MPa, the chamber length is 1.3 m, and the conveyor speed is 0.65 m / min.

Then, in the second etching under the above conditions, the etching rate is 1.0-2.0um / min, the number of times of the etching is repeated 30 times, and the time required is 3600 seconds.

As described above, when the etching is performed using the first etching and the second etching, the time is about 4920 seconds, which takes about 1 hour and 30 minutes, and it is practically difficult to produce a product using this technique.

Therefore, the present invention is to solve the above problems, and to apply a peelable adhesive layer on the reinforcing substrate (rigid substrate or carrier film) used as the base substrate and to form a plating or lamination or sputtering metal thin film on the adhesive layer It is an object of the present invention to provide a method for producing a high density substrate in which a high density circuit is formed by pattern plating using the formed metal thin film as a seed layer.

The present invention for achieving the above object, the first step of attaching the adhesive means on one side end of the reinforcing substrate; Forming a seed layer on the bonding means and forming a circuit pattern on the seed layer; Stacking an insulating layer on the circuit pattern and removing the reinforcing base material; And after the third step, a fourth step of removing the seed layer.

Now, with reference to the drawings of Figure 4a will be described in detail a preferred embodiment of the present invention.

4A to 4G are flowcharts illustrating a method of manufacturing a high density substrate using a base substrate having an adhesive layer according to an embodiment of the present invention.

4A, a high-density substrate using a base substrate having an adhesive layer according to an embodiment of the present invention first prepares a reinforcing base material 401 to be used as a base substrate. As the base material 401 for reinforcement, a rigid substrate or a carrier film is used.

And the base layer is completed by apply | coating the adhesive layer 402 which can peel by heat or ultraviolet irradiation on the reinforcing base material (rigid board | substrate or carrier film) 401 used as a base substrate. At this time, although any material may be used as a material of the reinforcing base material (rigid substrate or carrier film) 401, when using the adhesive layer 402 which can peel by ultraviolet irradiation, it is preferable to use glass.

Referring to FIG. 4B, an adhesive layer 402 is coated on a reinforcing substrate (rigid substrate or carrier film) 401 used as a base substrate. At this time, the material of the adhesive layer 402 may be a material that is significantly lower in adhesion force when the ultraviolet rays are projected (herein, this is called an ultraviolet peeling adhesive layer), and may be a material that is significantly inferior in adhesion force when heat is applied ( Here, this is called a thermal peeling adhesive layer). Herein, the ultraviolet release adhesive layer 402 refers to an adhesive layer in which the adhesive strength of the adhesive layer 402 decreases as time passes by continuously irradiating ultraviolet rays. In addition, the heat-peeling adhesive layer 402 refers to an adhesive layer having a low adhesive force according to the temperature when heat of a constant temperature is applied.

Next, as shown in FIG. 4C, a seed layer 403 for circuit formation is formed by electroless plating or metal foil lamination or sputtering on the adhesive layer 402 with a metal other than that used for circuit formation. .

As shown in FIG. 4D, the circuit layer 404 is formed on the seed layer 403 by pattern plating. The circuit layer 404 is formed by laminating a plating resist layer (not shown), for example, by laminating an ultraviolet photosensitive dry film register, or applying and drying a liquid resist and then subjecting the pattern to photoresist using an exposure mask or the like. Can be formed.

Next, as shown in FIG. 4E, the circuit layer 404 thus formed is embedded in the insulating resin layer 405, and the adhesive layer 402 is peeled off as shown in FIG. 4F, and the seed layer ( 403 is etched as shown in FIG. 4G to expose the circuit surface.

At this time, when the peeling of the adhesive layer 402 is an ultraviolet peeling adhesive layer, ultraviolet rays are irradiated from the reinforcing substrate 401 side to weaken the adhesive force of the adhesive layer 402 to peel off the reinforcing substrate 401. At this time, glass is used as a material of the reinforcing base material 401, and when the ultraviolet rays are irradiated from below, the irradiated ultraviolet rays pass through the reinforcing base material 401 to be irradiated to the adhesive layer 402, and the adhesive force of the adhesive layer 402 is The reinforcing substrate 401 is removed. That is, when ultraviolet rays are irradiated upward from the bottom of the reinforcing substrate (rigid substrate or carrier film) 401 made of glass, the adhesive force of the adhesive layer 402 drops over time, and thus the base substrate is removed after a certain time. do. At this time, the adhesive force of the adhesive layer 402 may be different from the upper surface and the lower surface, and even if the upper surface is smaller than the lower surface, even if the same time ultraviolet light is irradiated, the adhesive force of the upper surface of the reinforcing substrate 401 is the seed layer 403 The adhesive layer 402 is attached to the reinforcing base material 401 that reaches a critical point that can be separated from the seed layer 403. On the contrary, if the lower surface reaches the critical point before the upper surface, only the reinforcing base material 401 is first separated from the seed layer 403, and then the adhesive layer 402 needs to be removed.

On the other hand, in the case where the adhesive layer 402 is a heat peeling adhesive layer, if the adhesive layer 402 is gradually heated, the adhesive force of the adhesive layer 402 is separated from the seed layer 403 when the adhesive layer 402 reaches a predetermined temperature. An exit critical point is reached and as a result the reinforcing substrate 401 is separated from the seed layer 403.

Of course, even in this case, the adhesive force of the adhesive layer 402 may be different from the upper and lower surfaces, and when the upper surface is smaller than the lower surface, the adhesive force of the upper surface may be separated from the seed layer 403 at a predetermined temperature. The adhesive layer 402 is attached to the reinforcing base material 401 that reaches the critical point where it is separated from the seed layer 403. On the contrary, if the lower surface reaches the critical point before the upper surface, only the reinforcing substrate 401 is first separated from the seed layer 403, and then the adhesive layer 402 is removed.

On the other hand, the etching liquid used to etch the seed layer 403 is a metal seed layer without etching the circuit layer 404 when the metal of the circuit layer 404 is different from the metal of the seed layer 403 as described above. An optional etchant that etches only 403 (e.g., etching with dilute sulfuric acid when nickel is used for the metal seed layer) is used.

For example, when the metal seed layer 403 is a nickel layer and has a thickness of 12 μm, a liquid including H ₂ SO ₄ and H ₂ O ₂ is used as an etching solution, the etching temperature is maintained at about 25 ° C., and the spray pressure is 0.1. If the length is set to MPa and the chapter length is 1.3m, the nickel layer can be removed in 390 seconds if the etching rate is repeated 5 times at 1.0m / min.

As described above, the conventional technology takes 3600 seconds, but the present invention takes 390 seconds, so that the etching can be performed in a short time.

On the other hand, any material can be used as long as it can serve as the base substrate of the high density substrate manufacturing method according to the embodiment described above.

In the above description, the adhesive layer is formed on either side of the base substrate, and the circuit layer used for the circuit formation is formed by electroless plating or metal foil lamination or sputtering on the adhesive layer and the metal used for circuit formation. As shown in FIG. 5G, an adhesive layer 502 is formed on either side of the base substrate 501, and a metal such as a metal used for circuit formation as the seed layer 503 for circuit formation is formed on the adhesive layer 502. The seed layer 503 used for circuit formation may be formed by plating or metal foil lamination or sterling.

As described above, when a material such as a metal used for forming a circuit is used, the process is as follows.

Referring to FIG. 5A, a high-density substrate using a base substrate having an adhesive layer according to another embodiment of the present invention first prepares a reinforcing substrate 501 used as a base substrate. Here, a rigid substrate or a carrier film is used as the reinforcing base material 501.

The base substrate is completed by applying an adhesive layer 502 that can be peeled off by heat or ultraviolet irradiation on the reinforcing base material 501 used as the base substrate. At this time, any material may be used as the material of the reinforcing base material 501. When using the adhesive layer 502 which can be peeled off by ultraviolet irradiation, glass is preferably used.

Referring to FIG. 5B, an adhesive layer 502 is coated on the reinforcing base material 501 used as the base substrate. At this time, as the material of the adhesive layer 502, an ultraviolet peeling adhesive layer or a heat peeling adhesive layer can be used.

Next, as shown in FIG. 5C, a seed layer 503 for forming a circuit is formed by electroless plating or metal foil stacking or sputtering a metal such as a metal used for forming a circuit on the adhesive layer 502. .

5D, a circuit layer 504 is formed on the seed layer 503 by pattern plating. The formation of the circuit layer 504 is performed by laminating a plating resist layer (not shown), for example, by laminating an ultraviolet photosensitive dry film register, or applying and drying a liquid resist and pattern-sensitive using an exposure mask or the like. Can be formed.

Next, as shown in FIG. 5E, the circuit layer 504 formed as described above is embedded in the insulating resin layer 405, and the adhesive layer 502 is peeled off as shown in FIG. 5F, and the seed layer ( 503 is flash etched to expose the circuit surface as shown in FIG. 5G.

Meanwhile, although a single layer is used as the material of the adhesive layer from above, an adhesive tape may be used, and FIGS. 6A to 6G and 7A to 7G show the case where the adhesive tape is used.

6A to 6G are flowcharts illustrating a method of manufacturing a high density substrate according to another embodiment of the present invention, and show an example of using an adhesive tape.

Referring to FIG. 6A, in the method of manufacturing a high density substrate according to another embodiment of the present invention, first, an adhesive tape having UV peeling adhesive layers 602a and 602b formed on both surfaces of a tape substrate 601 is prepared.

As shown in FIG. 6B, an adhesive tape having ultraviolet peeling adhesive layers 602a and 602b formed on both sides of the tape base material 601 is attached onto the glass base substrate 603.

Next, as shown in FIG. 6C, when the metal used for circuit formation is copper, an electroless plating or metal foil lamination or sputtering of a metal different from copper (for example, nickel) is used as the metal seed layer 604. It is formed on the adhesive layer 602a.

Thereafter, as shown in FIG. 6D, a circuit layer 605 is formed on the seed layer 604 by pattern plating. The formation of such a circuit layer 605 is performed by laminating a plating resist layer (not shown), for example, by laminating an ultraviolet photosensitive dry film register, or applying and drying a liquid resist and subjecting the pattern to light using an exposure mask or the like. Can be formed.

Next, as shown in FIG. 6E, the circuit layer 605 formed as described above is embedded in the insulating resin layer 606, and as shown in FIG. 6F, the adhesive layer 602a is formed on both sides of the tape base material 601. 602b) is removed. At this time, when the adhesive layer 602a is peeled off by irradiating ultraviolet rays from the base substrate 603, the base layer 603 is separated into the copper seed layer 604, the adhesive tape, and the glass base substrate 603. In this way, the base substrate 603 can be reused and the production cost can be suppressed.

Finally, as shown in FIG. 6G, the seed layer 604 of the substrate portion is etched to expose the circuit surface.

On the other hand, although the case where an ultraviolet peeling adhesion layer is used in FIGS. 6A-6G is demonstrated, it applies similarly to the case of using a heat peeling adhesion layer.

6A to 6G illustrate the case where the seed layer and the circuit layer are different metals, but the same metal is the same as the case of FIGS. 7A to 7G below.

7A to 7G are flowcharts illustrating a method of manufacturing a high density substrate according to another embodiment of the present invention.

Referring to FIG. 7A, in the method of manufacturing a high density substrate according to another embodiment of the present invention, first, an adhesive tape having UV peeling adhesive layers 702a and 702b formed on both sides of the tape substrate 701 is prepared.

As shown in FIG. 7B, an adhesive tape having ultraviolet peeling adhesive layers 702a and 702b formed on both sides of the tape base material 701 is attached onto the glass base substrate 703.

Next, as shown in FIG. 7C, when the metal used for forming the circuit is copper, an electroless plating or metal foil lamination or sputtering of the same metal as copper as the metal seed layer 704 is formed on the adhesive layer 702a. do.

Thereafter, as shown in FIG. 7D, a circuit layer 705 is formed on the seed layer 704 by pattern plating. The circuit layer 705 is formed by laminating a plating resist layer (not shown), for example, by laminating an ultraviolet photosensitive dry film register, or applying and drying a liquid resist, and then subjecting the pattern to photoresist using an exposure mask or the like. Can be formed.

Next, as shown in FIG. 7E, the circuit layer 705 thus formed is embedded in the insulating resin layer 706, and as shown in FIG. 7F, the adhesive layer 702a is formed on both sides of the tape base material 701. 702b) is removed. In this case, when the adhesive layer 702a is peeled off by irradiating ultraviolet rays from the base substrate 703, the copper seed layer 704, the adhesive tape, and the glass base substrate 703 are separated. In this way, the base substrate 703 can be reused and the production cost can be suppressed.

Finally, as shown in FIG. 7G, the seed layer 704 of the substrate portion is fresh etched to expose the circuit surface.

On the other hand, although the case where an ultraviolet peeling adhesive layer is used in FIGS. 7A-7G is demonstrated, it applies similarly to the case where a heat peeling adhesive layer is used.

According to the present invention, it is possible to form microcircuits of all printed substrates such as single-sided boards, double-sided boards, multilayer boards, build-up boards, flexible boards, multi-flex boards, and rigid-flexible boards.

What has been described above is just one embodiment for carrying out the method for manufacturing a high density substrate according to the present invention, and the present invention is not limited to the above-described embodiment, and as claimed in the following claims, the gist of the present invention Without departing from the technical spirit of the present invention to the extent that any person of ordinary skill in the art to which the present invention pertains various modifications can be made.

According to the present invention as described above, when the microcircuit is formed of a photo resist, the resist adhesion is greatly affected by the insulating layer material and the surface state, the surface of the substrate can be made of metal to form a surface that is optimal for adhesion of the resist Therefore, there exists an effect which can pull out the adhesive force of a resist to the maximum.

In addition, according to the present invention, since the metal seed layer is etched after laminating the circuit surface of the base substrate to the insulating layer, it is not necessary to flash etching such as the semi-additive method, thereby forming a fine circuit by the semi-additive method described above. There is an effect that the problem caused by seed etching that occurs when doing so is eliminated.

In addition, according to the present invention, since there is no overetching phenomenon of the circuit by flash etching generated by the semi-additive method, the circuit can be formed more finely, the accuracy of the line width is improved, and the impedance characteristic is also stabilized. There is.

In addition, according to the present invention, since the etching of the metal thin film is performed on the back side as compared to the seed etching of the semi-additive method, there is an effect that the process is easy and the process management is convenient.

In addition, according to the present invention, since the circuit is laminated to the insulating resin layer and the circuit is incorporated in the insulating layer, there is no unevenness of the circuit, defects caused by damage in the process are reduced, and production in high yield is expected. It can be effective.

In addition, according to the present invention, since the circuit is embedded in the insulating layer, the close contact between the circuit and the insulating layer is made on the bottom and side surfaces of the circuit, so that the adhesion strength can be increased, and insulation that has not been used in the conventional construction method can be improved. There is an effect that the material can be used.

Claims (10)

A first step of attaching an adhesive means to one end of the reinforcing substrate; Forming a seed layer on the bonding means and forming a circuit pattern on the seed layer; Stacking an insulating layer on the circuit pattern and removing the reinforcing base material; And After the third step, a method for producing a high density substrate comprising a fourth step of removing the seed layer. The method of claim 1, And said bonding means is an ultraviolet release adhesive. The method of claim 2, The third step, Stacking an insulating layer on the circuit pattern on the seed layer; 3-2 step of irradiating ultraviolet rays from the lower portion of the reinforcing substrate; And Method for producing a high-density substrate comprising the third step of removing the reinforcing substrate. The method of claim 1, And said bonding means is a heat release adhesive. The method of claim 4, wherein The third step, Stacking an insulating layer on the circuit pattern on the seed layer; Step 3-2 of applying heat to the bonding means; And Method for producing a high-density substrate comprising the third step of removing the reinforcing substrate. The method of claim 1, The adhesion means A method for producing a high-density substrate, characterized in that the adhesive tape is provided with an ultraviolet release adhesive layer on both sides of the tape base material. The method of claim 6, The third step, Stacking an insulating layer on the circuit pattern on the seed layer; A third step of irradiating ultraviolet rays under the reinforcing substrate upward; And Method of manufacturing a high-density substrate comprising a third step of removing the reinforcing substrate. The method of claim 1, The adhesion means It is an adhesive tape in which the heat peeling adhesive layer is formed in both surfaces of a tape base material, The manufacturing method of the high density board | substrate characterized by the above-mentioned. The method of claim 8, The third step, Stacking an insulating layer on the circuit pattern on the seed layer; Step 3-2 of applying heat to the thermal peel adhesive layer; And Method of manufacturing a high-density substrate comprising a third step of removing the reinforcing substrate. The method according to any one of claims 1 to 9, The metal used in the seed layer and the circuit pattern is characterized in that the same metal, And the etching of the fourth step is a soft etching.

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