KR100687882B1 - Semiconductor device having bit line and its manufacturing process - Google Patents

Abstract

According to the present invention, a semiconductor device having a bit line capable of preventing a short circuit caused by a bridge between a bit line and a storage node contact or a bit line contact and a word line, and at the same time preventing a problem such as thinning or falling of the bit line itself. And a method for producing the same.

A semiconductor device having a bit line of the present invention includes a semiconductor substrate; An isolation layer formed in a predetermined region on the semiconductor substrate and having a trench defining a bit line formation region; A bit line insulating layer formed on an inner surface of the trench; And a bit line conductive layer formed on the bit line insulating layer to fill the trench.

Bit Line, Trench, Device Isolation

Description

A semiconductor device having a bit line and a manufacturing method therefor {SEMICONDUCTOR DEVICE HAVING BIT LINE AND ITS MANUFACTURING PROCESS}

1 is a simplified diagram of a semiconductor device having a bit line according to an embodiment of the present invention;

2A to 2C are reference diagrams illustrating the formation of word lines and landing plug contacts in a semiconductor device having a bit line of FIG. 1;

3A to 3C are flowcharts illustrating a process of manufacturing a semiconductor device having a bit line of FIG. 1;

4 is a simplified diagram of a semiconductor device having a bit line according to another embodiment of the present invention.

Brief description of the symbols in the drawing

100 semiconductor substrate 102 device isolation film

104: trench 106: bit line insulating film

108: bit line conductive film 110: word line

112, 114: landing plug contact 116: spacer

According to the present invention, a semiconductor device having a bit line capable of preventing a short circuit caused by a bridge between a bit line and a storage node contact or a bit line contact and a word line, and at the same time preventing a problem such as thinning or falling of the bit line itself. And a method for producing the same.

In a semiconductor device such as a DRAM, a bit line serves as an input / output line as a path through which data flows.

Hereinafter, according to the prior art, a method for manufacturing a semiconductor device having such a bit line will be briefly described.

First, an isolation layer is formed on a semiconductor substrate to define an active region and an isolation region, and a plurality of word lines are formed on the semiconductor substrate on which the isolation layer is formed. Thereafter, a landing plug contact is formed between the plurality of word lines, that is, a semiconductor substrate of an active region, that is, a semiconductor substrate of a storage node portion and a bit line node portion, respectively.

Thereafter, a bit line contact connected thereto is formed on the landing plug contact formed to be connected to the semiconductor substrate of the bit line node part, and a bit line is formed on the bit line contact.

Subsequently, a storage node contact connected thereto is formed on the landing plug contact formed to be connected to the semiconductor substrate of the storage node unit, and a storage node is formed on the storage node contact.

At this time, between the storage node contact, the bit line and the bit line contact, and the landing plug contact connected to the semiconductor substrate of the bit line node portion and the storage node portion, respectively, are insulated by an interlayer insulating film.

However, in recent years, as semiconductor devices have become highly integrated and extremely fine, process margins for forming the bitline contacts and the storage node contacts have been greatly reduced. Thus, in the process of forming the bitline contacts, misalignment of masks is performed. For example, the bit line contact is bridged with the word line, causing a short circuit.

In addition, in the process of forming the storage node contact, as the process margin is greatly reduced as described above, such a storage node contact is bridged with the bit line due to misalignment of the mask, so that a short circuit occurs. have.

For this reason, the electrical characteristics of the semiconductor device to be finally produced is greatly reduced, the defect rate of the semiconductor device is greatly increased, and the yield of the semiconductor device manufacturing process is significantly decreased.

In addition, the bit line is one of the thinnest wires formed in a semiconductor device such as a DRAM. The process of forming a bit line while reducing the width of the bit line as the semiconductor device becomes highly integrated and ultra fine. In addition, problems such as formation or collapse of the bit line itself are also appearing.

In this case, since the failure of the data line occurs and the repair thereof is limited, this also acts as a factor that greatly reduces the reliability of the semiconductor device and the yield of the manufacturing process.

Due to the problems of the prior art, it is possible to prevent a short circuit caused by a bridge between the bit line and the storage node contact or a bridge between the bit line contact and the word line, and also the problem of the bit line becoming too thin or falling down. There is a continuing need for development of new bit line related technologies that can be prevented.

Accordingly, the present invention can prevent a short circuit caused by a bridge between the bit line and the storage node contact or a bridge between the bit line contact and the word line, while preventing the bit line from becoming too thin or falling down. It is to provide a semiconductor device having a novel bit line structure.

Another object of the present invention is to provide a method of manufacturing a semiconductor device having the bit line.

In order to achieve this object, the present invention is a semiconductor substrate; An isolation layer formed in a predetermined region on the semiconductor substrate and having a trench defining a bit line formation region; A bit line insulating layer formed on an inner surface of the trench; And a bit line including a bit line conductive layer formed on the bit line insulating layer to fill the trench.

In the semiconductor device having the bit line according to the present invention, the bit line insulating layer may be formed as spacers on both inner surfaces of the trench. At this time, the spacer may be formed to a thickness of 50-200Å.

In addition, in the semiconductor device having the bit line of the present invention, the bit line insulating film may include a nitride film or an oxide film, and the bit line conductive film may include aluminum, tungsten, titanium, or titanium nitride. .

The present invention also provides a method of forming an isolation layer on a semiconductor substrate; Etching the device isolation layer to a predetermined depth to form a trench defining a bit line formation region; Forming a bit line insulating film on an entire surface of the semiconductor substrate on which the trench is formed; Forming a bit line conductive layer on the bit line insulating layer to fill the trench; And removing the bit line conductive layer and the bit line insulating layer on the semiconductor substrate and the device isolation layer.

In the method of manufacturing a semiconductor device having a bit line according to the present invention, after forming the bit line insulating layer, etching the bit line insulating layer formed on the inner surface of the trench to form spacers on both inner surfaces of the trench. It may further include, in this case, the spacer may be formed to a thickness of 50-200Å.

In addition, in the method of manufacturing a semiconductor device having a bit line of the present invention, the bit line insulating film may include a nitride film or an oxide film, and the bit line conductive film may include aluminum, tungsten, titanium, or titanium nitride. Can be done.

Hereinafter, a semiconductor device having a bit line and a manufacturing method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. However, this is presented as an example and thereby does not determine the scope of the present invention.

1 is a simplified diagram of a semiconductor device having a bit line according to an embodiment of the present invention, and FIGS. 2A to 2C illustrate a word line and a landing plug contact in the semiconductor device having a bit line of FIG. 1. 3A to 3C are flowcharts illustrating a process of manufacturing a semiconductor device having a bit line of FIG. 1.

First, a configuration of a semiconductor device having a bit line according to the present embodiment will be described in detail.

Referring to FIG. 1, in a semiconductor device having a bit line according to the present embodiment, first, an isolation layer 102, for example, a trench type isolation layer formed through an STI process is formed on a semiconductor substrate 100. It is. The device isolation layer 102 defines the active region and the device isolation region on the semiconductor substrate 100.

The device isolation film 102 has a structure in which a field oxide film is embedded in a trench of a predetermined depth on the semiconductor substrate 100 according to a conventional structure of a trench type device isolation film.

In the device isolation layer 102, for example, one or more trenches 104 are formed by etching the field oxide layer to a predetermined depth to define a bit line formation region.

In addition, the inner surface of the trench 104 has a bit line insulating film 106 for more reliably insulated between the bit line conductive film 108 formed in the trench 104 and the active region adjacent to the device isolation film 102. ) Is formed. The bit line insulating film 106 may be formed of an insulating film including an oxide film or a nitride film.

A bit line conductive layer 108 is formed on the bit line insulating layer 106 to fill the trench 104. The bit line conductive layer 108 may be formed of, for example, a conductive layer including a metal material such as aluminum, tungsten, titanium, or titanium nitride.

That is, in the semiconductor device having the bit line according to the present embodiment, the bit line insulating layer 106 and the landing plug contact connected to the semiconductor substrate of the bit line node portion and the bit line contact thereon are not formed. A bit line including the bit line conductive film 108 is buried in the trench 104 on the device isolation film 102 defining the active region and the device isolation region of the semiconductor substrate 100.

Hereinafter, the operation and effect of the semiconductor device having the bit line according to the present exemplary embodiment will be described with reference to FIGS. 2A to 2C. 2B is a cross-sectional view along the line AA ′ of FIG. 2A, and FIG. 2C is a cross-sectional view along the line B-B ′ of FIG. 2A.

As shown in FIGS. 2A to 2C, a plurality of word lines 110 are formed on the semiconductor substrate 100 according to a conventional process in the semiconductor device having the bit lines according to the present embodiment, and the plurality of word lines When the landing plug contacts 112 and 114 are formed between the word line 110 and the semiconductor substrate 100 in the active region, the landing plug is connected to the semiconductor substrate 100 in the storage node portion as in the conventional semiconductor device. At the same time as the contact 112 is formed (see FIG. 2C), the remaining landing plug contact 114 is formed to be connected to the bit line conductive film 108 buried in the trench 104 on the device isolation layer 102. (See FIG. 2B).

That is, in the semiconductor device having the bit line of the present embodiment, the bit line including the bit line insulating film 106 and the bit line conductive film 108 is buried in the trench 104 on the device isolation film 102. As such, there is no fear that such a bit line may be connected or shorted with a storage node contact (not shown) formed on the landing plug contact 112 connected to the semiconductor substrate 100 of the storage node unit.

In addition, since the bit line is directly connected to the landing plug contact 114, it is not necessary to form a bit line contact separately, and thus, between the bit line contact and the word line 110 on the semiconductor substrate, There is no fear of short circuit caused by connection.

In addition, in the semiconductor device having the bit line according to the present embodiment, the width of the bit line can be sufficiently secured by the width of the device isolation film 102 between the active regions, so that the bit line itself becomes too thin or collapsed. As a result, the problem of the prior art in which the failure of the data line appears can be prevented.

On the other hand, in the semiconductor device having a bit line according to an embodiment of the present invention described above, the bit line insulating film 106 is formed in a general thin film form on the inner surface of the trench 104 on the device isolation layer 102, According to another exemplary embodiment of the present invention, as illustrated in FIG. 4, the bit line insulating layer may be formed as spacers 116 on both inner surfaces of the trench 104. In this case, the spacer 116 may be formed to a thickness easily determined by those skilled in the art in consideration of the depth and width of the trench 104 and the distance between the trench 104 and the active region adjacent thereto. It is preferable that it is formed in the thickness of 50-200 GPa.

Even with the configuration of the semiconductor device having the bit line according to another embodiment of the present invention, it is apparent that the same operation and effect as the above-described embodiment of the present invention can be exhibited.

However, the semiconductor device including the bit line according to another embodiment of the present invention has the same configuration as the embodiment of the present invention except that the bit line insulating layer is formed as the spacer 116. Since a detailed description thereof will be omitted.

Next, a method of manufacturing a semiconductor device having a bit line according to an embodiment of the present invention will be described in detail.

First, as shown in FIG. 3A, an isolation layer 102 is formed on the semiconductor substrate 100 to define an isolation region and an active region. In this case, the device isolation layer 102 may be formed as a trench type device isolation layer, for example, according to a conventional STI process.

Next, the device isolation layer 102 is etched to a predetermined depth to form one or more trenches 104 defining the formation region of the bit line on the device isolation layer 102. The trench 104 forms a photoresist pattern (not shown) defining a bit line formation region on the entire surface of the semiconductor substrate 100 on which the device isolation layer 102 is formed, and forms the device isolation layer using the photoresist pattern as a mask. It can be formed by etching a predetermined depth.

After forming the trench 104 in which the bit line is to be formed, as illustrated in FIG. 3B, a bit line insulating layer 106 is deposited and formed on the entire surface of the semiconductor substrate 100 on which the trench 104 is formed. The bit line insulating film 106 may be formed by, for example, depositing an insulating film including an oxide film or a nitride film by a conventional insulating film deposition method.

After the bit line insulating layer 106 is formed, a bit line conductive layer 108 is deposited and formed to fill the trench 104 on the bit line insulating layer 106 as shown in FIG. 3C. The bit line conductive layer 108 may be formed of a conductive layer including a metal material such as aluminum, tungsten, titanium, or titanium nitride.

Then, by removing the bit line conductive film 108 and the bit line insulating film 106 on the semiconductor substrate 100 and the device isolation film 102, as shown in FIG. It is possible to manufacture a semiconductor device having a bit line according to the. In this case, the bit line conductive layer 108 and the bit line insulating layer 106 on the semiconductor substrate 100 and the device isolation layer 102 may be removed by planarization through chemical and mechanical polishing processes.

Through the above-described manufacturing process, the semiconductor device having the bit line illustrated in FIG. 1 is finally formed, and then, a word line, a landing plug contact, a storage node, and the like are formed according to a conventional process configuration, and finally, A semiconductor device can be manufactured.

Meanwhile, in the above-described manufacturing process, after the bit line insulating layer 106 is formed, the bit line insulating layer 106 formed on the inner surface of the trench 104 is etched to form spacers 116 on both inner surfaces of the trench 104. ) May be further proceeded. If the process of forming the spacer 116 is further performed and the same subsequent process as described above, that is, the process of forming the bit line conductive film 108 and the planarization process, is performed, another embodiment of the present invention as shown in FIG. A semiconductor device having a bit line according to an example may be formed. Here, the spacer 116 is preferably formed to a thickness of 50-200Å.

However, the process configuration for manufacturing a semiconductor device having a bit line according to another embodiment of the present invention includes the above-described bit line, except that an etching process for forming the spacer 116 is added. Since the same process configuration as the manufacturing process of one semiconductor device follows, detailed description thereof will be omitted.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, it is possible to prevent the problem of the related art in which a short circuit occurs between the bit line and the storage node contact or between the bit line contact and the word line, and at the same time, sufficiently secure the width of the bit line. As a result, problems such as excessively thin or falling bit lines can be prevented.

According to the present invention, it is possible to manufacture a semiconductor device with improved electrical characteristics and reliability, it is possible to greatly contribute to improving the yield and economical efficiency of the semiconductor device manufacturing process by reducing defects due to the short circuit.

Claims (10)

Semiconductor substrates; An isolation layer formed in a predetermined region on the semiconductor substrate and having a trench defining a bit line formation region; A bit line insulating layer formed on an inner surface of the trench; And And a bit line including a bit line conductive layer formed on the bit line insulating layer so as to fill the trench. The semiconductor device of claim 1, wherein the bit line insulating layer includes bit lines formed on both inner surfaces of the trench as spacers. 3. The semiconductor device of claim 2, wherein the spacer has a bit line formed to a thickness of 50-200 microns. The semiconductor device according to any one of claims 1 to 3, wherein the bit line insulating film includes a nitride film or an oxide film. The semiconductor device according to claim 1, wherein the bit line conductive film comprises aluminum, tungsten, titanium or titanium nitride. Forming an isolation layer on the semiconductor substrate; Etching the device isolation layer to a predetermined depth to form a trench defining a bit line formation region; Forming a bit line insulating film on an entire surface of the semiconductor substrate on which the trench is formed; Forming a bit line conductive layer to fill the trench over the bit line insulating layer; And And removing a bit line conductive layer and a bit line insulating layer on the semiconductor substrate and the device isolation layer. The semiconductor device of claim 6, further comprising, after the forming of the bit line insulating layer, etching the bit line insulating layer formed on the inner surface of the trench to form spacers on both inner surfaces of the trench. Manufacturing method. 8. The method of claim 7, wherein the spacer has a bit line formed to a thickness of 50-200 microns. The semiconductor device manufacturing method according to any one of claims 6 to 8, wherein the bit line insulating film includes a nitride film or an oxide film. The method of manufacturing a semiconductor device with a bit line according to any one of claims 6 to 8, wherein the bit line conductive film comprises aluminum, tungsten, titanium or titanium nitride.

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