KR100687330B1 - Method and processing chamber for manufacturing thin film transistor - Google Patents

Abstract

In the present invention, in the formation of the via hole and the connection wiring connected to the drain electrode under the via hole, the thin film transistor can be simplified by performing a film deposition and etching process for forming the via hole and the connection wiring in an in-line manner. It is about a method.

A method of manufacturing a thin film transistor according to the present invention includes forming a gate electrode and a gate insulating film on an insulating substrate, forming an active layer on the gate insulating film, and applying a source / drain electrode to cover a portion of the active layer on the gate insulating film. Forming a protective film having a via hole for exposing the drain electrode by ion beam etching and subsequently performing ion beam etching on the insulating film, and depositing a conductive film to cover the insulating film, It is characterized in that it comprises a step of continuously performing an ion beam etching on the conductive film to form a connection wiring connected to the drain electrode through the via hole.

Forming a gate electrode and a gate insulating film on the insulating substrate, forming an active layer on the gate insulating film, forming a source / drain electrode to cover a portion of the active layer on the gate insulating film, and forming a gate insulating film on the gate insulating film. A process chamber for advancing a thin film transistor manufacturing process comprising the step of forming a protective film having a via hole exposing a drain electrode, and forming a connection wiring film connected to the drain electrode through the via hole on the protective film. The present invention is connected to the first process chamber and the first process chamber in an inline manner to proceed with the film deposition process on the substrate, and to continuously pass the ion beam etching process to the deposited film to form a protective film or connection wiring It is characterized by including a second process chamber.

Therefore, according to the method of manufacturing the thin film transistor of the present invention, the film deposition process and the etching process are continuously performed, thereby simplifying the process time and the process.

In addition, the process chamber of the present invention includes a first process chamber in which the deposition process is performed and a second process chamber in which the ion beam etching process is performed in one space, thereby allowing the film deposition process and the etching process to proceed continuously. Is simplified.

Description

Manufacturing Method of Thin Film Transistor and Process Chamber for Implementing the Same {METHOD AND PROCESSING CHAMBER FOR MANUFACTURING THIN FILM TRANSISTOR}

1a to 1g is a manufacturing process diagram of a thin film transistor according to the prior art.

2 is a schematic view of a process chamber according to the prior art;

3a to 3d is a manufacturing process diagram of a thin film transistor according to the present invention.

Figure 4 schematically shows a process chamber according to the present invention.

5 is a cross-sectional view showing a part of a process chamber according to the present invention.

The present invention relates to a method for manufacturing a thin film transistor (Thin Film Transistor) and a process chamber for performing the same, in particular, in forming a via hole and forming a connection wiring connected to a lower drain electrode through the via hole. The present invention relates to a method of manufacturing a thin film transistor which can simplify the process by continuously performing the film deposition and ion beam etching processes for forming the interconnection line in an inline manner.

In the manufacture of TFT-LCD (Thin Film Transistor-Liquid Crystal Display) equipped with a TFT substrate or a color filter substrate, in particular, when forming an TFT-array, thin film deposition, etching, etc. It is repeated in turn.

Thin film deposition includes a sputter method for depositing a metal film and a transparent electrode, and a plasma enhanced chemical vapor deposition (PECVD) method for depositing silicon and an insulating film.

The thin film deposited by the above methods involves an etching process for selectively removing a pattern formed by the photosensitive film using a physical chemical reaction.

Therefore, in order to secure the productivity and yield of the TFT-LCD, an effort to simplify the process of deposition and etching is required.

1A to 1G are manufacturing process diagrams of a thin film transistor according to the prior art.

Referring to FIG. 1A, a metal thin film is formed on a transparent substrate 11 by sputtering a metal such as aluminum. The metal thin film is patterned to remain only in a predetermined portion of the insulating substrate 11 by a photolithography method including a wet method to form the gate electrode 13.

Referring to FIG. 1B, an insulating material such as silicon oxide or silicon nitride is chemically deposited on the insulating substrate 11 so as to cover the gate electrode 13. The gate insulating film 15 may be referred to as CVD. ).

Thereafter, the silicon layer not doped with impurities and the silicon layer heavily doped with impurities are sequentially CVD on the gate insulating film 15.

The active layer 17 and the ohmic contact layer 19 are patterned by patterning the silicon layer which is not doped with the impurity and the silicon layer that is heavily doped with the impurity so that the gate insulating layer 15 is exposed by a photolithography method including anisotropic etching. ).

Referring to FIG. 1C, a metal thin film is formed by depositing a metal such as molybdenum (Mo) by the CVD method or the sputtering method to cover the ohmic contact layer 19 on the gate insulating film 15. In the above, the ohmic contact layer 19 and the metal thin film form ohmic contact.

The metal thin film is patterned to expose the gate insulating film 13 by a photolithography method to form source and drain electrodes 21 and 23. At this time, the portion corresponding to the gate electrode 13 between the source and drain electrodes 21 and 23 removes the ohmic contact layer 19 so that the active layer 17 is exposed.

Referring to FIG. 1D, a passivation layer 25 is formed by CVD an insulating film such as silicon oxide over the entire structure.

Referring to FIG. 1E, the passivation layer 25 is patterned to expose the drain electrode 23 by a photolithography method including wet etching to form a via hole h1.

Referring to FIG. 1F, an indium tin oxide (ITO) metal film 27 is deposited on the passivation layer 25.

Referring to FIG. 1G, the ITO metal film 27 is patterned by a photolithography method to form a connection wiring 27. The connection line 27 is electrically connected to the drain electrode 23 through the via hole h1.

2 is a view schematically showing a process chamber according to the prior art.

Conventional protective film formation and etching process, and ITO metal deposition and etching process, as shown in Figure 2, first proceeds the protective film or ITO metal film deposition process on the substrate in the deposition chamber, and then again protective film or ITO metal film deposition process The completed substrate is moved to an etching chamber and processed in such a manner that the etching process is performed.

However, in the conventional method, since the film deposition process and the etching process are performed separately in the via hole and the connection wiring forming process, the work process is complicated. In addition, when the protective film wet etching process for forming the via hole is performed, the lower layer is damaged by the etchant.

In addition, in the conventional process chamber, as the film deposition process and the etching process are performed in different chambers in the via hole and the connection wiring forming process, the work process becomes complicated and there is a problem in that the production stage is increased.

Accordingly, an object of the present invention is to provide a method of manufacturing a thin film transistor which can simplify the process by successively proceeding the film deposition process and the etching process.

Another object of the present invention is to provide a process chamber capable of continuously performing a film deposition process and an etching process.

In order to achieve the above object, a method of manufacturing a thin film transistor according to the present invention comprises the steps of forming a gate electrode and a gate insulating film on an insulating substrate, forming an active layer on the gate insulating film, a part of the active layer on the gate insulating film Forming a protective film having a via hole exposing the drain electrode by sequentially performing an ion beam etching on the insulating film, and subsequently depositing an insulating film covering the source / drain electrode to cover the source / drain electrode; And depositing a conductive film so as to cover the conductive film, and subsequently forming an interconnection line connected to the drain electrode through the via hole by sequentially performing ion beam etching on the conductive film.

In order to achieve the above another object, a process of forming a gate electrode and a gate insulating film on an insulating substrate, a process of forming an active layer on a gate insulating film, and forming a source / drain electrode to cover a portion of the active layer on the gate insulating film And forming a protective film having a via hole exposing the drain electrode on the gate insulating film, and forming a connection wiring film connected to the drain electrode through the via hole on the protective film. In the process chamber of the present invention, the present invention relates to a first chamber for performing a film deposition process on a substrate, and is connected in-line with the first chamber, and continuously performs an ion beam etching process on the deposited film to form a protective film or connection. It is characterized by including a second chamber for forming wiring.

3a to 3d is a manufacturing process diagram of a thin film transistor according to the present invention.

Referring to FIG. 3A, a metal thin film is formed by sputtering or CVD a metal such as aluminum (Al) or molybdenum (Mo) on a transparent insulating substrate 111 such as glass.

The metal thin film is patterned to remain only in a predetermined portion of the insulating substrate 111 by a photolithography method to form a gate electrode 113.

As illustrated in FIG. 3B, an insulating film such as silicon oxide or silicon nitride is deposited on the insulating substrate 111 to form the gate insulating film 115.

After the impurity doped polysilicon layer and the impurity doped silicon layer are sequentially formed on the gate insulating film 115, the active layer 117 and the ohmic contact layer are patterned to cover the gate electrode by photolithography. Form 119.

In addition to using polycrystalline silicon, the active layer 117 may also use amorphous silicon. In the method of using amorphous silicon, first, amorphous silicon is deposited on a gate insulating film, and then crystallized by instantaneously heating at a high temperature using a laser beam or the like, and the crystallized silicon layer is free of impurities as an ohmic contact layer. It is formed by pattern etching together with the doped silicon layer.

As shown in FIG. 3C, a metal thin film is formed on the gate insulating layer 115 to cover the active layer 117 and the ohmic contact layer 119, and then patterned by photolithography to obtain source / drain electrodes 121 and 123. To form.

The source / drain electrode forming material may be formed of a single metal layer of molybdenum (Mo) and molybdenum alloys (Mo alloy) such as MoW, MoTa, and MoNb, but may be formed of two or more multilayer metal layers in which aluminum (Al) is formed on a lower layer. It may also be formed.

At this time, the ohmic contact layer 119 corresponding to the gate electrode 113 between the source and drain electrodes 121 and 123 is removed to expose the active layer 117.

4 is a view schematically showing a process chamber according to the present invention, Figure 5 is a cross-sectional view showing a second process chamber that is part of the process chamber according to the present invention.

3D and 4, the insulating substrate 111 on which the source / drain electrodes 121 and 123 are formed is moved to the deposition chamber in the process chamber of the present invention.

The process chamber 400 of the present invention is connected to the first process chamber and the first process chamber in-line with the first process chamber for proceeding the film deposition process on the substrate as shown in FIG. 4, and the ion beam etching process on the deposited film. And a second process chamber for continuously advancing to form a protective film or connection wiring. The first process chamber and the second process chamber are in a vacuum state.

In the present invention, the second process chamber, as shown in Figure 5, the chamber body 500, the respective gas inlet 502 formed in the chamber body 500, the exhaust port 504, the gas inlet 502 ) Between the ion source 506, the electrode 508, the seating portion 512 on which the substrate 510 is seated, and the electrode 508 and the seating portion 512 And an acceleration plate 514 installed to assist the acceleration of ions, and a mask 516 disposed between the acceleration plate 514 and the seating portion 512.

3D and 4, an insulating film is deposited to cover the source / drain electrodes 121 and 123 on the insulating substrate 111 in the first process chamber.

Thereafter, the substrate 111 on which the insulating film is deposited is moved to the second process chamber to continuously perform ion beam etching. In other words, the gas supplied from the gas inlet 502 of the second process chamber accelerates while passing through the ion source 506 and the electrode 508 and passes through the mask 516 to be placed on the seat 512. To etch).

As a result of the ion beam etching, the passivation layer 125 having the via hole h2 exposing the drain electrode 123 is formed.

3E and 5, the ITO metal layer 127 is deposited to move the substrate 111 to the first process chamber to cover the passivation layer 125 including the via hole h2. Subsequently, the substrate on which the ITO metal film is deposited is moved to the second process chamber to continuously perform an ion beam etching process. As a result of the ion beam etching, a connection wiring 127 is formed to be connected to the drain electrode 123 through the via hole h2.

Therefore, according to the method of manufacturing the thin film transistor of the present invention, the film deposition process and the etching process are continuously performed, thereby simplifying the process time and the process.

In addition, the process chamber of the present invention includes a first process chamber in which the deposition process is performed and a second process chamber in which the ion beam etching process is performed in one space, thereby allowing the film deposition process and the etching process to proceed continuously. Is simplified.

Claims (4)

Forming a gate electrode and a gate insulating film on the insulating substrate; Forming an active layer on the gate insulating film; Forming a source / drain electrode on the gate insulating film to cover a portion of the active layer; Depositing an insulating film in a deposition chamber in the process chamber so as to cover the source / drain electrodes, and performing an ion beam etching on the insulating film continuously in an inline manner in the etching chamber in the process chamber to expose the drain electrode. Forming process, The conductive film is deposited in the deposition chamber in the process chamber so as to cover the insulating layer, and the ion beam is etched in the conductive chamber using an in-line method continuously in an in-line manner in the etching chamber in the process chamber and connected to the drain electrode through the via hole. A method of manufacturing a thin film transistor, comprising the step of forming a connection wiring. Forming a gate electrode and a gate insulating film on an insulating substrate, forming an active layer on the gate insulating film, forming a source / drain electrode on the gate insulating film to cover a portion of the active layer; Forming a passivation layer having a via hole exposing the drain electrode on the gate insulating layer; and forming a connection wiring layer connected to the drain electrode through the via hole on the passivation layer. In the process chamber to make A first process chamber for performing a film deposition process on the substrate; And a second process chamber connected to the first process chamber in an inline manner and continuously forming an ion beam etching process on the deposited film to form the protective film or the connection wiring. The method according to claim 2, The second process chamber and the chamber body, Respective gas inlet and exhaust ports formed in the chamber body; An ion source for ion decomposition and acceleration of the gas supplied from the gas inlet, With electrodes, A seating part on which the substrate is mounted; The process chamber is installed between the electrode and the seating portion, characterized in that provided as an acceleration plate to help accelerate the ions. The method according to claim 3, Process chamber, characterized in that a further mask is installed between the acceleration plate and the seating portion.

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