KR100687319B1 - Timing controller for lcd - Google Patents

Abstract

The present invention relates to a timing controller for color-adjustable liquid crystal display device that can adjust the brightness of the input R, G, B data to adjust the screen color to a desired color.

The present invention provides a timing controller for a liquid crystal display device that adjusts R, G, B input data and generates R, G, B output data adjusted according to a clock signal. An R color adjusting unit for adjusting brightness of input R input data; A G color adjusting unit for adjusting the brightness of the G input data input from the outside according to the direction signal and the magnitude signal for the G; And a B color adjusting unit for adjusting the brightness of B input data input from the outside according to the direction signal and the magnitude signal for the B.

Description

Timing controller for liquid crystal display device {TIMING CONTROLLER FOR LCD}

1 is a block diagram of a timing controller for a liquid crystal display device according to an embodiment of the present invention;

2 is a schematic diagram of an internal circuit of a timing controller for a liquid crystal display device according to an embodiment of the present invention;

3 is a detailed view of an R color adjusting unit in the timing controller of FIG. 2;

4 is a timing diagram illustrating an example of adjusting blue B through the timing controller of FIG. 2;

FIG. 5 is a timing diagram illustrating an example in which red (R) is adjusted through the timing controller of FIG. 2.

(Explanation of symbols for the main parts of the drawing)

10: R color adjuster 20: G color adjuster

30: B color adjustment section 11, 21, 31: Addition and subtraction section

12, 22, 32: buffer unit AS1: first additive subtractor

AS2: Second Subtractor 100: Timing Controller

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller for a thin film transistor liquid crystal display device. The present invention relates to a timing controller for a color adjustable liquid crystal display device that can adjust screen brightness to a desired color by adjusting input R, G and B data. It is about.

A thin film transistor liquid crystal display (TFT-LCD) should change the color display characteristics displayed on the screen according to its use area. This is because the visual characteristics of the user are greatly changed by regional and racial influences. In other words, Asians generally prefer a redish red screen, while Europeans prefer a blueish red screen.

In addition, for this reason, when using a wide viewing film attached to the liquid crystal module for the wide viewing angle of the thin film transistor liquid crystal display device, the screen becomes slightly yellow. In this case, the yellow energy displayed on the screen is removed. Skill is needed.

Therefore, in the thin film transistor liquid crystal display device, there is a need to correct the color of the screen displayed according to a situation.

Conventionally, a method of changing color characteristics of a color filter is used for color correction in a liquid crystal module. However, the method of changing the color characteristics of the color filter is a problem that cannot be used for a given color characteristic because color correction is no longer possible when the liquid crystal panel is manufactured by changing the color characteristics of the color filter to a general desired color. There was this. In addition, since the development of the color filter takes a lot of costs, there was a problem that the rise of the overall development cost.

In addition to the above method, there is a method of changing the color characteristics of the backlight or the polarizing plate, but this method also has a problem of high development cost and difficulty in implementation.

 SUMMARY OF THE INVENTION An object of the present invention is to provide a timing controller for a liquid crystal display device capable of adjusting a color of a screen to a desired color by adjusting data displayed on a liquid crystal panel in order to solve the problems of the prior art as described above.

In order to achieve the above object, the present invention relates to a timing controller for a liquid crystal display device that adjusts R, G, B input data and generates R, G, B output data adjusted according to a clock signal. An R color adjusting unit for adjusting the brightness of the R input data input from the outside according to the direction signal and the magnitude signal with respect to the external signal; A G color adjusting unit for adjusting the brightness of the G input data input from the outside according to the direction signal and the magnitude signal for the G; According to an aspect of the present invention, there is provided a timing controller for a liquid crystal display device including a B color adjusting unit for adjusting the brightness of B input data input from the outside according to a direction signal and a magnitude signal for B.

The R, G, B color adjustment unit adds or subtracts the R, G, B input data inputted from the outside according to the direction signals for the R, G, B, respectively, by the magnitude signal; And a buffer unit for storing the output signal of the addition and subtraction unit and outputting the R, G, and B output data whose brightness is adjusted according to the clock signal.

In the R, G, B color adjustment unit, the addition and subtraction unit adds or subtracts the R, G, B input data input from the outside by the magnitude signal according to the direction signal for the R, G, B. Acid groups; And a second adder / subtracter for adding or subtracting the output signal of the first adder / subtracter by " 1 " according to the direction signals for R, G, and B.

The buffer unit of the R, G, B color adjustment unit, a plurality of parallel connected flips for outputting the R, G, B output data with the brightness adjusted to the output signal applied from the second subtractor at the negative edge of the clock signal It is made of flop.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a timing controller for a liquid crystal display according to an exemplary embodiment of the present invention. Referring to FIG. 1, a timing controller for a liquid crystal display according to an exemplary embodiment of the present invention may include a signal DIR for determining a direction of increasing or decreasing brightness of colors for each of R, G, and B, R, G, and B. RG inputted by inputting the input signals IB, IG, IR and the clock signal MCLK for each of the signal MAG, R, G, and B, which determine the magnitude of the brightness of the color for each, that is, the size, The colors of the G and B signals are adjusted in accordance with the direction signal DIR and the magnitude signal MAG to output the output signals OB, OG and OR converted to desired colors.

When there is no input to the magnitude signal MAG and the direction signal DIR, the timing controller 100 may output the R, G, and B output data OR, R, G, and B data according to the clock signal MCLK. OG, OB). On the other hand, if there is an input to the magnitude signal MAG and the direction signal DIR, the R, G, and B input data IR, IG, and IB are adjusted to the corresponding colors to adjust the R, G, and B output data (OR, OG, OB).

2 is a schematic block diagram of an internal circuit of a timing controller according to an embodiment of the present invention. Referring to FIG. 2, the timing controller of the present invention includes an R color adjusting unit 10 for adjusting color of R input data among R, G, and B data, and G input data among R, G, and B data, respectively. And a G color adjusting unit 20 for adjusting the color, and a B color adjusting unit 30 for adjusting the color of the B input data among the R, G, and B data.

The R color adjusting unit 10 adds or subtracts 11 to add or subtract 6-bit R input data IR0-IR5 according to the direction signal RDIR and the magnitude signal RMAG, and the adder subtracter 11. And a buffer section 12 for storing the output of the < RTI ID = 0.0 > 6 < / RTI >

delete

delete

The G color adjusting unit 20 adds or subtracts 21 to add or subtract 6-bit G input data IG0-IG5 according to the direction signal GDIR and the magnitude signal GMAG, and the adder subtracter 21. And a buffer section 22 for storing the output of the < RTI ID = 0.0 > G < / RTI >

The B color adjuster 30 adds or subtracts 31 to add or subtract 6-bit B input data IB0-IB5 according to the direction signal BDIR and the magnitude signal BMAG, and the adder subtractor 31. And a buffer unit 32 for storing 6-bit B output data OB0-OB5 with the output of the B signal adjusted in color.
3 is a detailed view of an R color adjusting unit in the timing controller of FIG. 2. Referring to FIG. 3, in the R color adjuster 10, the adder / subtracter 11 adds or adds 6-bit R input data IR0-IR5 according to the direction signal DIR and the magnitude signal RMAG. The first adder subtracter AS1 and the output of the first adder subtractor AS1 are inputted to add or subtract the output of the first adder subtractor AS1 according to the direction signal RDIR and the magnitude signal '1'. A second subtractor AS2 for subtracting is provided.
In the R color adjusting unit 10, the buffer unit 12 stores the outputs of the second subtracter AS2 of the adder / subtracter 11 by 1 bit, and outputs them as R output data OR0-OR5. Six D flip-flops (DF0-DF5) connected in parallel. Six D flip-flops DF0-DF05 are triggered at the negative edge of the clock signal MCLK to store and output the output of the second subtractor AS2.

In the G color adjusting unit 20 and the B color adjusting unit 30, the configuration and operation of the adder / subtracter 21, 31 and the buffer unit 22, 32 are similar to those of the R color adjusting unit 10. Since the same, the detailed description of the configuration and operation will be omitted.

The operation of the color adjustable timing controller according to the embodiment of the present invention having the configuration as described above will be described with reference to FIGS. 4A to 4E.

When the 6-bit input data (IR0-IR5), (IG0-IG5), and (IB0-IB5) are input to the R, G, and B from the outside, the timing controller 100 receives directions for the R, G, and B, respectively. R, G, B output data (OR0-OR5) whose brightness is adjusted for R, G, B colors by adjusting its input signal according to the signals (RDIR, GDIR, BDIR) and magnitude signals (RMAG, GMAG, BMAG) , (OG0-OG5), (0B0-OB5) will be output.

4A to 4E show waveform diagrams for adjusting the brightness of colors for blue (B), and explain operations for adjusting the colors for blue (B). In the waveform diagram of FIG. 4, the direction signal BDIR means to perform a subtraction operation on the input signal at the low level, and to perform the addition operation on the input signal at the high level. In addition, the magnitude signal BMAG means to adjust the brightness of the input signal to be lighter or darker by "1" level through the addition or subtraction operation at the low level, and to add or subtract the brightness of the input signal at the high level. Subtractive means to adjust the brightness as dark or dark as "2" level.

Therefore, in the timing controller of the present invention, "0" or "1" is applied to the magnitude signal of the first adder subtracter AS1 according to the magnitude signal BMAG applied from the outside, The magnitude signal "MAG" is always applied to the magnitude signal. Therefore, when the magnitude signal BMAG is at the low level, "0" is applied to the magnitude signal BMAG of the first adder subtracter AS1, and "1" is applied to the magnitude signal of the second adder subtractor AS2. To perform addition or subtraction "1". On the other hand, when the magnitude signal BMAG is at the high level, "1" is applied to the magnitude signal BMAG of the first subtractor AS1 and "1" is applied to the magnitude signal of the second subtractor AS2. It is applied to perform the operation of addition or subtraction "2". At this time, since the input data for each R, G, B is 6 bits, respectively, the brightness of the color for each R, G, B has a level between 0 and 63.

Assume that 101010 is input as the 6-bit input signal IB0-IB5 for blue (B). That is, the input data for blue B assumes that its brightness has 42 levels.

First, in the section A of FIG. 4, since the direction signal BDIR and the magnitude signal BMAG for the blue color B are each low level, the subtraction operation is performed as much as "1" for the input signal for the blue color. The blue signal is made darker by "1" level than the brightness of the input signal.

That is, in the adder / subtracter 31 of the B color adjuster 30, a low level signal is applied to the first adder-sublimer AS1 as the direction signal DIR and the magnitude signal MAG, respectively. In this case, since the first additive subtracter AS1 is applied with the magnitude signal BMAG, “0” is applied, so that the first additive subtractor AS1 outputs 6-bit input data IB0-IB5 101010 as it is. Since the second additive subtractor AS1 is applied with "1" as the magnitude signal, the subtractor AS1 performs a subtraction operation by "1" level with respect to the input data IB0-IB5 101010, and thus outputs 101001, that is, 41 as its output signal. .

The buffer unit 32 triggers the negative edge of the clock signal MCLK, and outputs the B output data through the D flip-flop DF0-DF5 connected in parallel with each of the 6-bit outputs of the second subtractor AS2 by 1 bit. Outputs (OB0-OB5) simultaneously. At this time, the D flip-flops DF0-DF5 of the buffer unit 32 maintain their output signals until the next negative edge of the clock signal MCLK.

In the section B of FIG. 4, since the direction signal BDIR and the magnitude signal BMAG for the blue B are high level and low level, respectively, an addition operation of "1" is performed on the input signal for blue color. The blue signal is made as bright as "1" level than the brightness of the input signal. That is, 6-bit B output data of 101011 (43 levels) is output through the buffer unit 32.

In the section C of FIG. 4, since the direction signal BDIR and the magnitude signal BMAG for the blue color B are low and high levels, the subtraction operation is performed by "2" for the input signal for the blue color. To make the blue signal darker by "2" level than the brightness of the input signal.

That is, since "1" is applied as the magnitude signal BMAG of the first subtractor AS1 in the addition / subtraction unit 31 of the B color adjustment unit 30, the output subtracted by 1 from the input data IB0-IB5 101010. A signal is generated, and since the second adder AS2 is applied with "1" as a magnitude signal, the second adder AS2 generates an output signal subtracted by one from the output signal of the first adder AS1. Accordingly, the buffer unit 32 generates output data OB0-OB5 101000 (level 40) which is finally subtracted by two from the input data IB0-IB5 101010.

In the section D of FIG. 4, since the direction signal BDIR and the magnitude signal BMAG for the blue color B are each at the high level, an addition operation of "2" is performed on the input signal for the blue color, and the blue signal is performed. Make it as bright as the level of input signal.

As described above, the timing controller of the present invention adjusts the displayed data to a desired color by adjusting the brightness level of the input data according to the direction signal and the size signal based on the input data for each R and GB. It is possible.

In addition, in the timing controller of the present invention, it is possible to vary the brightness level by 2 by setting the magnitude signal MAG for each R, G, B to 1 bit, but if the magnitude signal MAG is set to 2 bits, It is possible to change the brightness level by 4.

5 shows a waveform diagram in the case of adjusting the brightness with respect to the R input data. The case of adjusting the brightness of the R input data is the same as the operation of adjusting the brightness of the B input data of FIG. 4. In FIG. 5, input data of 110010 having a brightness of 50 R data input is exemplified.

In the section A of FIG. 5, since the direction signal RDIR and the magnitude signal RMAG for the red color R are low level and high level, respectively, a subtraction operation of "2" is performed for the input signal for the red color R. The red signal is made darker by "2" level than the brightness of the input signal.

In the section B of FIG. 5, since the direction signal RDIR and the magnitude signal RMAG for the red color R are each at the high level, an addition operation of "2" is performed on the input signal for the red color red signal. Make it as bright as the level of input signal.

In the section C of FIG. 5, since the direction signal RDIR and the magnitude signal RMAG for the red color R are each low level, the subtraction operation is performed by the amount of " 1 " The signal is made darker by "1" level than the brightness of the input signal.

In the section D of FIG. 5, since the direction signal RDIR and the magnitude signal RMAG for the red color R are high level and low level, respectively, an addition operation of "1" is performed on the input signal for red color. The red signal is controlled as bright as "1" level than the brightness of the input signal.

The timing controller of the present invention can adjust the desired color by setting the direction and the magnitude of each of the R, G, and B input data applied from the outside. That is, if a red color is desired, the R color adjusting unit 10 makes the R color relatively bright as described above, and makes the screen color blue as described above through the B color adjusting unit 10. This makes the colors relatively brighter. Meanwhile, in order to prevent the screen from becoming yellow, the color data constituting the yellow may be adjusted appropriately. That is, when the R data IR0-IR5 is applied to 111111 and the G data IG0-IG5 is applied to 111111 to form the brightest yellow, 111110 (62) lower than the input data by "1". Level R data, 111110 (level 62) G data, or 111101 (61 level) R data lower than "2" level than the input data, or 111101 (level 61) G data are generated. The brightness becomes weak.

As described in detail above, the timing controller of the liquid crystal display device of the present invention has the advantage that it is possible to change the color characteristics of the screen by adjusting the input R, G, B data. Accordingly, it is possible not only to freely adjust the screen to a desired color, but also to manufacture a liquid crystal display device having various specifications by simply replacing the controller irrespective of the panel of the thin film transistor liquid crystal display device, thereby reducing the manufacturing cost. It takes effect.

In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.

Claims (10)

In the timing controller for the liquid crystal display device which adjusts the R, G, B input data and generates the R, G, B output data adjusted according to the clock signal, An R color adjusting unit for adjusting brightness of R input data input from the outside according to a direction signal and a magnitude signal with respect to R; A G color adjusting unit for adjusting the brightness of the G input data input from the outside according to the direction signal and the magnitude signal for the G; And a B color adjuster for adjusting the brightness of B input data input from the outside according to a direction signal and a magnitude signal with respect to B. The method of claim 1, wherein the R color adjustment unit An addition / subtraction unit for adding or subtracting R input data input from the outside by the magnitude signal according to the direction signal with respect to R; And a buffer unit for storing the output signal of the addition and subtraction unit and outputting the output signal as R output data whose brightness is adjusted according to the clock signal. The method of claim 2, wherein the addition and subtraction of the R color adjustment unit A first adder and subtractor for adding or subtracting R input data inputted from the outside by a magnitude signal according to a direction signal for R; And a second adder / subtracter for adding or subtracting the output signal of the first adder / subtracter by " 1 " according to the direction signal for R. The buffer unit of claim 3, wherein the buffer unit of the R color controller And a plurality of flip-flops connected in parallel for outputting an output signal applied from the second subtractor at the negative edge of the clock signal as an R output data with brightness adjusted. The method of claim 1, wherein the G color adjustment unit An addition and subtraction unit for adding or subtracting the G input data input from the outside by the magnitude signal according to the direction signal with respect to G; And a buffer unit for storing the output signal of the addition and subtraction unit and outputting the output signal as G output data whose brightness is adjusted according to the clock signal. The method of claim 5, wherein the addition and subtraction of the G color adjustment unit A first addition subtractor configured to add or subtract G input data input from the outside by a magnitude signal according to a direction signal with respect to G; And a second additive subtractor for adding or subtracting the output signal of the first additive subtractor by " 1 " in accordance with the direction signal for G. The buffer part of claim 6, wherein the buffer part of the G color controller is formed. And a plurality of flip-flops connected in parallel for outputting the output signal applied from the second subtractor at the negative edge of the clock signal as the G output data with brightness adjusted. According to claim 1, wherein the B color adjustment unit An addition / subtraction unit for adding or subtracting B input data input from the outside by the magnitude signal according to the direction signal with respect to B; And a buffer unit for storing the output signal of the addition and subtraction unit and outputting the output signal as B output data whose brightness is adjusted according to the clock signal. The method of claim 8, wherein the B subtraction unit of the color adjustment unit A first addition subtractor configured to add or subtract B input data input from the outside by a magnitude signal according to a direction signal with respect to B; And a second adder / subtracter for adding or subtracting the output signal of the first adder / subtracter by " 1 " in accordance with the direction signal for B. The buffer unit of claim 9, wherein the buffer part of the B color controller And a plurality of flip-flops connected in parallel for outputting an output signal applied from the second subtractor at the negative edge of the clock signal as B output data with brightness adjusted.

Images