KR100685391B1 - TFT, fabricating method of the same and flat panel display having the TFT - Google Patents

Abstract

Provided are a thin film transistor, a method of manufacturing the same, and a flat panel display device including the thin film transistor. Forming an amorphous silicon film on the substrate; Crystallizing the amorphous silicon film to form a polysilicon film; Heat treating the polysilicon film in a water vapor (H ₂ O) atmosphere; And forming an insulating film on the heat treated polysilicon film.

Heat Treated, Dangling Bond, Poly Silicon

Description

Fabrication method of the same and flat panel display having the TFT}

1 to 3 are cross-sectional views illustrating a method of manufacturing a thin film transistor according to an exemplary embodiment of the present invention.

Explanation of reference numerals for the main parts of the drawing

1: dangling bond, 200: substrate

210: buffer layer, 5: H ₂ O heat treatment

220a: crystalline silicon semiconductor layer, 230: gate insulating film

240: gate electrode, 263, 266: source, drain electrode

270: shield,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor and a flat panel display including a thin film transistor, and more particularly, to a method of manufacturing a thin film transistor having a polysilicon film and a flat panel display including a thin film transistor.

In general, a flat panel display device is divided into a passive matrix method and an active matrix method according to a driving method, and an active driving method has circuits using thin film transistors (TFTs). Such circuits are typically used in flat panel display devices such as liquid crystal displays (LCDs) and organic electroluminescence displays (OLEDs).

Among the thin film transistors, polysilicon thin film transistors can be manufactured at a low temperature similar to that of amorphous silicon thin film transistors due to the development of crystallization technology. In addition, the mobility of electrons and holes is higher than that of amorphous silicon thin film transistors, and it is possible to implement a complementary metal-oxide semiconductor (CMOS) thin film transistor so that a thin film transistor for driving circuit and a thin film transistor for pixel driving can be simultaneously formed on a substrate. It became.

A method of forming a polysilicon film used as an active layer of a thin film transistor typically uses a method of depositing an amorphous silicon film on an insulating substrate and then crystallizing at a predetermined temperature to form a polysilicon film.

A morphology due to grain growth is formed on the surface of the polysilicon film, and dangling bonds exist, resulting in defects on the surface of the polysilicon film.

When the gate insulating film is directly deposited on the polysilicon film by CVD, a large number of trap sites are generated at the interface of the region where the actual channel is to be formed, and the charges are captured by the trap to affect device characteristics. do.

In order to solve this problem, a technique for reducing trap sites between polysilicon grains by injecting fluorine or nitrogen ions into a polysilicon layer has been disclosed in Korean Patent No. 223275, "Method for Forming Polysilicon Layers of Semiconductor Devices." . However, the above technique is a method for treating the interface between the grains in the polysilicon layer, and it is difficult to remove defects existing on the surface of the polysilicon film and to solve the problem occurring on the interface with the gate insulating film.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a thin film transistor and a method of manufacturing the same, which reduce defects of crystallized silicon in a semiconductor layer to stabilize electrical characteristics and reliability.

According to an aspect of the present invention, there is provided a method of forming an amorphous silicon film on a substrate; Crystallizing the amorphous silicon film to form a polysilicon film; Heat treating the polysilicon film in a water vapor (H ₂ O) atmosphere; And forming an insulating film on the heat-treated polysilicon film.

The amorphous silicon film is preferably formed by low pressure chemical vapor deposition (LPCVD).

Before forming the amorphous silicon film, a buffer layer may be formed on the substrate.

The buffer layer may be a silicon nitride layer (SiN _x ) or a silicon oxide layer (SiO ₂ ).

The crystallization is preferably carried out using excimer laser crystallization (ELA).

The heat treatment may be performed by rapid thermal annealing (RTA).

The heat treatment is preferably carried out at 650 ℃ to 720 ℃.

In addition, the present invention is a semiconductor layer located on the substrate; A thermal oxide film formed on the semiconductor layer; A CVD insulating film formed on the thermal oxide film; And it provides a thin film transistor comprising a gate electrode formed on the CVD insulating film.

The semiconductor layer is a polysilicon film, and the thermal oxide film may be formed by heat-treating the polysilicon film in a water vapor (H ₂ O) atmosphere.

The thermal oxide film may have a thickness of 20 to 40 kPa.

The semiconductor device may further include a buffer layer positioned on the substrate under the semiconductor layer.

The buffer layer may be a silicon nitride layer (SiN _x ) or a silicon oxide layer (SiO ₂ ).

In addition, the present invention provides a flat panel display device using the above-described thin film transistor.

The flat panel display may be a flat panel display that is an organic electroluminescent display or a liquid crystal display.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, lengths, thicknesses, and the like of layers and regions may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 to 3 are cross-sectional views illustrating a method of manufacturing a thin film transistor according to the present invention.

Referring to FIG. 1, an amorphous silicon film is formed on a substrate 200. The buffer layer 210 may be formed on the substrate 200 before the amorphous silicon film is formed. The buffer layer 210 is a layer for preventing impurities from the substrate from penetrating into the device, and may be formed of a silicon nitride film (SiN _x ) or a silicon oxide film (SiO ₂ ).

An amorphous silicon film is formed on the buffer layer 210. The amorphous silicon film is preferably formed by chemical vapor deposition (CVD). The chemical vapor deposition method may use one method selected from the group consisting of low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD) and plasma chemical vapor deposition (PECVD). Preferably, low pressure chemical vapor deposition (LPCVD) can be used. When the amorphous silicon film is formed by the low pressure chemical vapor deposition method, the state of the film is uniform and the process dispersion is reduced, thereby improving the characteristics of the semiconductor layer after the crystallization process. The amorphous silicon film is crystallized to form a polysilicon film 220. The method of crystallization may be performed using one method selected from the group consisting of SPC, ELA, SLS, MILC, and MIC. It is preferable that the said crystallization uses excimer laser crystallization method (ELA).

The crystallized silicon film 220 is heat-treated in a water vapor (H ₂ O) atmosphere. The heat treatment may be rapid thermal annealing (RTA). The heat treatment may be carried out in an atmosphere of H ₂ O 5 ~ 30SCCM, N ₂ 5 ~ 50SLM, atmospheric pressure. Since the heat treatment is performed under normal pressure, the flow rate may be increased to prevent the inflow of external gas depending on the size of the chamber. In addition, the heat treatment is preferably carried out at 650 ℃ to 720 ℃, preferably 1 to 5 minutes.

Therefore, due to the heat treatment process, the dangling bond on the surface of the polysilicon film is combined with oxygen in the water vapor (H ₂ O) to reduce the fixed charge, and the surface of the polysilicon film is cured. do. As a result, a thermal oxide film (SiO ₂ ) 225 is formed on the crystallized silicon film 220. The thermal oxide film 225 may have a thickness of 20 to 40 kPa. Further, as a result, the thermal oxide film 225 is formed by bonding with the dangling bond on the surface of the polysilicon film, so that defects between the silicon film and the gate insulating film can be removed to improve the interface characteristics.

Referring to FIG. 2, by patterning the heat-treated polysilicon film 220 and the thermal oxide film 225, the semiconductor layer 220a and the thermal oxide film 225a over the semiconductor layer are formed. Thereafter, a CVD insulating film 230 is formed on the thermal oxide film 225a. The CVD insulating film 230 uses a conventional gate insulating material, for example, a silicon oxide film (SiO ₂ ) or a silicon nitride film (SiN _x ). In addition, the thermal oxide film 225a and the CVD insulating film 230 serve as gate insulating films.

A gate electrode 240 is formed on the CVD insulating layer 230. The gate electrode 240 is formed by forming a conductive film over the entire substrate and patterning the conductive layer to conform to the lower semiconductor layer 220a. The patterned gate electrode 240 is used as a mask to implant the ion into the semiconductor layer 220a. Due to the ion implantation, the source and drain regions of the semiconductor layer are set, and the channel region is defined by the setting of the source and drain regions.

Referring to FIG. 3, an interlayer insulating layer 250 is formed on the gate electrode 240. Thereafter, a contact hole 257 penetrating the interlayer insulating film 250 and the gate insulating film 230 is formed to expose a portion of the source and drain regions of the semiconductor layer. The thin film transistor is formed by filling the contact hole 257 and forming source and drain electrodes 263 and 266 to be in contact with the exposed source and drain regions.

The thin film transistor may treat the surface of the semiconductor layer by curing the surface of the polysilicon layer to prevent trapping of charges occurring at an interface with the gate insulating layer. In addition, since the thin film transistor is thermally oxidized due to high temperature steam heat treatment, and the thermal oxide film (SiO ₂ ) is formed to a thickness of 20 to 40 kPa, the interface property between the polysilicon of the semiconductor layer and the gate insulating film is improved, thereby providing stable MOS. Characteristics can be implemented, thereby improving the electrical characteristics and reliability of the device.

The thin film transistor manufactured by the above manufacturing method may be used in a flat panel display device, and the flat panel display device is preferably a flat panel display device which is an organic light emitting display device or a liquid crystal display device.

When the thin film transistor according to the present invention is used in the flat panel display device, the passivation layer 270 is formed on the entire substrate on which the source and drain electrodes are formed. Thereafter, a via hole 277 is formed to be connected to the source or drain electrodes 263 and 266 under the passivation layer, for example, the drain electrode 266 and the pixel electrode on the passivation layer. After the formation of the pixel electrode 280 filling the via hole 277, a unit pixel of the flat panel display device is formed on the pixel electrode to manufacture the flat panel display device.

In the thin film transistor according to the present invention, the dangling bond is reduced at the interface between the polysilicon film and the gate insulating film due to high temperature steam (H 2 O) heat treatment, thereby reducing the fixed charge on the interface. Therefore, the interfacial properties can be improved to improve the electrical properties and reliability of the device. In addition, the resulting thermal oxide film (SiO ₂ ) can further improve the interface between the gate insulating film and the silicon film to be formed later.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

Claims (14)

Forming an amorphous silicon film on the substrate; Crystallizing the amorphous silicon film to form a polysilicon film; Heat treating the polysilicon film in a water vapor (H ₂ O) atmosphere; And forming an insulating film on the heat-treated polysilicon film. The method of claim 1, The amorphous silicon film is a method of manufacturing a thin film transistor, characterized in that formed by low pressure chemical vapor deposition (LPCVD) method. The method of claim 1, And forming a buffer layer on a substrate before forming the amorphous silicon film. The method of claim 3, wherein The buffer layer may be a silicon nitride film (SiN _x ) or a silicon oxide film (SiO ₂ ). The method of claim 1, Forming the polysilicon film is a thin film transistor manufacturing method characterized in that performed using one method selected from the group consisting of SPC, ELA, SLS, MILC, and MIC. The method of claim 1, The heat treatment is a method of manufacturing a thin film transistor, characterized in that performed by a rapid thermal annealing (RTA). The method of claim 6, The heat treatment is a method of manufacturing a thin film transistor to be carried out at 650 ℃ to 720 ℃. A semiconductor layer located on the substrate; A thermal oxide film formed on the semiconductor layer in an H ₂ O atmosphere; A CVD insulating film formed on the thermal oxide film; And And a gate electrode formed on the CVD insulating film. The method of claim 8, The semiconductor layer is a polysilicon film, and the thermal oxide film is formed by heat treating the polysilicon film in a water vapor (H ₂ O) atmosphere. The method of claim 8, The thickness of the thermal oxide film is a thin film transistor, characterized in that 20 to 40Å. The method of claim 8, And a buffer layer on the substrate under the semiconductor layer. The method of claim 11, The buffer layer is a silicon nitride film (SiN _x ) or a silicon oxide film (SiO ₂ ). A flat panel display comprising the thin film transistor according to claim 8. The method of claim 13, The flat panel display is an organic electroluminescent display or a liquid crystal display.

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