KR100680400B1 - Method of forming bit line of semiconductor device - Google Patents

Abstract

The present invention relates to a method for forming a bit line of a semiconductor device, and according to the present invention, by simplifying the process by developing an etching process that can use a SiON film as a hard mask, which is difficult to use when forming a bit line in the 0.10 ㎛ design rule, Stabilization can improve the margin of subsequent processes.

Description

Method of forming bit line of semiconductor device

FIG. 1A is a planar SEM photograph showing that pattern striation occurs when a hard mask pattern is formed using a tungsten hard mask in a conventional bit line forming process.

FIG. 1B is a planar SEM photograph showing that a line break occurs when a hard mask pattern is formed using a tungsten hard mask in a conventional bit line forming process.

Figure 2 is a cross-sectional SEM image showing the result of etching using a nitride film as a hard mask when forming the bit line in the prior art.

3A-3D are process flow diagrams illustrating the process of the present invention.

Figure 4 is a cross-sectional SEM photograph showing the result of the etching process when forming the bit line according to the present invention.

<Description of Symbols for Major Parts of Drawings>

1 semiconductor substrate 2 gate oxide film

3: gate conductive film 4: barrier nitride film

5: nitride film spacer 6: device isolation film

7 interlayer insulating film 8, 23 nitride film for hard mask                 

9, 22: SiON film for hard mask 10, 21: photoresist film

11 gate electrode 12 photoresist pattern

13: SiON pattern 14: nitride film pattern

The present invention relates to a method for forming a bit line of a semiconductor device, and more particularly, to simplify the process by developing an etching process that can use SiON, which is difficult to use when forming a bit line in a 0.10 μm design rule, as a hard mask. It relates to a method that can improve the margin of subsequent processes by stabilizing.

When the 0.10 탆 design rule is applied, the thickness of the photoresist for forming the bit line pattern is as low as 2500 mW and the CD is as small as 80 nm, and tungsten is used as a hard mask to prevent pattern attack. When tungsten is used as a hard mask, the deposition and etching process steps are added, and the process result becomes unstable in several steps.

However, when a SiON film is used as a hard mask instead of tungsten for bit line etching of 0.10 μm or less, the selectivity with respect to the photoresist is insufficient, and thus, it is impossible to use it due to pattern striation and line breakage (FIG. 1A and FIG. 1). 1b).

On the other hand, using a nitride film 23 as a hard mask for etching a bit line of 0.10 μm or less, 90 sccm / 20 sccm / 100 sccm using CHF ₃ / O ₂ / Ar gas, 600 W of power, and 70 mT of pressure for 95 seconds. After etching, the pattern cross-sectional photograph when etching for 25 seconds with CHF ₃ / Ar gas using 90 sccm / 100 sccm and power 400 W and pressure 70 mT is shown in FIG. 2. In this case, the photoresist 21 It can be seen that the low thickness causes a top notching (T), and an inclined pattern is formed, which makes it difficult to implement fine bit lines.

An object of the present invention is to develop an etching process that can use a SiON film, which is difficult to use when forming a bit line in a 0.10 탆 design rule, as a hard mask, and to apply finer bits by applying etching conditions suitable for the characteristics of a film for a hard mask. It is to provide a method for forming a line.

In order to achieve the above object, the present invention provides a method for forming finer bit lines by differentiating conditions for etching SiON and nitride films, which are used as hard masks when forming bit lines, to develop an optimal etching condition according to each film quality. to provide.

Hereinafter, the present invention will be described in detail.

In the present invention
Forming a gate electrode on the semiconductor substrate including the device isolation layer;
Forming a nitride film spacer on a side of the gate electrode;
Forming an interlayer insulating film on an entire surface of the resultant product including the gate electrode and the nitride film spacer;
Forming a first hard mask nitride film on the interlayer insulating film;
Forming a SiON film for a second hard mask on the nitride film;
Forming a photoresist pattern on the SiON film;
Etching the SiON layer using the photoresist pattern as an etch mask, and etching the nitride layer to form a hard mask pattern of the nitride layer and the SiON layer stacked structure; And
Etching the interlayer dielectric layer using the hard mask pattern as an etch mask;
The etching process of the nitride film is carried out over etching, the over etching is carried out for 25 seconds using CF ₄ / CHF ₃ / Ar gas 15sccm / 75sccm / 150sccm, power 400W, pressure 50mT,
The SiON film and the nitride film etching process is performed under a power condition of 700 ~ 900W, the overetching is performed under a 350 ~ 450W power condition,
The SiON film etching process and the nitride film etching process are all carried out at 45 ~ 55mT pressure conditions,
The etching process of the SiON film is carried out in an atmosphere in which the total flow rate of CF ₄ / CHF ₃ gas is 45 ~ 55sccm, the flow rate ratio of CF ₄ : CHF ₃ is 1: 4,
The nitride film etching process is performed in an atmosphere in which the total flow rate of CF ₄ / CHF ₃ gas is 81 to 99 sccm, the flow rate ratio of CF ₄ : CHF ₃ is 1: 5,
The etching process of the SiON film is carried out for 35 seconds using CF ₄ / CHF ₃ / O ₂ / Ar gas 10sccm / 40sccm / 17sccm / 75sccm in a plasma type etching equipment, power 800W, pressure 50mT, the nitride film The etching process of the plasma type etching equipment using CF ₄ / CHF ₃ / O ₂ / Ar gas 15sccm / 75sccm / 18sccm / 100sccm, 800W power, 50mT pressure for 48 seconds,

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The process of the present invention as described above is preferably applied when the design rule is 0.10 mu m, that is, to form a bit line having a 60 to 80 nm CD.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

Referring to FIG. 3A, a gate oxide film, a conductor film for a gate electrode, and a barrier nitride film are sequentially formed on a semiconductor substrate 1 having a device isolation film 6, and then selectively etched to form a gate oxide pattern 2. The gate electrode 11 in which the conductor film pattern 3 for gate electrodes and the barrier nitride film pattern 4 are formed in order is formed.

Next, a nitride film is formed over the entire surface of the resultant including the gate electrode 11, and then etched to form the nitride film spacers 5.                     

An interlayer insulating film 7 is formed on the entire surface of the resultant including the gate electrode 11 and the nitride film spacer 5 formed by FIG. 3A as shown in FIG. 3B.

The interlayer insulating film is preferably formed of an oxide film such as BPSG or a film using a flow-fill material.

Then, a first hard mask nitride film 8, a second hard mask SiON film 9, and a photoresist layer 10 are sequentially formed on the interlayer insulating film 7.

Next, referring to FIG. 3C, a photoresist pattern 12 is formed by applying a lithography process, and the SiON film 9 is etched using this as an etching mask to form a SiON pattern 13.

At this time, the conditions for etching the SiON film are such that the total flow rate of CF ₄ / CHF ₃ gas is 45 to 55 sccm and the flow rate ratio of CF ₄ : CHF ₃ is 1: 4 under 700-900 W power condition and 45-55 mT pressure condition. It is preferable.

Next, referring to FIG. 3D, the nitride film pattern 14 is formed by etching the nitride film 8 using the formed SiON pattern 13 as an etching mask.

In this case, the nitride film is etched under a power condition of 700 to 900 W and a pressure condition of 45 to 55 mT so that the total flow rate of CF ₄ / CHF ₃ gas is 81 to 99 sccm, and the flow rate ratio of CF ₄ : CHF ₃ is 1: 5. It is desirable to.

In the present invention, as described above, to differentiate the etching conditions of the SiON film and the nitride film used as a hard mask, it is possible to implement a fine CD during the SiON etching, both SiON and nitride film during the high power of about 700 ~ 900W (high power) can improve the etch selectivity for low thickness photoresists. In addition, by using a mixture ratio of CF ₄ : CHF ₃ gas, which is ideal for etching each film, an optimum etching condition is provided to provide an etching condition suitable for each film characteristic.

Next, referring to FIG. 3E, the interlayer insulating layer 7 is etched using the formed photoresist pattern 12, the SiON pattern 13, and the nitride layer pattern 14 as an etching mask to form a bit line.

Fig. 4 shows that the SiON film 22 for the second hard mask is used with a CF ₄ / CHF ₃ / O ₂ / Ar gas of 10 sccm / 40 sccm / 17 sccm / 75 sccm in a plasma type etching equipment, and the power is 800 W and the pressure is 50 mT. After etching for 35 seconds, the CF ₁ / CHF ₃ / O ₂ / Ar gas 15sccm / 75sccm / 18sccm / 100sccm in a plasma type etching equipment was used for the first hard mask nitride film 23, the power is 800W, pressure After etching for 48 seconds at 50 mT, using 15 sccm / 75 sccm / 150 sccm of CF ₄ / CHF ₃ / Ar gas, and performing over etching for 25 seconds with 400 W of power and 50 mT of pressure. Cross section picture.

As can be seen in FIG. 4, the application of the process of the present invention, despite the low thickness of the photoresist layer 21, does not result in top notching and inclined patterns as seen in FIG. It can be seen that a vertical pattern with excellent selectivity to.

 As described above, according to the present invention, by developing an optimal etching condition according to the film quality used as a hard mask when forming the bit line, according to the present invention, SiON, which is difficult to use when forming the bit line in the 0.10 탆 design rule, is hardly formed. In addition to developing an etching process that can be used as a mask, the etching selectivity for low thickness photoresist layers can be increased. Accordingly, the margin of the subsequent process may be improved by simplifying and stabilizing the bit line forming process.

Claims (9)

Forming a gate electrode on the semiconductor substrate including the device isolation layer; Forming a nitride film spacer on a side of the gate electrode; Forming an interlayer insulating film on an entire surface of the resultant product including the gate electrode and the nitride film spacer; Forming a first hard mask nitride film on the interlayer insulating film; Forming a SiON film for a second hard mask on the nitride film; Forming a photoresist pattern on the SiON film; Etching the SiON layer using the photoresist pattern as an etch mask, and etching the nitride layer to form a hard mask pattern of the nitride layer and the SiON layer stacked structure; And And etching the interlayer dielectric layer using the hard mask pattern as an etch mask. The method of claim 1, The etching process of the nitride film comprises a step of performing over etching. The method of claim 2, And etching the SiON film and the nitride film under a power condition of 700 to 900W, and the overetching under a power condition of 350 to 450W. The method of claim 1, The method of forming a bit line of a semiconductor device, characterized in that both the SiON film etching and nitride film etching process is carried out under 45 ~ 55mT pressure conditions. The method of claim 1, The etching process of the SiON film is a bit line forming method of a semiconductor device, characterized in that the total flow rate of the CF ₄ / CHF ₃ gas is 45 ~ 55sccm, the flow rate ratio of CF ₄ : CHF ₃ is 1: 4. The method of claim 1, The nitride film etching process is a bit line forming method of a semiconductor device, characterized in that the total flow rate of the CF ₄ / CHF ₃ gas is 81 ~ 99sccm, the flow rate ratio of CF ₄ : CHF ₃ is 1: 5. The method of claim 1, The etching process of the SiON film is carried out for 35 seconds using CF ₄ / CHF ₃ / O ₂ / Ar gas 10sccm / 40sccm / 17sccm / 75sccm in a plasma type etching equipment, power 800W, pressure 50mT, The etching process of the nitride film is performed by using CF ₄ / CHF ₃ / O ₂ / Ar gas at 15 sccm / 75 sccm / 18 sccm / 100 sccm in a plasma type etching equipment, power for 800 W, pressure of 50 mT for 48 seconds. A bit line forming method of a semiconductor device. The method of claim 2, The overetching of the nitride film is performed using a CF ₄ / CHF ₃ / Ar gas 15sccm / 75sccm / 150sccm, power for 400W, pressure 50mT for 25 seconds, characterized in that the bit line forming method. The method of claim 1, And the bit line forming method is applied to form a bit line having a 60 to 80 nm CD.

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