KR100670051B1 - A thin film transistor array panel and a manufacturing method thereof - Google Patents

Abstract

Gate wirings including gate lines, gate electrodes, and gate pads are formed on the insulating substrate. The gate wiring is covered with a gate insulating film, and a semiconductor layer and an ohmic contact layer are sequentially formed thereon. On the ohmic contact layer and the gate insulating film, data lines including data lines, source and drain electrodes, and data pads are formed. A protective film is formed on the data line and the gate insulating film, and a contact hole is formed in the protective film to expose the drain electrode. A pixel electrode formed of a transparent conductive material such as ITO is formed on the passivation layer. Here, the gate wiring and the data wiring may be formed of a single layer of silver or silver alloy to lower the resistance of the wiring and simplify the process. In addition, the pixel electrode may be formed of an opaque conductive material such as silver or a silver alloy, or the silver or silver alloy may be formed to have a thickness of 30 kPa to 450 kPa to simultaneously transmit and reflect.

Silver alloy, resistance, transmission, reflection

Description

A thin film transistor array panel and a manufacturing method

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1;

3A is a layout view of a thin film transistor substrate in a first step of manufacturing according to the first embodiment of the present invention,

FIG. 3B is a cross-sectional view taken along line IIIb-IIIb of FIG. 3A;

FIG. 4a is a layout view in the next step of FIG. 3a;

FIG. 4B is a cross-sectional view taken along line IVb-IVb of FIG. 4A;

FIG. 5A is a layout view of the next step of FIG. 4A;

5B is a cross-sectional view taken along the line Vb-Vb of FIG. 5A;

FIG. 6a is a layout view in the next step of FIG. 5a;

FIG. 6B is a cross-sectional view taken along the VIb-VIb line in FIG. 6A;

7 is a layout view of a thin film transistor substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

8 is a cross-sectional view taken along the line VII-VII of FIG. 7,

9A is a layout view of a thin film transistor substrate in a first step of manufacturing according to the second embodiment of the present invention;

FIG. 9B is a cross-sectional view taken along the line VIIb-VIIb of FIG. 9A;

FIG. 10A is a layout view in the next step of FIG. 9A;

FIG. 10B is a cross-sectional view taken along the line VIIb-VIIb of FIG. 10A;

FIG. 11A is a layout view in the next step of FIG. 10A;

FIG. 11B is a cross-sectional view taken along the line IIB-XIB of FIG. 11A.

The present invention relates to a thin film transistor substrate and a method of manufacturing the same.

The thin film transistor is mainly used for a liquid crystal display device or a solid-state image sensor, and the liquid crystal display device is one of the most widely used flat panel display devices. It is composed of two glass substrates on which electrodes are formed and a liquid crystal layer interposed therebetween. And a voltage applied to two electrodes to rearrange liquid crystal molecules of the liquid crystal layer to control the amount of transmitted light.

The liquid crystal display may be classified into three types according to a method using a light source. It can be classified into a transmission type using a back light that emits light as a light source, a reflection type using natural light, and a transmission reflection type that combines transmission and reflection.

It is common to have a thin film transistor for switching a voltage applied to an electrode in one substrate of the liquid crystal display. In addition to the thin film transistor, the thin film transistor substrate includes a gate line and a gate pad that receives a signal from the outside and transfers the signal to the gate line. A data line including a gate line, a data line, and a data pad for receiving a signal from the outside and transferring the signal to the data line are formed.

In such a liquid crystal display, the larger the screen, the longer the wiring and the delay of a signal transmitted through the wiring occurs. It is desirable to reduce the resistance of the wiring so that such a signal delay does not occur. Conventionally, a method using mainly aluminum (Al) or aluminum alloy (Al alloy) has been proposed.

However, when wiring is formed of aluminum or aluminum alloy, there are the following problems. When aluminum or an aluminum alloy is used for the gate wiring, there is a problem in that the aluminum film of the gate pad is oxidized or corroded at a portion in contact with ITO (indium tin oxide), thereby resulting in poor contact characteristics. In addition, when used in the data wiring, the resistance of the contact portion is increased due to the reaction of the silicon of the lower amorphous silicon layer and the aluminum of the aluminum film, and there is a problem in that the contact characteristics are poor at the portion connected to the ITO pixel electrode.

In order to solve this problem, a method of forming an aluminum layer or an aluminum alloy into a double layer or more without providing a single layer has been proposed.

As an example of the prior art, a method of forming a gate wiring in a double layer of Cr / AlNd and a data wiring in a triple layer of Cr / AlNd / Cr has been proposed. In this method, the gate wiring is formed of Cr / AlNd, but AlNd of the gate pad portion is removed, leaving only Cr. In addition, Cr at the top and bottom of the data wiring prevents AlNd from directly contacting the ITO pixel electrode and the amorphous silicon layer.

However, such a manufacturing method has a problem in that the number of processes is large and the productivity and yield are inferior.

SUMMARY OF THE INVENTION The present invention has been made in an effort to improve a thin film transistor substrate and a method of manufacturing the same, while reducing the resistance of the wiring and providing a physically and chemically stable wiring.

In order to achieve this problem, the present invention uses silver or a silver alloy as the wiring.

According to the present invention, the gate wiring and the data wiring insulated from the gate wiring are formed on the insulating substrate. On the substrate, further, a thin film transistor connected with the gate wiring and the data wiring is formed. At this time, at least one of the gate wiring and the data wiring is made of silver or silver alloy.

Here, the silver alloy has silver as a main component, Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, It is preferable to include one or more elements of Sb, Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er.

The pixel electrode may further include a pixel electrode connected to the thin film transistor.

The pixel electrode may be made of a transparent conductive material, and in this case, one of ITO, indium zinc oxide (IZO), and indium germanium oxide (IGO) is preferable. Alternatively, the pixel electrode may be made of silver or silver alloy.

The thin film transistor substrate according to the present invention includes an insulated substrate, and a gate wiring including a gate electrode and a gate pad connected to the gate line and the gate line is formed on the substrate. The gate wiring is covered with the gate insulating film. A semiconductor layer is formed on the gate insulating film, and a data wiring including a data pad and a source electrode connected to the data line and the data line, and a drain electrode separated from the source electrode is formed on the gate insulating film. A protective film having first to third contact holes exposing the drain electrode, the gate pad, and the data pad is formed on the data line and the gate insulating film, respectively. A pixel electrode connected to the drain electrode through the first contact hole is formed on the passivation layer. At this time, at least one of the gate wiring and the data wiring is made of silver or silver alloy.

The display device may further include an auxiliary gate pad connected to the gate pad through the second contact hole and an auxiliary data pad connected to the data pad through the third contact hole, wherein the auxiliary gate pad and the auxiliary data pad are formed on the same layer as the pixel electrode. It is preferable that it consists of.

The semiconductor device may further include an ohmic contact layer formed between the semiconductor layer and the data line, and may further include an insulating layer formed between the substrate and the gate line.

The protective film may be a photosensitive organic insulating film.

Here, when the pixel electrode is made of silver or silver alloy, the thickness of the pixel electrode may be 30 kPa to 450 kPa.

The pixel electrode may be formed below the passivation layer instead of being formed on the passivation layer.

When manufacturing the thin film transistor substrate according to the present invention is formed in the order of a gate wiring, a gate insulating film, a semiconductor layer, a data wiring, a protective film, a pixel electrode. However, the data line and the pixel electrode may be formed under the protective film together.

In the manufacturing method of the present invention, the gate wiring and the data wiring are formed in a single layer such as silver or a silver alloy to lower the resistance of the wiring and simplify the process.

Next, a thin film transistor substrate for a liquid crystal display device and a method for manufacturing the same according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the same. do.

First, a structure of a thin film transistor substrate for a liquid crystal display according to a first embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a layout view of a thin film transistor substrate for a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along the line II-II.

As shown in FIGS. 1 and 2, gate wirings 20, 21, and 22 formed of silver (Ag) or silver alloy (Ag alloy) are formed on the insulating substrate 10. The gate wirings include a plurality of gate lines 20 extending in the horizontal direction, a gate electrode 21 which is a branch of the gate lines 20, and a gate pad 22 that receives a scan signal from the outside and transmits the scan signals to the gate lines 20. It includes.

Here, the metal used for the gate wirings 20, 21, 22 is silver or a silver alloy. The silver alloy has silver as a main component and the elements used for the alloy include Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, Sb, Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er, etc. are available And may include one to three elements.

The gate wirings 20, 21, 22 are covered with a gate insulating film 30 made of silicon nitride (SiN _x ).

A semiconductor layer 40 made of a semiconductor such as amorphous silicon is formed on the gate insulating layer 30, and a resistance made of a semiconductor such as amorphous silicon doped with n-type impurities such as phosphorus (P) is formed on the semiconductor layer 40. The contact layers 51 and 52 are formed separated from the gate electrode 21. The ohmic contacts 51 and 52 may reduce contact resistance between the semiconductor layer 40 and the source and drain electrodes 61 and 62 to be described later.

The data wires 60, 61, 62, and 63 made of silver or a silver alloy are formed on the ohmic contacts 51 and 52 and the gate insulating film 30, like the gate wires 20, 21 and 22.

The data line intersects with the gate line 20 to form a pixel area, and centers on the plurality of data lines 60 extending in the vertical direction, the source electrode 61 and the gate electrode 21 which are branches of the data line 60. The drain electrode 62 is separated from the source electrode 61 and the data pad 63 is connected to the data line 60 to receive an image signal from the outside and transmit the image signal to the data line 60.

The passivation layer 70 made of silicon nitride is formed on the data lines 60, 61, 62, and 63, the semiconductor pattern 40, and the gate insulating layer 30.

The protective film 70 has not only a contact hole 72 exposing the gate pad 22 with the gate insulating film 30, but also a contact hole 73 and a drain electrode 62 exposing the data pad 63. It has a contact hole 71.

The pixel electrode 80, the auxiliary gate pad 82, and the auxiliary data pad 83 made of a transparent conductive material such as ITO, IZO, or IGO are formed on the passivation layer 70.

The pixel electrode 80 is connected to the drain electrode 62 through the contact hole 71 and overlaps the gate line 20 to form a storage capacitor. The auxiliary gate pad 82 and the auxiliary data pad 83 are connected to the gate pad 22 and the data pad 63 through the contact holes 72 and 73, respectively, which are the pads 22 and 63 and the external circuit. It serves to complement the adhesion with the device and to protect the pads 22 and 63.

The silver or silver alloy used in this embodiment has a lower resistivity than aluminum, so the resistance of the wiring is lowered. In addition, silver or silver alloys have excellent contact properties with ITO, IZO, IGO, and amorphous silicon. In this embodiment, since the wirings are formed in a single film, the process is simple.

A method of manufacturing the thin film transistor substrate for a liquid crystal display device will be described with reference to FIGS. 3A to 6B and FIGS. 1 and 2.

First, as shown in FIGS. 3A and 3B, a conductor layer such as silver or a silver alloy is deposited on the substrate 10 to a thickness of 1,000 Å to 3,000 으로 by a sputtering method and patterned by a first photolithography process to form a gate wiring ( 20, 21, 22).

Subsequently, as shown in FIGS. 4A and 4B, the gate insulating layer 30, the semiconductor layer, and the ohmic contact layer are sequentially deposited in a thickness of 1,500 kV to 5,000 kV, 500 kV to 1,500 kV, and 300 kV to 600 kV by chemical vapor deposition. The upper two layers are patterned by a second photolithography process to form the semiconductor pattern 40 and the ohmic contact layer pattern 50.

Subsequently, as shown in FIGS. 5A and 5B, a conductor layer such as silver or a silver alloy is deposited to a thickness of 1,000 mV to 5,000 mV by a sputtering method and patterned by a third photolithography process to form a data line 60, 61, 62. , 63). Subsequently, the ohmic contact layer pattern 50 exposed between the source electrode 61 and the drain electrode 62 is removed to separate the two portions 51 and 52 and the semiconductor pattern 40 is exposed.

6A and 6B, the protective layer 70 is deposited to a thickness of 1,500 kPa to 4,000 kPa using chemical vapor deposition and patterned by a fourth photolithography process to form contact holes 71, 72, and 73. do.

Subsequently, as in FIGS. 1 and 2, transparent conductive materials such as ITO, IZO, and IGO are deposited to a thickness of 300 μs to 1,500 μs using a sputtering method and patterned by a fifth photolithography process to form a pixel electrode. 80, the auxiliary gate pad 82, and the auxiliary data pad 83 are formed.

In the first embodiment of the present invention, the pixel electrode 80 is formed of a transparent conductive material. However, in the case of a reflective liquid crystal display device, an opaque conductive material having a high reflectance, for example, silver or a silver alloy used as a wiring, may be used. do.

Although five photographic processes are used in the first embodiment of the present invention, four photographic etching processes may be used, which will be described in the second embodiment of the present invention. This embodiment is applied to a reflective liquid crystal display device.

FIG. 7 is a layout view of a thin film transistor substrate for a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 8 is a cross-sectional view taken along the line VII-VII of FIG. 7.

As shown in FIGS. 7 and 8, an insulating film 11 made of silicon oxide (SiO _x ) or silicon nitride is formed on the substrate 10, and the gate wirings 20, 21, 22 made of silver or a silver alloy thereon are formed thereon. Is formed. Here, the insulating film 11 is used when the adhesion between the gate wirings 20, 21, 22 and the substrate 10 is poor. The gate insulating film 30, the semiconductor pattern 40, and the ohmic contact layer patterns 51 and 52 are formed thereon. On the ohmic contact layer patterns 51 and 52 and the gate insulating layer 30, data lines 60, 61, 62, and 63 and a pixel electrode 64 made of a conductor such as silver or a silver alloy are formed. In this case, the pixel electrode 64 extends from the drain electrode 62 and is positioned in the pixel area. The passivation film 70 is formed on the data wires 60, 61, 62, and 63, the pixel electrode 64, the semiconductor pattern 40, and the gate insulating film 30. The passivation film 70 has contact holes 72 and 73 exposing the gate pad 22 and the data pad 63, respectively.

A method of manufacturing the thin film transistor substrate for a liquid crystal display device will be described with reference to FIGS. 9A to 11B and FIGS. 7 and 8.

First, as shown in FIGS. 9A and 9B, an insulating film 11 having a thickness of 500 Å to 2,500 Å is deposited, and then a conductor layer such as silver or a silver alloy is deposited and patterned by a first photolithography process to form gate wirings 20 and 21. , 22).

Subsequently, as shown in FIGS. 10A and 10B, the gate insulating layer 30 is deposited, the semiconductor layer and the ohmic contact layer are deposited thereon, and the upper two layers are patterned by a second photolithography process to form the semiconductor pattern 40 and The ohmic contact layer pattern 50 is formed.

Subsequently, as illustrated in FIGS. 11A and 11B, a conductor layer such as silver or a silver alloy is deposited and patterned by a third photolithography process to form the data lines 60, 61, 62, and 63 and the pixel electrode 64. Subsequently, the ohmic contact layer pattern 50 exposed between the source electrode 61 and the drain electrode 62 is removed to separate the two portions 51 and 52 and the semiconductor pattern 40 is exposed.

Next, as shown in FIGS. 7 and 8, the protective layer 70 is deposited and patterned by a fourth photolithography process to form contact holes 71, 72, and 73.

On the other hand, in the case of a liquid crystal display device that can be used in both a transmissive type and a reflective type, the thickness and thickness of the pixel electrodes 80 and 64 made of silver or a silver alloy in the first and second embodiments are set to about 30 kW to 450 k? Allows to happen at the same time.

The protective film 70 used in the first and second embodiments above may be formed with a photodefinable organic insulator having a thickness of 1.5 μm to 4 μm, in which case the protective film 70 is separately patterned. No photoresist is required.

Further, in the first and second embodiments, only one of the gate wirings 20, 21, 22 and the data wirings 60, 61, 62, 63 is made of silver or a silver alloy and the other is made of a conventional conductive material. can do. For example, aluminum or an aluminum alloy, molybdenum (Mo), or molybdenum-tungsten alloy (MoW), chromium (Cr), tantalum (Ta), or the like may be used as the gate wirings 20, 21, 22, or data wirings 60, 61. , 62, 63), chromium, molybdenum or molybdenum-tungsten alloy, tantalum and the like can be used.

In the first and second embodiments, although the thin film transistor substrate for the liquid crystal display device is taken as an example, it can be applied to other thin film transistor substrates.

As described above, in the present invention, a single layer of silver or silver alloy having a small specific resistance can be formed to lower the resistance of the wiring and simplify the process.

Claims (33)

Insulation board, A gate wiring formed on the substrate, A data line formed on the substrate and insulated from the gate line, A thin film transistor formed on the substrate and connected to the gate line and the data line, and A pixel electrode connected to the thin film transistor, At least one of the gate wiring and the data wiring is made of silver or a silver alloy, and the pixel electrode is made of silver or a silver alloy. In claim 1, The silver alloy has silver as a main component, Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, Sb A thin film transistor substrate comprising at least one of Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er. delete delete delete delete Insulation board, An insulating film formed on the substrate, A gate wiring formed on the insulating layer, the gate wiring including a gate electrode and a gate pad connected to the gate line; A gate insulating film covering the gate wiring, A semiconductor layer formed on the gate insulating film, A data line formed on the gate insulating layer, the data line including a data pad and a source electrode connected to the data line, and a drain electrode separated from the source electrode; A passivation layer formed on the data line and the gate insulating layer and having first to third contact holes respectively exposing the drain electrode, the gate pad, and the data pad; A pixel electrode connected to the drain electrode through the first contact hole Including; At least one of the gate wiring and the data wiring is made of silver or a silver alloy, and the pixel electrode is made of silver or a silver alloy. In claim 7, The silver alloy has silver as a main component, Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, Sb A thin film transistor substrate comprising at least one of Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er. In claim 7, An auxiliary gate pad connected to the gate pad through the second contact hole, An auxiliary data pad connected to the data pad through the third contact hole; More, The auxiliary gate pad and the auxiliary data pad are formed of the same layer as the pixel electrode. Thin film transistor substrate. In claim 7, And a resistive contact layer formed between the semiconductor layer and the data wiring. delete In claim 7, The protective film is a thin film transistor substrate is a photosensitive organic insulating film. delete delete delete In claim 7, The pixel electrode has a thickness of about 30 kW to 450 mW. Insulation board, An insulating film formed on the insulating substrate, A gate wiring formed on the insulating layer, the gate wiring including a gate electrode and a gate pad connected to the gate line; A gate insulating film covering the gate wiring, A semiconductor layer formed on the gate insulating film, A data line formed on the gate insulating layer, the data line including a data pad and a source electrode connected to the data line, and a drain electrode separated from the source electrode; A pixel electrode formed on the gate insulating layer and connected to the drain electrode; A protective film formed on the data line, the pixel electrode, and the gate insulating film Including; At least one of the gate wiring and the data wiring is made of silver or a silver alloy, and the pixel electrode is made of silver or a silver alloy. delete The method of claim 17, And a resistive contact layer formed between the semiconductor layer and the data wiring. delete The method of claim 17, The silver alloy has silver as a main component, Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, Sb A thin film transistor substrate comprising at least one of Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er. The method of claim 17, The pixel electrode has a thickness of about 30 kW to 450 mW. The method of claim 17, The protective film is a thin film transistor substrate made of a photosensitive organic insulating film. Forming a gate wiring on the substrate, Forming a gate insulating film covering the gate wiring; Forming a semiconductor layer on the gate insulating film, Forming a data wiring, Forming a protective film, Forming a pixel electrode on the passivation layer Including; At least one of the gate wiring and the data wiring is made of silver or a silver alloy, and the pixel electrode is made of a thin film transistor substrate. The method of claim 24, The silver alloy has silver as a main component, Mg, Al, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Pd, In, Sn, Sb And Hf, Ta, W, Ir, Pt, Nd, Gd, Tb, Er. delete delete delete The method of claim 24, And a thickness of the pixel electrode is 30 kW to 450 kW. delete delete delete delete

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