KR100665287B1 - Fpcb having chip lands of equal heat balance - Google Patents

Abstract

An FPCB(Flexible Printed Circuit Board) having chip lands of equal heat balance is provided to improve quality and productivity of the FPCB by keeping an area of a land on which chip terminals are mounted equal. In an FPCB having chip lands of equal heat balance, a conductive pattern(20) is coated and formed on a base(10). A coating layer(30) is coated on the conductive pattern(20). Lands(25a~25d) for mounting chip terminals are formed by removing the coating layer(30). The lands(25a~25d) have the same chip mounting areas to obtain thermal equilibrium.

Description

FPCB Having Chip Lands of Equal Heat Balance

1 is a perspective view showing a flexible substrate according to the prior art.

2 is a plan view showing different conditions of lands on which chip terminals are mounted in a flexible substrate according to the related art.

3 is a cross-sectional view taken along the line A-A of FIG. 2, showing a state in which the chip terminals are separated from the land under different conditions of lands on which the chip terminals are mounted in the flexible board according to the prior art.

4 is a plan view showing a flexible substrate having lands with a uniform thermal balance according to the present invention.

5 is a cross-sectional view taken along line B-B of FIG. 4, showing a state in which chip terminals are stably attached to lands in a flexible substrate having a land having a uniform thermal balance according to the present invention.

       <Description of the symbols for the main parts of the drawings>

1 ..... Flexible substrate having lands with uniform thermal balance according to the present invention

10 ... base 20 ... challenge pattern

25a, 25b, 25c, 25d .... land 30 .... cladding layer

40 ... chips 50 ... pile pattern

100 .... Conventional Flexible Board 110 .... Base

120 .... Challenge Pattern 125a, 125b, 125c, 125d ... Rand

130 ... coating layer 140 ... small chip (MLCC)

d .... dummy pattern length

The present invention relates to a flexible substrate for preventing chip detachment defects when land is mounted on a small chip, and more particularly, by maintaining land conditions in consideration of thermal equilibrium of a land in which chip terminals are mounted. When mounting a small chip, the improved thermal balance relates to a flexible substrate having a land that has a uniform thermal balance to prevent chip mounting failure due to thermal balance unevenness in the land.

In the conventional flexible substrate 100, as shown in FIG. 1, conductive patterns 120 are formed on an upper surface of the base 110, and a coating layer 130 for protecting the conductive patterns 120 is formed. It is adhered on the upper surface of the base 110 by an adhesive (not shown).

The base 110 and the cover layer 130 is made of an insulating film, for example, a polyimide-based film, and should have excellent factors such as tensile strength, dielectric constant, surface resistivity, and flame retardancy.

The conductive patterns 120 are made of copper, and have different particle densities according to particle formation directions, and are manufactured by electroplating or melt injection.

As the adhesive, acrylic, epoxy, or phenol resin may be used.

In the conventional flexible substrate 100 configured as described above, a plurality of small chips 140, for example, multilayered chip chip capacitors (MLCC), etc., must be mounted with surface mount technology (SMT). ) Remove the coating layer 130 formed on the surface of the flexible substrate 100, and then expose the conductive patterns 120 and lands 125a, 125b, 125c on which the small chips 140 are mounted. After the 125d are exposed, an electrical connection is made through soldering.

However, the conventional flexible substrate 100 may have different areas, sizes, and thermal balance conditions of both lands 125a and 125b in which terminals of the small chips 140 are disposed.

In particular, when the lands 125a and 125b where the terminals of the chip 140 are soldered are different in size, the amount of solder cream or the like that is mounted in the soldering connection is different, and thermal equilibrium is not achieved. Failure to do so will result in a failure of the small chips 140 mounted on the flexible substrate 100.

That is, for example, as shown in FIG. 2, when the terminals of the MLCC are seated on the plurality of lands 125a and 125b to make an electrical connection, and the sizes of the lands 125a and 125b are different from each other. In some cases, one land 125c may be supported by both sides of the coating layer 130, and the other land 125d may not be supported by the coating layer 130.

In particular, as described above, one side is supported on both sides by the coating layer 130, and the other side is shown in FIG. 3 in the chip 140 mounting work using lands 125c and 125d that are not supported by the coating layer 130. As described above, the mounting failure of the chip 140 occurs, and at this time, either terminal is not contacted from both lands 125c and 125d and is electrically shorted to cause mounting failure.

Therefore, in the conventional flexible substrate 100 as described above, a large amount of SMT mounting defects of the small chips 140 occur, resulting in a decrease in work productivity, and a problem in which the flexible substrate 100 is defective.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to improve thermal balance to prevent chip departure defects by keeping the land conditions the same in consideration of the thermal balance of the land in which the chip terminals are mounted. It is to provide a flexible substrate having this uniform land.

In addition, the present invention is improved to prevent chip detachment defects by maintaining the same area of the land on which the chip terminals are mounted, thereby improving the productivity of the flexible board assembly work, and improving the quality of the flexible board. Another object is to provide a flexible substrate having lands with uniform thermal balance.

In order to achieve the above object, the present invention provides a flexible substrate for preventing chip detachment defects when land is mounted on a small chip,

Base;

A conductive pattern coated on the base;

A coating layer coated on the conductive pattern; And

And lands for chip terminal mounting formed by removing the covering layer.

The lands provide a flexible substrate having lands having a uniform thermal balance, wherein the lands have the same chip mounting area and are configured to achieve thermal equilibrium.

In addition, the present invention preferably provides a flexible substrate having lands with a uniform thermal balance, wherein the lands are configured to form a dummy pattern to achieve the same thermal balance with each other.

In another aspect, the present invention preferably provides a flexible substrate having a land of uniform thermal balance, characterized in that the dummy pattern is formed on the same basis as the coating layer design criteria.

In another aspect, the present invention preferably provides a flexible substrate having a land with a uniform thermal balance, wherein the dummy pattern is formed to extend by 0.15 mm in consideration of a covering layer section and chip mounting tolerances.

In another aspect, the present invention preferably provides a flexible substrate having a land of uniform thermal equilibrium, characterized in that the land has a symmetrical shape with each other.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The flexible substrate 1 having a land of uniform thermal balance according to the present invention has a base 10 and a conductive pattern 20 coated on the base 10 as shown in FIG. The chip terminal mounting lands 25a, 25b, 25c, 25d formed by removing a portion of the part 30 are included.

The lands 25a, 25b and 25c and 25d have the same chip mounting area and are configured to achieve thermal equilibrium.

The base 10 is made of an insulating film, for example, a polyimide film, and has excellent factors such as tensile strength, dielectric constant, surface resistivity, flame retardancy, and the like.

The conductive patterns 20 are made of copper, and have different particle densities according to particle formation directions, and are manufactured by electroplating or melt injection.

In addition, the present invention includes a coating layer 30 coated with an adhesive on the conductive pattern 20. As the adhesive, acrylic, epoxy, or phenol resin may be used, and the coating layer 30 may include a base ( It consists of an insulating film as in 10).

The lands 25a, 25b, 25c, and 25d are configured to have thermal equilibrium with the same chip 40 mounting area, so that the lands 25a, 25b are dummy patterns 50. It is configured to form the same thermal equilibrium with each other.

As shown in FIG. 4, when the one land 25d is supported by both sides of the coating layer 30, the land 25c on the other side forms the dummy pattern 50. The same land area is achieved.

In addition, the dummy pattern 50 is formed on the same basis as the cover layer 30 design criteria. Preferably, the dummy pattern 50 has a length d of the cover layer 30 section and the chip 40. ) It is a structure that is extended by 0.15mm considering the mounting tolerance.

When the dummy pattern 50 is thus formed, it is supported by the coating layer 30 and forms the same area of the lands 25c and 25d on which the small chip 40 such as MLCC is mounted.

Therefore, when the small chip 40 such as MLCC is mounted on the lands 25c and 25d and connected by soldering or the like, the two lands 25c and 25d are uniformly thermally balanced during the cooling and curing of the solder. Can thus achieve a stable chip 40 mounting.

In addition, in the present invention, the lands 25a and 25b are preferably symmetrical to each other.

This symmetrical structure also forms the same area of the lands 25a and 25b on which the small chips 40, such as MLCCs, are mounted. Accordingly, when the small chips 40 such as MLCCs are mounted on the lands 25a and 25b and connected by soldering, the lands 25a and 25b of both sides may be uniformly balanced during the cooling and curing of the solder. Can thus achieve a stable chip 40 mounting.

The flexible substrate 1 having a land having a uniform thermal balance according to the present invention configured as described above has a land 25a and 25b on which the chips 40 are mounted when a small chip 40 such as MLCC is mounted. , 25c and 25d have the same chip 40 mounting area to achieve thermal equilibrium.

When the lands 25a, 25b, 25c, and 25d have the same area, the amount of solder cream disposed on the lands 25a, 25b, and 25c and 25d is the same. Not only can the equilibrium be achieved, but also the thermal equilibrium can be achieved in the cooling rate of the solder.

In particular, the dummy pattern 50 has a dummy pattern such that when one side of the land 25d is supported by the coating layer 30, both lands 25c on the other side are also supported by the coating layer 30. 50 is formed so that the same lands 25c and 25d have an area.

Therefore, when the chip terminals are coupled and mounted, uniform thermal balance of the two lands 25a, 25b, 25c, and 25d may be achieved, thereby achieving stable chip 40 mounting.

This structure is shown in FIG.

That is, according to the present invention, land conditions such as the area of both lands 25a, 25b, 25c, and 25d or whether the support layer 30 is supported are kept the same, and the lands 25a, 25b, and 25c ( In the case of connecting the chip terminals by applying solder cream to 25d), the connection part is cured stably so that the SMT mounting failure of the chips 40 does not occur.

In addition, the dummy pattern 50 is formed on the same basis as the design standard of the coating layer 30. Preferably, the length d of the dummy pattern 50 is the coating layer 30 section and the chip 40. In consideration of the mounting tolerances, an extension of 0.15 mm is formed.

When the dummy pattern 50 is formed as described above, the dummy pattern 50 may be easily manufactured during the formation of the conductive pattern 20 and the coating layer 30, and thus, no additional process is required, and chip terminals may be mounted. When the covering layer 30 is opened for the purpose, both lands 25c and 25d are supported by the coating layer 30, and the lands 25c and 25d on which the small chips 40 such as MLCCs are mounted. To form the same area.

Therefore, the present invention can achieve a uniform thermal balance of the lands 25a, 25b, 25c, 25d on both sides of the soldering process of the chip terminal, thereby achieving stable chip 40 mounting.

In the present invention, the lands 25a, 25b, 25c, and 25d are formed to have symmetrical shapes with each other.

In this case, the symmetrical structure is advantageous for forming the base 10 and the conductive pattern 20 of the flexible substrate 100, and is uniform in both lands 25a, 25b, 25c, 25d. Thermal equilibrium can be achieved, and hence stable chip 40 mounting.

According to the present invention as described above, in consideration of the thermal balance of the land (land) on which the chip terminals are mounted, the land condition, for example, the area, whether to support the cover layer, etc. by maintaining the same to improve chip departure defects Effect can be achieved.

In addition, according to the present invention, by maintaining the same area of the land (land) on which the chip terminals are mounted to prevent chip departure defects, thereby improving the productivity of the flexible substrate assembly work, and improved to improve the quality of the flexible substrate Effect is obtained.

While the invention has been shown and described with respect to specific embodiments thereof, it has been described by way of example only to illustrate the invention, and is not intended to limit the invention to this particular structure. Those skilled in the art will appreciate that various modifications and changes of the present invention can be made without departing from the spirit and scope of the invention as set forth in the claims below. Nevertheless, it will be clearly understood that all such modifications and variations are included within the scope of the present invention.

Claims (5)

A flexible substrate for preventing chip detachment defects when land is mounted on a small chip, Base; A conductive pattern coated on the base; A coating layer coated on the conductive pattern; And And lands for chip terminal mounting formed by removing the covering layer. And said lands are configured to achieve thermal equilibrium with the same chip mounting area. The flexible substrate of claim 1, wherein the lands are configured to form a dummy pattern to achieve the same thermal equilibrium with each other. 3. The flexible substrate of claim 2, wherein the dummy pattern is formed on the same basis as the cover layer design criteria. 4. The flexible substrate of claim 3, wherein the dummy pattern has a length of 0.15 mm extended in consideration of a covering layer section and a chip mounting tolerance. 5. The flexible substrate of claim 1, wherein the lands have a symmetrical shape with each other.

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