KR100664865B1 - Method for forming metal line with oxidation layer and semiconductor device providing with said metal line - Google Patents

Method for forming metal line with oxidation layer and semiconductor device providing with said metal line Download PDF

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KR100664865B1
KR100664865B1 KR1020050062329A KR20050062329A KR100664865B1 KR 100664865 B1 KR100664865 B1 KR 100664865B1 KR 1020050062329 A KR1020050062329 A KR 1020050062329A KR 20050062329 A KR20050062329 A KR 20050062329A KR 100664865 B1 KR100664865 B1 KR 100664865B1
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South Korea
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layer
metal
film
metal line
photoresist
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KR1020050062329A
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Korean (ko)
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황상일
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동부일렉트로닉스 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Abstract

A method for forming a metal wire having an oxidation layer and a semiconductor device with the same are provided to prevent foot generation of a photoresist layer by performing an oxygen plasma process on the metal wire before applying the photoresist layer. A metal layer(109) including aluminium, titanium, and titanium nitride layer is sequentially layered on a substrate. An oxygen plasma process is performed on the titanium nitride layer to form an oxidation layer(110) on a surface of the metal layer. A photoresist layer(111a) is applied to the surface of the metal layer on which the oxidation layer is formed. The photoresist layer is exposed and developed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as an etching mask. The oxidation layer is a titanium oxide layer.

Description

표면에 산화층이 형성된 금속 배선의 형성 방법 및 상기 금속 배선이 형성된 반도체 소자{Method for Forming Metal Line With Oxidation Layer and Semiconductor Device Providing with Said Metal Line}A method for forming a metal wiring having an oxide layer formed on a surface thereof, and a semiconductor device having the metal wiring formed thereon {Method for Forming Metal Line With Oxidation Layer and Semiconductor Device Providing with Said Metal Line}

도 1 내지 도 4는 종래기술에 따른 금속배선의 형성방법을 나타내는 단면도들이다.1 to 4 are cross-sectional views showing a method of forming a metal wire according to the prior art.

도 5 내지 도 8은 본 발명에 따른 금속배선의 형성방법을 나타내는 단면도들이다.5 to 8 are cross-sectional views showing a method of forming a metal wiring according to the present invention.

도 9 및 도 10은 본 발명에 따른 산소 플라즈마 처리를 실시 전후의 SIMS 그래프를 나타낸다.9 and 10 show SIMS graphs before and after performing an oxygen plasma treatment according to the present invention.

<도면의 주요 부호에 대한 설명><Description of Major Symbols in Drawing>

9, 109: 금속막 110: 산화층9, 109: metal film 110: oxide layer

11, 111: 감광막11, 111: photosensitive film

본 발명은 반도체 소자의 제조 기술에 관한 것으로서, 좀 더 구체적으로는 금속배선을 패터닝할 때 사진공정의 감광막 패턴의 풋(foot) 현상을 억제 및 완화 하여 식각공정에서 치수의 손실이 없는 산화층이 형성된 금속배선을 형성하는 방법 및 이렇게 형성된 금속 배선을 포함하는 반도체 소자에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for manufacturing a semiconductor device, and more particularly, to suppress and mitigate the foot phenomenon of a photoresist pattern in a photo process when patterning a metal wiring, thereby forming an oxide layer without loss of dimensions in an etching process. The present invention relates to a method of forming a metal wiring and a semiconductor device including the metal wiring formed as described above.

일반적으로 반도체 소자는 웨이퍼 상에 확산, 사진, 식각, 이온주입 및 증착 등의 일련의 공정을 거쳐서 완성된다. In general, semiconductor devices are completed through a series of processes such as diffusion, photography, etching, ion implantation, and deposition on a wafer.

사진(lithography) 공정은 마스크 상에 레이아웃(layout)된 패턴을 공정제어규격(specification) 대로 웨이퍼 상에 1차적으로 구현하는 기술이다. 이를 위하여 패턴이 형성된 레티클을 통하여 특정한 파장을 갖는 빛 에너지를 감광막(photoresist)이 도포되어 있는 웨이퍼 상에 투영 및 노광(exposure)할 때, 빛 에너지에 의한 광화학반응이 일어나게 되며, 후속 현상(develop) 공정시 노광 지역에서 화학반응에 의한 용해도 속도를 증가시켜 패턴을 형성하게 된다. 형성된 감광막 패턴은 후속공정인 식각 또는 이온 주입 공정시에 마스크 역할을 하게 되며, 최종적으로 산소(O2) 플라즈마에 의하여 스트립된다.A lithography process is a technique that primarily implements a pattern laid out on a mask on a wafer in accordance with process control specifications. To this end, when the light energy having a specific wavelength is projected and exposed on the wafer on which the photoresist is applied through a patterned reticle, a photochemical reaction caused by the light energy occurs, and a subsequent development is performed. During the process, the pattern is formed by increasing the solubility rate by chemical reaction in the exposure area. The formed photoresist pattern serves as a mask in the subsequent etching or ion implantation process and is finally stripped by oxygen (O 2 ) plasma.

현재 반도체 소자의 고속화, 고집적화가 급속도로 진행되고 있는데, 이는 트랜지스터의 미세화에 따른 것이다. 트랜지스터의 집적도 향상에 대응하여 배선의 선폭 역시 미세화되고 있으며, 사진공정의 중요성은 커지고 있다.At present, high speed and high integration of semiconductor devices is rapidly progressing due to miniaturization of transistors. In line with the increase in the integration density of transistors, the line width of the wiring is also miniaturized, and the importance of the photo process is increasing.

도 1 내지 도 4는 종래기술에 따른 금속배선의 형성공정을 나타내는 단면도들이다.1 to 4 are cross-sectional views illustrating a process of forming a metal wire according to the prior art.

도 1을 참조하면, 기판의 절연막(1) 상에 금속배선 형성을 위한 금속막(9)을 적층한다. 금속막(9)은 알루미늄(Al, 3), 티타늄(Ti, 5), 및 티타늄질화막(TiN, 7) 의 적층막으로 구성된다. 금속막 상에 감광막(11)을 도포한다.Referring to FIG. 1, a metal film 9 for forming metal wirings is stacked on an insulating film 1 of a substrate. The metal film 9 is composed of a laminated film of aluminum (Al, 3), titanium (Ti, 5), and titanium nitride film (TiN, 7). The photosensitive film 11 is apply | coated on a metal film.

도 2를 참조하면, 패턴이 형성된 레티클(미도시)을 통하여 감광막(11)에 노광공정을 진행하면 노광된 감광막(11a)에 광화학반응이 일어나게 된다. 노광시에 감광막은 수소이온(H+)과 반응하는데, 노광된 감광막의 하부에서는 수소이온의 농도가 상대적으로 작다. 이는 금속막 상부의 티타늄질화막(7) 표면부근에서 티타늄질화막의 질소(N)가 수소이온(H+)과 반응하기 때문이다.Referring to FIG. 2, when the exposure process is performed on the photosensitive film 11 through a reticle (not shown) on which a pattern is formed, a photochemical reaction occurs on the exposed photosensitive film 11a. At the time of exposure, the photosensitive film reacts with hydrogen ions (H +), and the concentration of hydrogen ions is relatively small in the lower portion of the exposed photosensitive film. This is because nitrogen (N) of the titanium nitride film reacts with hydrogen ions (H +) in the vicinity of the surface of the titanium nitride film 7 above the metal film.

도 3을 참조하면, 현상공정을 진행하여 노광된 감광막(11a)을 제거하여 감광막 패턴(11b)을 형성한다. 이 때, 감광막 패턴(11b)의 하부에는 감광막 풋(foot, 13)이 형성된다. 감광막 풋(13)은 금속막의 표면부근에서 상대적으로 낮은 수소이온(H+)에 기인하여, 감광막이 잔류하여 발생한다. Referring to FIG. 3, the developing process is performed to remove the exposed photosensitive film 11a to form the photosensitive film pattern 11b. At this time, a photosensitive film foot 13 is formed below the photosensitive film pattern 11b. The photosensitive film foot 13 is generated due to residual photosensitive film due to relatively low hydrogen ions (H +) near the surface of the metal film.

도 4를 참조하면, 감광막 패턴(11b)을 식각마스크로 사용하여 금속막(9)을 패터닝하여 금속 배선(9)을 형성한다. 그런데, 감광막 패턴의 하부에 형성된 감광막 풋으로 인하여 금속 배선의 폭은 커지게 된다.Referring to FIG. 4, the metal film 9 is patterned using the photoresist pattern 11b as an etching mask to form the metal wiring 9. However, the width of the metal wiring becomes large due to the photosensitive film foot formed under the photosensitive film pattern.

감광막 풋은 패턴의 한계치수(Critical Dimension)가 작은 반면에 감광막의 두께가 큰 경우에 발생되기 쉽다. 그런데, 일반적으로 금속막을 식각하기 위해서는 감광막의 두께가 금속막의 두께보다 2배 이상 커야만 하기 때문에 금속 배선의 선폭을 작게한다고 해서 금속막 두께를 고려하지 않고 감광막 두께를 작게만 할 수 없다.The photosensitive film foot is likely to occur when the critical dimension of the pattern is small while the photosensitive film thickness is large. However, in general, in order to etch the metal film, the thickness of the photoresist film must be at least two times larger than the thickness of the metal film, so that the line width of the metal wiring cannot be made small without considering the metal film thickness.

이와 같이, 금속막의 사진식각공정을 진행하여 금속배선을 형성하는데 있어, 한계치수를 제어하는데 어려움이 있을 뿐만 아니라, 이후에 진행되는 금속 층간절 연막의 갭필(gap fill) 공정에서도 문제를 일으킬 수 있다.As described above, in forming the metal wiring by performing the photolithography process of the metal film, it is not only difficult to control the limit dimension, but may also cause a problem in the gap fill process of the metal interlayer insulation film that is subsequently performed. .

본 발명의 목적은 감광막 패턴의 풋 현상을 억제 또는 제거하여 치수의 손실 없는 금속 배선을 형성하는 방법을 제공하는 것이다.It is an object of the present invention to provide a method of suppressing or eliminating the foot phenomenon of a photoresist pattern to form metal wiring without loss of dimensions.

또한, 본 발명의 다른 목적은 금속 배선의 표면에 산화층이 형성된 반도체 소자를 제공하는 것이다.Another object of the present invention is to provide a semiconductor device having an oxide layer formed on the surface of a metal wiring.

본 발명에 따른 금속 배선 형성방법은 기판에 금속막을 증착하고, 금속막을 산소 플라즈마 처리하여 금속막 표면에 산화층을 형성하여 수소이온이 금속막과 반응하는 것을 원천적으로 예방한다. 산화층이 표면에 형성된 금속막 표면에 감광막을 도포하고, 감광막을 노광 및 현상하여 감광막 패턴을 형성한다. 감광막 패턴은 감광막 풋이 발생하지 않으며, 이 감광막 패턴을 식각마스크로 사용하여 금속막을 패터닝하여 금속 배선을 형성한다. In the method for forming a metal wiring according to the present invention, a metal film is deposited on a substrate, and an oxide layer is formed on the surface of the metal film by oxygen plasma treatment, thereby preventing hydrogen ions from reacting with the metal film. A photosensitive film is applied to the metal film surface on which the oxide layer is formed on the surface, and the photosensitive film is exposed and developed to form a photosensitive film pattern. The photoresist pattern does not generate a photoresist film foot, and the metal film is patterned to form a metal wiring using the photoresist pattern as an etching mask.

본 발명에 있어서, 금속막은 알루미늄, 티타늄, 및 티타늄 질화막이 순서대로 적층되어 있으며, 산화층은 티타늄질화막에 형성할 수 있다. 산소 플라즈마 처리는 화학 건식식각(Chemical Dry Etch) 장치를 사용하여, 압력은 45 파스칼(Pascal), 전력은 700W, 시간은 60 내지 90초로 산소를 400 내지 500sccm으로 하는 것이 바람직하다.In the present invention, the metal film is formed by sequentially stacking aluminum, titanium, and titanium nitride films, and an oxide layer can be formed on the titanium nitride film. Oxygen plasma treatment uses a chemical dry etching apparatus, the pressure is 45 Pascal, the power is 700W, the time is 60 to 90 seconds, the oxygen is preferably 400 to 500 sccm.

구현예Embodiment

이하 도면을 참조로 본 발명의 구현예에 대해 설명한다.Embodiments of the present invention will be described below with reference to the drawings.

도 5 내지 도 8은 본 발명에 따른 금속 배선의 형성방법을 나타내는 단면도들이다.5 to 8 are cross-sectional views showing a method of forming a metal wiring according to the present invention.

도 5를 참조하면, 기판의 절연막(101) 상에 금속배선 형성을 위한 금속막(109)을 적층한다. 금속막(109)은 알루미늄(Al, 103), 티타늄(Ti, 105), 및 티타늄질화막(TiN, 107)의 순차적으로 적층하여 형성한다.Referring to FIG. 5, a metal film 109 for forming metal wirings is stacked on an insulating film 101 of a substrate. The metal film 109 is formed by sequentially stacking aluminum (Al, 103), titanium (Ti, 105), and titanium nitride film (TiN, 107).

도 6을 참조하면, 금속막(109) 표면에 산소(O2) 플라즈마 처리를 실시한다. 이 때, 티타늄질화막(107)의 상부에 산화티타늄층(110)이 형성된다. 산소 플라즈마 처리는 화학 건식식각(Chemical Dry Etch) 장치를 사용할 수 있다. 공정조건은 압력은 45 파스칼, 전력은 700W, 시간은 60 내지 90초로 산소를 400 내지 500sccm으로 하는 것이 바람직하다.Referring to FIG. 6, oxygen (O 2 ) plasma treatment is performed on the surface of the metal film 109. At this time, the titanium oxide layer 110 is formed on the titanium nitride film 107. Oxygen plasma treatment may use a chemical dry etching apparatus. The process conditions are preferably 45 Pascals, 700 Ws in power, 60 to 90 seconds in time, and 400 to 500 sccm in oxygen.

도 7을 참조하면, 금속막(109) 표면에 산소 플라즈마 처리하여 산화층(110)을 형성한 후에 감광막을 도포한 후에 사진공정을 진행하여 감광막 패턴(111a)을 형성한다. 이 때, 금속막(109) 표면은 산소 플라즈마 처리가 되어 있기 때문에 감광막 풋이 발생하지 않는다.Referring to FIG. 7, after the oxide layer 110 is formed by oxygen plasma treatment on the surface of the metal film 109, the photosensitive film is coated, and then a photo process is performed to form the photosensitive film pattern 111a. At this time, since the surface of the metal film 109 is subjected to oxygen plasma treatment, no photosensitive film foot is generated.

도 8을 참조하면, 감광막 패턴(111a)을 식각마스크로 사용하여 금속막을 패터닝한다.Referring to FIG. 8, the metal film is patterned using the photoresist pattern 111a as an etching mask.

도 9 및 도 10은 본 발명에 따른 산소 플라즈마 처리를 실시하기 전과 후의 SIMS(Secondary Ion Mass Spectrometry) 그래프를 나타낸다.9 and 10 show Secondary Ion Mass Spectrometry (SIMS) graphs before and after performing an oxygen plasma treatment according to the present invention.

산소 플라즈마 처리를 실시하기 전의 SIMS 그래프(도 9)와 대비할 때, 산소 플라즈마 처리를 실시한 후의 SIMS 그래프(도 10)에서는 산화층(oxidation layer)이 형성된 것을 확인할 수 있었다. 도 9 및 도 10에서, "Ti1" 및 "Ti2"가 가리키는 곡선은 티타늄층(105) 또는 티타늄질화막(107)을 구성하는 티타늄 원자의 농도 변화를 나타내며, "O"가 가리키는 곡선은 산소 원자의 농도 변화를 나타낸다. 스퍼터 시간에 따라 금속막 표면으로부터의 깊이에 따른 원자 농도의 변화를 알 수 있는데, 도 10에서는 금속막 표면 부근에서 상당량의 산소 원자가 검출되고 있으며, 이를 통해 금속막 표면에 산소 플라즈마 처리를 행한 경우에는 산화티타늄이 형성되었음을 알 수 있다.As compared with the SIMS graph (FIG. 9) before the oxygen plasma treatment, it was confirmed that an oxidation layer was formed in the SIMS graph (FIG. 10) after the oxygen plasma treatment. 9 and 10, curves indicated by "Ti1" and "Ti2" indicate a change in concentration of titanium atoms constituting the titanium layer 105 or titanium nitride film 107, and curves indicated by "O" indicate oxygen atoms. Indicates a change in concentration. It can be seen that the atomic concentration changes with the depth from the surface of the metal film according to the sputtering time. In FIG. 10, a considerable amount of oxygen atoms are detected near the surface of the metal film, and when oxygen plasma treatment is performed on the surface of the metal film, It can be seen that titanium oxide was formed.

지금까지 본 발명의 구체적인 구현예를 도면을 참조로 설명하였지만 이것은 본 발명이 속하는 기술분야에서 평균적 지식을 가진 자가 쉽게 이해할 수 있도록 하기 위한 것이고 발명의 기술적 범위를 제한하기 위한 것이 아니다. 따라서 본 발명의 기술적 범위는 특허청구범위에 기재된 사항에 의하여 정하여지며, 도면을 참조로 설명한 구현예는 본 발명의 기술적 사상과 범위 내에서 얼마든지 변형하거나 수정할 수 있다.Although specific embodiments of the present invention have been described with reference to the drawings, this is intended to be easily understood by those skilled in the art and is not intended to limit the technical scope of the present invention. Therefore, the technical scope of the present invention is determined by the matters described in the claims, and the embodiments described with reference to the drawings may be modified or modified as much as possible within the technical spirit and scope of the present invention.

본 발명에 따른 금속 배선 형성방법은 감광막을 도포하기 전에 금속막을 산소 플라즈마 처리하여 감광막 풋 현상 원인을 사전에 예방하여 치수의 손실이 없는 금속배선을 형성할 수 있다.According to the method of forming a metal wiring according to the present invention, the metal film may be treated with oxygen plasma prior to coating the photosensitive film to prevent the cause of the photosensitive film put phenomenon in advance to form a metal wiring without loss of dimensions.

Claims (6)

기판에 알루미늄, 티타늄 및 티타늄 질화막을 포함하는 금속막을 순차적으로 증착하는 단계;Sequentially depositing a metal film including aluminum, titanium, and titanium nitride on the substrate; 상기 티타늄 질화막을 산소 플라즈마 처리하여 금속막 표면에 산화층을 형성하는 단계;Oxygen plasma treatment of the titanium nitride film to form an oxide layer on a surface of the metal film; 상기 산화층이 표면에 형성된 금속막 표면에 감광막을 도포하는 단계;Coating a photosensitive film on a surface of the metal film on which the oxide layer is formed; 상기 감광막을 노광 및 현상하여 감광막 패턴을 형성하는 단계; 및Exposing and developing the photoresist to form a photoresist pattern; And 상기 감광막 패턴을 식각마스크로 사용하여 상기 금속막을 패터닝하는 단계를 포함하되, 상기 산화층은 산화티타늄층인 것을 특징으로 하는 금속 배선 형성방법.And patterning the metal layer using the photoresist pattern as an etching mask, wherein the oxide layer is a titanium oxide layer. 삭제delete 삭제delete 제1항에 따른 방법에 의해 형성된 금속 배선을 포함하는 반도체 소자로서, 상기 금속 배선의 상부에 산화층이 형성된 것을 특징으로 하는 반도체 소자.A semiconductor device comprising a metal wiring formed by the method according to claim 1, wherein an oxide layer is formed on the metal wiring. 삭제delete 삭제delete
KR1020050062329A 2005-07-11 2005-07-11 Method for forming metal line with oxidation layer and semiconductor device providing with said metal line KR100664865B1 (en)

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