KR100654123B1 - Capacitor in semiconductor device and method for fabricating the same - Google Patents

Abstract

The present invention is to provide a capacitor manufacturing method capable of stably forming the lower electrode by removing the bridge phenomenon in which the cylinder-shaped lower electrode is short-circuited with the neighboring lower electrode, and a capacitor manufactured by the manufacturing method. The present invention includes forming a first lower electrode on a substrate on which a predetermined process is completed by a copper film; Forming a second lower electrode on the first lower electrode with a silicon film; Forming a dielectric thin film on the second lower electrode; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

Semiconductor, capacitor, cylinder, bottom electrode, copper, nickel.

Description

CAPACITY OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF {CAPACITOR IN SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME}             

1A to 1D are views showing a three-dimensional cylindrical capacitor manufacturing method of a semiconductor device according to the prior art.

1D is a diagram showing a problem when manufacturing a three-dimensional cylindrical capacitor according to the prior art.

Figure 2 is an electron micrograph showing the problem of Figure 1d.

3A to 3D illustrate a method of manufacturing a three-dimensional cylindrical capacitor in a semiconductor device according to a preferred embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

35: sacrificial film for capacitor formation

36: capacitor formation hole

37: first lower electrode

38: second lower electrode

39: dielectric thin film                 

40: upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a capacitor of a semiconductor device having a three-dimensional cylinder structure and a manufacturing method thereof.

As the degree of integration of semiconductor memory devices, in particular DRAM (Dynamic Random Access Memory), increases, the area of memory cells, which are basic units for information storage, has been rapidly reduced.

Such a reduction in the memory cell area is accompanied by a reduction in the area of the cell capacitor, thereby lowering the sensing margin and the sensing speed, and causes a problem that the durability against soft errors caused by α-particles is degraded. Accordingly, there is a need for a method capable of securing sufficient capacitance in a limited cell area.

The capacitance C of the capacitor is defined as in Equation 1 below.

C = εAs / d

Is the dielectric constant, As is the effective surface area of the electrode, and d is the distance between the electrodes. Therefore, in order to increase the capacitance of the capacitor, it is necessary to increase the surface area of the electrode, reduce the thickness of the dielectric thin film, or increase the dielectric constant.                         

Among them, a method of increasing the effective surface area of the electrode in a limited layout area by first making a three-dimensional form of the electrode structure of the capacitor, such as a concave structure and a cylinder structure, was first considered.

The concave structure forms a hole in which an electrode of a capacitor is to be formed in an insulating film, a lower electrode of a capacitor is formed on an inner surface of the hole, and a dielectric thin film and an upper electrode are formed thereon. However, as semiconductor memory devices are increasingly integrated, it is difficult to secure sufficient capacitor capacity per cell within a limited cell area even with a concave structure, and thus a cylinder structure capable of providing a larger surface area has been proposed.

The cylinder structure forms a hole in which the electrode of the capacitor is to be formed in the insulating film, forms a lower electrode of the capacitor in the hole, removes the insulating film used as a formwork, and then removes the dielectric thin film and the upper electrode along the remaining lower electrode surface. It is a form laminated in order.

Therefore, the cylinder structure can use both the inner and outer surfaces of the lower electrode as the effective surface area of the capacitor, thereby forming a capacitor having a larger capacitance in a limited area than the concave structure.

However, the degree of integration of semiconductor memory devices is increasing and the area allocated to one unit cell continues to decrease. On the other hand, in a situation where a capacitor needs a constant capacity to maintain stable data, the shape of electrodes in which a capacitor of a cylinder structure is also manufactured is getting narrower in width and higher in height.

When the shape of the capacitor lower electrode of the cylindrical structure decreases in the horizontal direction and increases only in the vertical direction, the supporting force of the lower electrode decreases, resulting in frequent damaging between the lower electrodes after the removal of the capacitor oxide film. As a result, a problem occurs that causes a device failure by causing a bridge or the like.

1A to 1D are views showing a three-dimensional cylindrical capacitor manufacturing method of a semiconductor device according to the prior art.

First, as shown in FIG. 1A, the interlayer insulating film 12 is formed on the semiconductor substrate 10 on which the active region 11 is formed, and then penetrates the interlayer insulating film 12 to form an active region ( A contact hole connected to 11) is formed. A contact plug 13 is formed by filling the contact hole with a conductive material.

Subsequently, the etch stop film 14 is formed using a silicon nitride film or the like, and the sacrificial film 15 for forming the capacitor is formed so that the lower electrode of the capacitor is formed thereon.

Subsequently, the insulating film 15 of the region where the capacitor is to be formed is selectively removed to form the capacitor forming hole 16. First, the capacitor formation sacrificial layer 15 is selectively removed to expose the etch stop layer 14, and then the exposed etch stop layer 14 is removed.

The capacitor forming sacrificial film 15 serves as a formwork for forming the lower electrode of the capacitor.

Subsequently, as shown in FIG. 1B, the lower electrode 17 is formed of a conductive polysilicon film along the inner surface of the capacitor forming hole 16.

Subsequently, as shown in FIG. 1C, the sacrificial film 15 for forming a capacitor is removed. Subsequently, a dielectric thin film 18 is formed along the surface of the lower electrode 17, and an upper electrode 19 is formed as a conductor film thereon.

1D is a diagram showing a problem in manufacturing a three-dimensional cylindrical capacitor according to the prior art.

Subsequently, referring to FIG. 1D, a problem in manufacturing a cylindrical capacitor according to the related art will be described. As described above, as the memory device is highly integrated, the width of the lower electrode becomes narrower and the height becomes higher. Therefore, after removing the capacitor-forming sacrificial layer 15, the remaining lower electrode is inclined and sticks to the neighboring lower electrode.

In particular, since the conductive polysilicon film used as the lower electrode has a high surface tension and tends to tilt when the sacrificial film for capacitor formation is removed, the above-described bridge phenomenon frequently occurs when the height of the lower electrode is high.

In order to secure the capacity of a certain capacitor in a limited area, the lower electrode of the capacitor must be formed above a certain height, so the height of the lower electrode of the cylindrical capacitor cannot be lowered.

FIG. 2 is an electron micrograph showing the problem of FIG. 1D, showing a bridge phenomenon in which lower electrodes of a cylindrical capacitor stick together.

Referring to FIG. 2, it can be seen that the capacitor lower electrodes of the region B adhere to each other. If the process continues in this state, the memory device eventually becomes defective.

The present invention has been proposed to solve the above problems, the manufacturing method of the capacitor and the manufacturing method capable of stably forming the lower electrode by removing the bridge phenomenon in which the cylinder-shaped lower electrode is short-circuited with the neighboring lower electrode To provide the capacitor.

In order to solve the above problems, the present invention comprises the steps of forming a first lower electrode with a copper film on a substrate is completed a predetermined process; Forming a second lower electrode on the first lower electrode with a silicon film; Forming a dielectric thin film on the second lower electrode; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

In addition, the present invention comprises the steps of forming a first lower electrode with a nickel film on the substrate is completed a predetermined process; Forming a second lower electrode on the first lower electrode with a silicon film; forming a dielectric thin film on the second lower electrode; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

In addition, the present invention is a cylindrical first lower electrode formed of a copper film on a substrate; A second lower electrode formed of a conductive polysilicon film on an inner surface of the first lower electrode; A dielectric thin film on the second lower electrode; And a capacitor of the semiconductor device having an upper electrode on the dielectric thin film.

In addition, the present invention includes a first lower electrode formed of a nickel film on the substrate; A second lower electrode formed of a conductive polysilicon film on the first lower electrode; A dielectric thin film on the second lower electrode; And a capacitor of the semiconductor device having an upper electrode on the dielectric thin film.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

3A to 3D are views illustrating a method of manufacturing a cylindrical capacitor according to a preferred embodiment of the present invention.

As shown in FIG. 3A, the cylindrical capacitor manufacturing method according to the present embodiment forms an interlayer insulating film 32 on the semiconductor substrate 30 on which the active region 31 is formed, and then penetrates the interlayer insulating film 32. As a result, a contact hole connected to the active region 31 of the semiconductor substrate 30 is formed. A contact plug 33 is formed by filling the contact hole with a conductive material.

The interlayer insulating layer 32 may include an undoped-silicate glass (USG) film, a phospho-silicate glass (PSG) film, a boro-phospho-silicate glass (BPSG) film, a high density plasma (HDP) oxide film, and a spin on glass (SOG) film. A film, a TEOS (Tetra Ethyl Ortho Silicate) film or an oxide film using HDP (high densigy plasma), or a thermal oxide film (Thermal Oxide), which is formed by oxidizing a silicon substrate at a high temperature between 600 and 1,100 ° C in a furnace. I use it.

Subsequently, the etch stop film 34 is formed using a silicon nitride film or the like, and the sacrificial film 35 for forming the capacitor is formed so that the lower electrode of the capacitor is formed thereon.

Here, the etch stop film 34 is formed using a silicon nitride film, etc., and the capacitor forming sacrificial film 34 is formed of USG (Undoped-Silicate Glass), PSG (Phospho-Silicate Glass), and BPSG (Boro-Phospho-Silicate Glass). ), HDP (High density Plasma) oxide, SOG (Spin On Glass), TEOS (Tetra Ethyl Ortho Silicate) or HDP (high densigy plasma), or other thermal oxide (Thermal Oxide; 600 ~ Film formed by oxidizing a silicon substrate at a high temperature of 1,100 ° C.

Subsequently, the sacrificial layer 35 in the region where the capacitor is to be formed is selectively removed to form the capacitor forming hole 36. First, the capacitor forming sacrificial layer 15 is selectively removed to expose the etch stop layer 14, and then the exposed etch stop layer 14 is removed to complete the capacitor forming hole 36.

Subsequently, the first lower electrode 37 is formed in the capacitor forming hole 36 using copper or nickel.

Looking at the process of forming the first lower electrode in the capacitor forming hole 36 in detail,

First, a copper film is formed along the pattern of the capacitor forming hole 36, and the copper film on the capacitor forming sacrificial layer 35 is removed by Cl ₂ / Ar base using an etch back process to remove only the inside of the capacitor forming hole. It leaves a copper film.

Subsequently, as shown in FIG. 3B, a second lower electrode is formed of a conductive silicon film on the first lower electrode 37. In this embodiment, the first lower electrode is formed of copper or nickel, and the second lower electrode is formed of a silicon film thereon, and the lower electrode is formed of a copper film / silicon film or a nickel film / silicon film. I am doing it.

Here, the silicon film formed as the lower electrode may form a conductive silicon film in one process, or may be made conductive by doping impurities in a subsequent process after forming the silicon film.

When the silicon film is formed on the copper film or the nickel film in such a manner, the thermal process temperature for crystallization may be lowered due to the metal induced crystallization (MIC) property of the polysilicon of copper during the subsequent heat process.

The MIC property means that when a silicon or a metal such as copper or nickel is bonded to each other, crystallization is well performed with polysilicon due to the property of the copper or nickel metal, and specifically, crystallization at 700 to 900 ° C is good even at 500 ° C or less. Will be done.

Therefore, when the silicon film is formed on the copper film or the nickel film as the lower electrode, the silicon film can be crystallized at a relatively low temperature in the range of 300 to 500 ° C.

Subsequently, as shown in FIG. 3C, the sacrificial layer 35 for capacitor formation is removed using a BOE (Buffered Oxide Etchant) solution.

At this time, since the lower electrodes 37 and 38 are formed of a copper film / silicon film or a nickel film / silicon film, the surface tension can be reduced compared to the silicon electrode only, so that the lower electrode can be inclined. . As a result, the bridge phenomenon that is stuck between the lower electrode and the lower electrode can be greatly reduced, thereby stably forming a three-dimensional cylindrical capacitor.

In addition, since the bridge phenomenon can be reduced, the height of the lower electrode can be stably higher than that of the related art even when other process conditions are performed as in the prior art.

In addition, a hemispherical silicon grain may be formed on the silicon film formed of the second lower electrode 38 to increase the surface.

In addition, when the capacitor forming sacrificial layer 35 is removed, the capacitor forming sacrificial layer 35 may be removed using HF, and the lower electrode may be formed of a polysilicon layer by removing the copper layer. Even if the copper film is removed, the remaining polysilicon film is not inclined because it is removed like the capacitor forming sacrificial film 35.

Subsequently, as shown in FIG. 3D, a dielectric thin film 39 is formed, and an upper electrode 40 is formed thereon.

The upper electrode 40 is a titanium nitride film, polysilicon film, tungsten film (W), platinum film (Pt), iridium film (Ir), iridium oxide film (IrO ₂ ), ruthenium film (Ru), ruthenium oxide film (RuO ₂ ) , Tungsten nitride film (WN), ruthenium oxide strontium oxide film (SrRuO ₃ ), or a combination thereof is used.

The dielectric thin film 39 includes a silicon oxide film, a silicon nitride film, Ta ₂ O ₅ , Al ₂ O ₃ , La ₂ O ₃ , HfO ₂ , SrTiO ₃ , (Ba _{1- x} , Sr _x ) TiO ₃ (BST), ZrO _High dielectric materials such as ₂ , (Pb, Zr) TiO ₃ (PZT), BaTiO ₃ (BTO), (Bi _{1- x} , Lax) Ti ₃ O ₁₂ (BLT), (Pb, La) (Zr, Ti) _One of the ferroelectric materials such as O ₃ (PLZT), SrBi ₂ Ta ₂ O ₉ (SBT), SrBi ₂ (Ta _1-x , Nb _x ) ₂ O ₉ (SBTN), Bi ₄ Ti ₃ O ₁₂ (BiT) It may be selected or a combination thereof may be laminated.

Subsequently, thermal processes are performed to improve the characteristics of the dielectric thin film and to crystallize the silicon film used as the lower electrode. At this time, the crystallization of the silicon film used as the lower electrode is easily performed by a copper film or a nickel film connected adjacently, and thus the temperature of the thermal process can be advanced at a relatively low temperature in the range of 300 to 500.

At this time, the thermal process proceeds to the N ₂ gas base, or the process voltage proceeds to the N ₂ plasma base at VPP 1 Volt to 10 volts or less, to the H ₂ plasma base at VPP 1 to 10 volts or less, or to VPP 1 to 10 volts. The following proceeds to an O ₂ plasma base.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention, when the cylindrical lower electrode is formed of a copper / polysilicon film or a nickel / polysilicon film, the surface tension of the lower electrode can be reduced, and the lower electrode is inclined when removing the capacitor forming sacrificial film. The phenomenon of deformation of can be greatly reduced. As a result, the bridge phenomenon that the adjacent lower electrodes stick to each other can be reduced, so that a reliable three-dimensional capacitor can be manufactured. Therefore, the surface tension of the lower electrode in the form of a cylinder can be reduced, so that the lower electrode can be formed more stably than before.

In addition, due to the metal characteristics of copper or nickel, it is easy to crystallize polysilicon, so that the process temperature for crystallization may be performed in the range of 300 to 500, which is about 200 or more lower than that of the conventional art, thereby increasing the process reliability of the capacitor manufacturing process.

Claims (26)

Forming a first lower electrode on a substrate on which a predetermined process is completed; Forming a second lower electrode on the first lower electrode with a silicon film; Forming a dielectric thin film on the second lower electrode; And Forming an upper electrode on the dielectric thin film Capacitor manufacturing method of a semiconductor device comprising a.  The method of claim 1, And performing a thermal process for crystallizing the silicon film. The method of claim 2, The thermal process is a capacitor manufacturing method of a semiconductor device, characterized in that the process temperature proceeds in the range of 300 to 500 degrees. The method of claim 3, wherein The thermal process is a capacitor manufacturing method of a semiconductor device, characterized in that to proceed to the N ₂ gas base. The method of claim 3, wherein The thermal process A capacitor manufacturing method for a semiconductor device, characterized in that it proceeds to the N ₂ plasma base at 1 ~ 10volt. The method of claim 3, wherein The thermal process A capacitor manufacturing method of a semiconductor device, characterized in that it proceeds to the H ₂ plasma base at 1 ~ 10volt. The method of claim 3, wherein The thermal process A capacitor manufacturing method of a semiconductor device, characterized in that proceeds to the O ₂ plasma base in the VPP 1 ~ 10volt range. The method according to any one of claims 1 to 7, Forming a first lower electrode from the copper film Forming a sacrificial layer for forming a capacitor on the substrate; Selectively removing the capacitor forming sacrificial layer in the region where the capacitor is to be formed to form a capacitor forming hole; Forming the first lower electrode with the copper film in the capacitor forming hole; And Removing the sacrificial layer for forming the capacitor Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 8, Forming the first lower electrode from the copper film Forming a copper film along a pattern of the capacitor forming hole; And And removing the copper film on the upper portion of the capacitor forming sacrificial film with a Cl ₂ / Ar base by an etch back process to leave the copper film only inside the capacitor forming hole. The method of claim 8, Removing the sacrificial layer for forming the capacitor And removing the capacitor forming sacrificial film using HF, and removing the copper film. The method of claim 8, Removing the sacrificial layer for forming the capacitor The capacitor manufacturing method of the semiconductor device characterized by removing the said sacrificial film for capacitor formation using a BOE solution. The method of claim 8, And forming a hemispherical silicon grain with surface augmentation on the silicon film formed by the second lower electrode. Forming a first lower electrode on the substrate on which the predetermined process is completed; Forming a second lower electrode on the first lower electrode with a silicon film; Forming a dielectric thin film on the second lower electrode; And Forming an upper electrode on the dielectric thin film Capacitor manufacturing method of a semiconductor device comprising a.  The method of claim 13, And performing a thermal process for crystallizing the silicon film. The method of claim 14, The thermal process is a capacitor manufacturing method of a semiconductor device, characterized in that the process temperature proceeds in the range of 300 to 500 degrees. The method of claim 15, The thermal process is a capacitor manufacturing method of a semiconductor device, characterized in that to proceed to the N ₂ gas base. The method of claim 15, The thermal process A capacitor manufacturing method of a semiconductor device, characterized in that it proceeds to the N ₂ plasma base in the VPP 1 ~ 10volt range. The method of claim 15, The thermal process A capacitor manufacturing method of a semiconductor device, characterized in that it proceeds to the H ₂ plasma base in the range of VPP 1 ~ 10volt. The method of claim 15, The thermal process A capacitor manufacturing method of a semiconductor device, characterized in that proceeds to the O ₂ plasma base in the VPP 1 ~ 10volt range. The method according to any one of claims 13 to 19, Forming a first lower electrode from the nickel film Forming a sacrificial layer for forming a capacitor on the substrate; Selectively removing the capacitor forming sacrificial layer in the region where the capacitor is to be formed to form a capacitor forming hole; Forming the first lower electrode with the nickel film in the capacitor forming hole; And Removing the sacrificial layer for forming the capacitor Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 20, The forming of the first lower electrode with the nickel film may include Forming a nickel film along a pattern of the capacitor forming hole; And And removing the nickel film on the capacitor forming sacrificial film with a Cl ₂ / Ar base by an etch back process to leave the nickel film only inside the capacitor forming hole. The method of claim 21, Removing the sacrificial layer for forming the capacitor And removing the capacitor forming sacrificial film using HF, and removing the nickel film. The method of claim 21, Removing the sacrificial layer for forming the capacitor The capacitor manufacturing method of the semiconductor device characterized by removing the said sacrificial film for capacitor formation using a BOE solution. The method of claim 20, And forming a hemispherical silicon grain with surface augmentation on the silicon film formed by the second lower electrode. A cylindrical first lower electrode formed of a copper film on a substrate; A second lower electrode formed of a conductive polysilicon film on an inner surface of the first lower electrode; A dielectric thin film on the second lower electrode; And An upper electrode on the dielectric thin film A capacitor of a semiconductor device having a. A first lower electrode formed of a nickel film on the substrate; A second lower electrode formed of a conductive polysilicon film on the first lower electrode; A dielectric thin film on the second lower electrode; And An upper electrode on the dielectric thin film A capacitor of a semiconductor device having a.

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