KR100639572B1 - Electrostatic chuck having double flat zones - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic chuck (ESC) for chucking wafers, and more particularly to an electrostatic chuck with a double flat capable of chucking notch type wafers.

In the configuration of the present invention, the electrostatic chuck for electrostatically chucking a notch type wafer has two flat zones, and the distance between the flats is at least 96% and at most 96.8% of the wafer diameter. It is characterized by.

According to the present invention, an electrostatic chuck having a double flat on which a notched type wafer is mounted can prevent arcing from occurring and at the same time increase the yield of chip production on the wafer.

In addition, the life of the electrostatic chuck can be increased by changing the position of the electrostatic chuck 180 degrees after a predetermined time.

Notch type, double flat, electrostatic chuck.

Description

ELECTROSTATIC CHUCK HAVING DOUBLE FLAT ZONES}

1A illustrates a notch type electrostatic chuck.

FIG. 1B shows a flat type electrostatic chuck. FIG.

2A shows a notched type wafer.

2B shows a flat type wafer.

3A is a view showing a case where a notched type wafer is mounted on a notched type electrostatic chuck;

3B is a view showing a case where a notched type wafer is mounted on an existing flat type electrostatic chuck;

4 is a view showing a case where a notched type wafer is mounted on a double flat electrostatic chuck according to an embodiment of the present invention;

<Brief description of the main parts of the drawings>

100a: notch type electrostatic chuck

100b: flat type electrostatic chuck

200a: notch type wafer

200b: flat type wafer

450: double flat

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic chuck (ESC) for chucking wafers, and more particularly to an electrostatic chuck with a double flat capable of chucking notch type wafers.

In general, semiconductor device manufacturing processes include an oxidation process, a deposition process, and an etching process. These processes are performed by inserting a wafer into a chamber. At this time, it is important that the wafer is chucked at high density in the chamber for a smooth process.

The wafer chucking method includes a mechanical method, a vacuum adsorption method, and an electrostatic chuck method using electrostatic power, among which electrostatic chuck methods are widely used.

1A and 1B, the electrostatic chuck has a notch-type electrostatic chuck 100a having a circular top surface 110 on which the wafer 120 is mounted, and a flat type electrostatic chuck on which one surface 130b of the top surface is flat. There is a chuck 100b.

2A and 2B, the wafer mounted on the notched type electrostatic chuck 100a uses a notch type wafer 200a having a circular shape, and the wafer mounted on the flat type electrostatic chuck 100b has one side. A flat type wafer 200b having a flat flat 210b is used.

As such, the same shape of the electrostatic chuck and the wafer is for chucking the wafer constantly. If the wafer is a notch type, and the electrostatic chuck is a flat type, the area of the wafer mounted on an area beyond the flat surface of the electrostatic chuck may have a different electrostatic chucking force. And the electrostatic chuck cannot cover the area where the chip is formed on the wafer.

Therefore, the shapes of the electrostatic chuck and the wafer have been used to date.

On the other hand, the flat type wafer is determined based on the flat conveying direction and position of the wafer, but there is no standard because there is no flat in the notched type wafer. Accordingly, in order to determine the transport direction and the position of the notched type wafer, the notched type wafer is formed with a fan-shaped reference groove 210a not present in the flat type wafer toward the wafer center. The transport direction and the position of the wafer are determined based on the reference groove 210a. This reference groove typically has a depth of 1.2-1.5 mm in a 200 mm wafer.

3, reference numeral 320a is a top surface of the electrostatic chuck, and 330a is a bottom surface of the electrostatic chuck. Since the diameter of the notched type electrostatic chuck for chucking a 200 mm wafer is about 196 mm, the distance between the reference groove 310a of the wafer and the upper portion of the notched type electrostatic chuck 320a is 0.5 to 0.8 mm.

Therefore, since the distance between the reference groove 310a and the upper surface of the notch type electrostatic chuck is about 0.5 to 0.8 mm, the distance is very short to prevent the plasma penetrating into the reference groove 310a. As a result, arcing occurs in the electrostatic chuck substantially in the vicinity of the reference groove 310a, and thus, a problem of shortening the life of the electrostatic chuck has occurred.

In order to solve this problem, in practice, it has been proposed to use a notched type wafer mounted on a flat type electrostatic chuck.

However, referring to FIG. 3B, when the notched type wafer is mounted on the flat type electrostatic chuck, the distance d between the notched groove of the wafer and the flat of the electrostatic chuck may be farther away, thereby causing no arcing. Since the electrostatic chuck has a region 350 that cannot cover all of the chip forming regions 340 on the wafer, it may cause another problem that the yield of chip production of the wafer is lowered.

Accordingly, an object of the present invention is to solve the problem of arcing that has occurred in the past by increasing the distance between the reference groove of the notched type wafer and the upper surface of the electrostatic chuck in the electrostatic chuck on which the notched type wafer is mounted. It does not deteriorate.

In order to achieve the above object of the present invention, an electrostatic chuck for electrostatically chucking a notch type wafer according to an embodiment of the present invention has two flat zones, Distance D is characterized in that 96% to 96.8% of the length of the wafer diameter.

In addition, the electrostatic chuck is characterized in that the upper surface on which the wafer is mounted is a dielectric layer, and the dielectric layer is an anodized film.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art.

The electrostatic chuck according to an embodiment of the present invention has two flats 450 (double flats). The wafer applicable to this double flat electrostatic chuck is a notched type wafer. The 8 inch notch type wafer has a diameter of 200 mm, and the notch type wafer has a reference groove 410 formed in the center direction of the wafer. The depth of the reference groove is the same depth as the conventional reference grooves, that is, 1.2 ~ 1.5mm.

In the flat of the double flat electrostatic chuck, the length of the flat portion is 30 mm to 40 mm. Therefore, in the case of the electrostatic chuck on which the 200 mm wafer is mounted, the distance between the flat of the double flat electrostatic chuck and the opposite flat is formed to be at least 192 mm and at most 193.6 mm.

That is, the minimum distance between the reference groove of the notched type wafer and the upper surface of the electrostatic chuck is 1.7 mm, and the maximum distance is 2.8 mm. This is a distance longer than a distance of 0.5 to 0.8 mm between the conventional reference groove and the upper surface of the electrostatic chuck, which is sufficient to prevent the plasma concentrated on the electrostatic chuck via the reference groove.

In addition, in contrast to the electrostatic chuck having one flat, unlike the top surface of one flat electrostatic chuck, the top surfaces of the two flat electrostatic chucks are large enough to cover the area 440 where chips are formed on the wafer. As a result, the yield of chips formed on the wafer is increased.

In addition, since the flat 450 is formed in two, the process is performed on the flat groove 450 of the notched type wafer, and then the wafer is changed by 180 degrees. It can be seen that the life of the electrostatic chuck is nearly doubled.

In the above-described embodiment, the 200 mm electrostatic chuck and the wafer have been described, but the same technical concept can be applied to the electrostatic chuck of 300 mm or more.

As described in detail above, according to the present invention, an electrostatic chuck having a double flat on which a notched type wafer is mounted can prevent the arcing and increase the yield of chip production on the wafer.

In addition, the life of the electrostatic chuck can be increased by changing the position of the electrostatic chuck 180 degrees after a predetermined time.

Claims (4)

In an electrostatic chuck that chucks a notch type wafer with a constant power, A notched type wafer 120 in which a reference groove 410 is formed in the center direction of the wafer to determine the transport direction and the position of the wafer; A double flat type electrostatic chuck 430 having two flats 450; An upper surface 420 of the double flat type electrostatic chuck 430 on which the notched type wafer 120 is mounted; The top surface 420 of the double flat type electrostatic chuck has a size that can cover all the area (440) where the chip is formed on the notched type wafer (120). The method of claim 1, The electrostatic chuck is characterized in that the upper surface on which the wafer is mounted is a dielectric layer, and the dielectric layer is an anodized film. The method of claim 1, The distance between the reference groove (410) and the portion of the flat (450) is spaced apart by a distance sufficient to prevent the plasma concentrated on the electrostatic chuck via the reference groove (410). The method according to claim 1 or 3, The diameter of the notched type wafer 120 is 200mm, the depth of the reference groove 410 is 1.2 ~ 1.5mm, the distance between the reference groove 410 and the flat 450 portion is 1.7 ~ 2.8mm Characterized by electrostatic chuck.

Images