KR100622821B1 - Leadframe structure for manufacturing semiconductor package - Google Patents

Leadframe structure for manufacturing semiconductor package Download PDF

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Publication number
KR100622821B1
KR100622821B1 KR1020050033917A KR20050033917A KR100622821B1 KR 100622821 B1 KR100622821 B1 KR 100622821B1 KR 1020050033917 A KR1020050033917 A KR 1020050033917A KR 20050033917 A KR20050033917 A KR 20050033917A KR 100622821 B1 KR100622821 B1 KR 100622821B1
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South Korea
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lead
semiconductor package
corner
lead frame
manufacturing
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KR1020050033917A
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Korean (ko)
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성필제
하선호
윤길수
전형일
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앰코 테크놀로지 코리아 주식회사
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    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16K—VALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K1/00—Lift valves or globe valves, i.e. cut-off apparatus with closure members having at least a component of their opening and closing motion perpendicular to the closing faces
    • F16K1/02—Lift valves or globe valves, i.e. cut-off apparatus with closure members having at least a component of their opening and closing motion perpendicular to the closing faces with screw-spindle
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16K—VALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K1/00—Lift valves or globe valves, i.e. cut-off apparatus with closure members having at least a component of their opening and closing motion perpendicular to the closing faces
    • F16K1/32—Details
    • F16K1/34—Cutting-off parts, e.g. valve members, seats
    • F16K1/36—Valve members
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16K—VALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K31/00—Actuating devices; Operating means; Releasing devices
    • F16K31/44—Mechanical actuating means
    • F16K31/50—Mechanical actuating means with screw-spindle or internally threaded actuating means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 반도체 패키지 제조용 리드프레임 구조에 관한 것으로서, 더욱 상세하게는 기존의 리드프레임 구조를 새롭게 개선하여, 와이어 본딩시 스티치 리프트 및 스티치 깨짐 현상과, 와이어 본딩이 이루어지는 리드프레임의 리드가 소잉시 발생되는 열에 의하여 손상되는 현상과, 소잉시 코너쪽 리드가 깨지는 현상 등을 용이하게 방지할 수 있도록 한 반도체 패키지 제조용 리드프레임 구조에 관한 것이다.The present invention relates to a lead frame structure for manufacturing a semiconductor package, and more particularly, to newly improve the existing lead frame structure, the stitch lift and stitch cracking phenomenon during wire bonding, and the lead frame lead wire is made during sawing. The present invention relates to a lead frame structure for manufacturing a semiconductor package, which can easily prevent a phenomenon of being damaged by heat, and a phenomenon in which a corner lead is broken during sawing.

즉, 본 발명은 인너리드의 강도를 보강하고자 그 후부에 한 쌍의 브릿지단을 형성하여, 와이어 본딩의 수율을 크게 향상시킬 수 있고, 또한 코너쪽 리드를 제3커넥팅 바를 배제한 구조로 개선하여, 코너쪽 리드가 파손되는 현상을 용이하게 방지할 수 있도록 한 반도체 패키지 제조용 리드프레임 구조를 제공하고자 한 것이다.That is, the present invention forms a pair of bridge ends at the rear to reinforce the strength of the inner lead, can greatly improve the yield of wire bonding, and also improve the corner lead to a structure excluding the third connecting bar, An object of the present invention is to provide a leadframe structure for manufacturing a semiconductor package, which can easily prevent a phenomenon in which corner leads are broken.

반도체 패키지, 리드프레임, 인너리드, 아우터 리드, 브릿지단, 코너쪽 리드 Semiconductor package, leadframe, inner lead, outer lead, bridge end, corner lead

Description

반도체 패키지 제조용 리드프레임 구조{Leadframe structure for manufacturing semiconductor package}Leadframe structure for manufacturing semiconductor package

도 1은 본 발명에 따른 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 저면도,1 is a lead frame for manufacturing a semiconductor package according to the present invention.

도 2는 본 발명에 따른 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 평면도,Figure 2 is a lead frame for manufacturing a semiconductor package according to the present invention, a plan view showing an enlarged lead portion,

도 3은 본 발명에 따른 반도체 패키지 제조용 리드프레임으로서, 코너쪽 리드 부분을 확대하여 나타낸 저면도,Figure 3 is a lead frame for manufacturing a semiconductor package according to the present invention, a bottom view showing an enlarged corner portion,

도 4는 기존의 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 저면도,Figure 4 is a conventional lead frame for manufacturing a semiconductor package, a bottom view showing an enlarged lead portion,

도 5는 기존의 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 평면도,5 is a conventional lead frame for manufacturing a semiconductor package, a plan view showing an enlarged lead portion;

도 6은 기존의 반도체 패키지 제조용 리드프레임으로서, 코너쪽 리드 부분을 확대하여 나타낸 저면도,6 is a conventional lead frame for manufacturing a semiconductor package, a bottom view showing an enlarged corner portion;

도 7은 기존의 리드프레임을 이용하여 반도체 패키지를 제조할 때 발생되는 단점을 보여주는 현미경 사진,7 is a micrograph showing the disadvantages generated when manufacturing a semiconductor package using a conventional lead frame,

도 8은 본 발명이 적용되는 반도체 패키지를 보여주는 단면도,8 is a cross-sectional view showing a semiconductor package to which the present invention is applied;

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

10 : 리드프레임 12 : 인너리드10: lead frame 12: inner lead

14,14' : 아우터리드 16 : 제1커넥팅 바14,14 ': External 16: First connecting bar

18 : 제2커넥팅 바 20 : 코너쪽 리드18: 2nd connecting bar 20: Corner side lead

22 : 제3커넥팅 바 24 : 칩 탑재판22: third connecting bar 24: chip mounting plate

26 : 몰딩 컴파운드 수지 28 : 브릿지단26: molding compound resin 28: bridge end

30a,30b : 관통홀 32 : 반도체 칩30a, 30b: Through hole 32: Semiconductor chip

34 : 와이어 100 : 반도체 패키지34: wire 100: semiconductor package

본 발명은 반도체 패키지 제조용 리드프레임 구조에 관한 것으로서, 더욱 상세하게는 기존의 리드프레임 구조를 새롭게 개선하여, 와이어 본딩시 스티치 리프트 및 스티치 깨짐 현상과, 와이어 본딩이 이루어지는 리드프레임의 리드가 소잉시 발생되는 열에 의하여 손상되는 현상과, 소잉시 코너쪽 리드가 깨지는 현상 등을 용이하게 방지할 수 있도록 한 반도체 패키지 제조용 리드프레임 구조에 관한 것이다.The present invention relates to a lead frame structure for manufacturing a semiconductor package, and more particularly, to newly improve the existing lead frame structure, the stitch lift and stitch cracking phenomenon during wire bonding, and the lead frame lead wire is made during sawing. The present invention relates to a lead frame structure for manufacturing a semiconductor package, which can easily prevent a phenomenon of being damaged by heat, and a phenomenon in which a corner lead is broken during sawing.

일반적으로, 리드프레임은 반도체 패키지를 제조하기 위한 기판의 일종으로 서, 골격을 이루는 사이드프레임과, 반도체 칩이 실장되는 칩탑재판과, 상기 사이드프레임과 칩탑재판을 일체로 연결하는 타이바와, 상기 사이드프레임으로부터 상기 칩탑재판의 사방 모서리에 인접되게 연장된 다수의 리드가 구성되어 있으며, 이러한 기본적인 구성을 바탕으로 리드프레임은 여러가지 형태 및 크기로 달리 제작되고 있다.In general, the lead frame is a kind of substrate for manufacturing a semiconductor package, and includes a side frame forming a skeleton, a chip mounting plate on which a semiconductor chip is mounted, a tie bar integrally connecting the side frame and a chip mounting plate, A plurality of leads extending from the side frame adjacent to the four corners of the chip mounting plate is configured. Based on this basic configuration, the lead frame is manufactured in various shapes and sizes.

반도체 패키지에 대한 제조 기술의 발전과 함께 최근에는 칩의 크기에 가까운 패키지를 제조하기 위하여 리드프레임의 구조 또한 매우 얇고 작게 제작되고 있며, 대부분 단위 생산성을 향상시키기 위하여 다수의 반도체 패키지 영역이 한꺼번에 매트릭스 배열을 이루도록 제작되고 있으며, 이렇게 제작된 리드프레임중 하나를 소위 "마이크로 리드프레임"이라 한다.In recent years, with the development of manufacturing technology for semiconductor packages, the structure of the leadframe is also very thin and small to manufacture packages close to the chip size, and in order to improve unit productivity, many semiconductor package regions are arranged in a matrix at a time. It is manufactured to achieve this, one of the produced lead frame is called a "micro lead frame".

마이크로 리드프레임을 이용한 반도체 패키지의 구조 및 그 제조 방법을 간략히 살펴보면 다음과 같다.The structure of a semiconductor package using a micro lead frame and a manufacturing method thereof will be briefly described as follows.

상기 마이크로 리드프레임의 칩탑재판(24)에 반도체 칩(32)을 부착하는 칩 부착 단계와; 상기 반도체 칩(32)의 본딩패드와 인너리드(12) 그리고 본딩패드와 아우터리드(14)간을 골드 와이어(34)로 연결하는 와이어 본딩 단계와; 상기 칩(32)과 와이어(34) 등을 몰딩 컴파운드 수지(26)로 몰딩하되, 상기 칩탑재판(24)의 저면과 상기 각 리드(12,14)의 저면(하프에칭 되지 않은 면)이 외부로 노출되도록 진행되는 몰딩 단계와; 개개의 반도체 패키지가 되도록 싱귤레이션하는 단계 등을 통하여 첨부한 도 8에 도시된 구조의 반도체 패키지(100)로 제조된다.A chip attaching step of attaching a semiconductor chip (32) to the chip mounting plate (24) of the micro lead frame; A wire bonding step of connecting a bonding pad and an inner lead of the semiconductor chip 32 and a bonding pad and an outer lead 14 with a gold wire 34; The chip 32 and the wire 34 and the like are molded with a molding compound resin 26, wherein the bottom surface of the chip mounting plate 24 and the bottom surface (not half-etched) of the leads 12 and 14 are formed. A molding step of proceeding to be exposed to the outside; The semiconductor package 100 having the structure shown in FIG. 8 is manufactured by singulating the individual semiconductor packages.

도 8에서 보는 바와 같이, 마이크로 리드프레임을 이용하여 제조된 반도체 패키지의 구조적 특징은 칩 크기에 가깝게 경박단소화로 제조된 점, 단자 역할을 하는 인너 및 아우터 리드의 저면 그리고 칩탑재판의 저면이 열방출 효과를 얻기 위하여 외부로 노출된 점에 있다.As shown in FIG. 8, the structural characteristics of the semiconductor package manufactured using the micro lead frame are characterized by the fact that the thin and small size is made close to the chip size, the bottom of the inner and outer leads serving as terminals, and the bottom of the chip mounting plate. It is at the point of being exposed to the outside to obtain the heat emission effect.

여기서, 기존의 마이크로 리드프레임의 구조를 보다 상세하게 살펴보면 다음과 같다.Here, the structure of the conventional micro lead frame will be described in more detail.

첨부한 도 4는 기존의 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 저면도이고, 도 5는 리드 부분을 확대하여 나타낸 평면도로서 와이어 본딩이 이루어진 상태를 나타낸다.4 is a bottom view showing an enlarged lead portion as a lead frame for manufacturing a conventional semiconductor package, and FIG. 5 is a plan view showing an enlarged lead portion, showing a state in which wire bonding is performed.

상기 리드프레임(10)은 다수의 반도체 패키지 영역이 매트릭스 배열을 이루는 구조로서, 인너리드(12)와 아웃터 리드(14)가 제1커넥팅 바(16)에 의하여 일체로 연결되면서 서로 엇갈림 배열로 되어 있고, 각 아웃터 리드(14)의 후단은 인접하는 반도체 패키지 영역의 아웃터 리드(14')의 후단과 제2커넥팅 바(18)에 의하여 서로 연결되어 있다.The lead frame 10 has a structure in which a plurality of semiconductor package regions form a matrix array, and the inner lead 12 and the outer lead 14 are integrally connected to each other by the first connecting bar 16, and are arranged in a staggered arrangement. The rear ends of the outer leads 14 are connected to each other by the second ends of the outer leads 14 'of the adjacent semiconductor package region and the second connecting bars 18.

이때, 상기 각 아웃터 리드(14)의 사이는 빈공간의 관통홀(30a)로 형성된다.At this time, the outer lead 14 is formed between the through-hole 30a of the empty space.

이에, 후공정에서 상기 인너리드(12)와 아우터 리드(14)가 독립적으로 분리되도록 상기 제1커넥팅 바(16)가 그 소잉라인(도 4의 일점쇄선)을 따라 커팅이 이루어지고, 또한 매트릭스 배열의 반도체 패키지가 개개의 반도체 패키지로 분리되도록 상기 제2커넥팅 바(18)가 그 싱귤레이션 라인(도 4의 점선)을 따라 절단이 이루어진다.Accordingly, the first connecting bar 16 is cut along the sawing line (one dashed line in FIG. 4) so that the inner lead 12 and the outer lead 14 are separated in a later step, and the matrix The second connecting bar 18 is cut along its singulation line (dotted line in FIG. 4) such that the array of semiconductor packages is separated into individual semiconductor packages.

위와 같은 기존의 리드프레임의 리드 구조는 다음과 같은 문제점을 초래하고 있다.The lead structure of the conventional lead frame as described above causes the following problems.

인너리드 및 아우터리드는 제1커넥팅 바에 의하여 일체로 연결되어 긴 길이로 형성되어 있기 때문에 강도면에서 취약하여, 와이어 본딩 공정의 스티치 본딩(리드에 이루어지는 와이어가 본딩되는 것)시의 진동(vibration)에 의하여 첨부한 도 7의 (a)에 나타낸 현미경 사진에서 보는 바와 같이 스티치 리프트(stitch lift : 마치 들뜨는 현상)가 발생하는 문제점이 있고, 이러한 문제점을 감안하여 패러미터(parameter: 본딩 위치의 변경 등)를 바꾸게 되면 첨부한 도 7의 (b)에 나타낸 현미경 사진에서 보는 바와 같이 스티치 깨짐(stitch broke) 현상이 발생되는 문제점이 있었다.Inner leads and outer leads are integrally connected by the first connecting bar and are formed in a long length, and thus are weak in strength, and thus vibration during stitch bonding (wire bonding of leads) in the wire bonding process. As shown in the attached micrograph shown in FIG. 7 (a), there is a problem that a stitch lift occurs, and in view of such a problem, a parameter (change of a bonding position, etc.) When changing to, as shown in the attached micrograph shown in FIG. 7 (b), there was a problem in which a stitch broke phenomenon occurred.

또한, 최종 공정인 싱귤레이션 공정시, 고속으로 작동하는 소잉용 툴이 상기 제1커넥팅 바의 소잉라인(도 4의 일점쇄선)을 지나가게 될 때, 진동과 함께 고온의 열이 발생되고, 이 고온의 열이 인접하는 인너리드의 노출면(패키지의 제조후, 패키지의 저면으로 노출되는 단자면)으로 전달되어, 첨부한 도 7의 (c)에 나타낸 현미경 사진에서 보는 바와 같이 리드의 노출면에 도금된 도금층이 녹아 버리는 멜팅(meting)현상이 발생되는 문제점이 있었다.In addition, during the singulation process, which is the final process, when the sawing tool operating at a high speed passes the sawing line (dotted line in FIG. 4) of the first connecting bar, high temperature heat is generated along with vibration. The high temperature heat is transferred to the exposed surface of the adjacent inner lead (terminal surface exposed to the bottom surface of the package after manufacture of the package), and the exposed surface of the lid as shown in the attached micrograph shown in FIG. There was a problem in that the melting phenomenon (melting) phenomenon that the plated layer is melted on.

여기서, 기존의 리드프레임의 코너쪽 리드 구조를 살펴보면 다음과 같다.Here, look at the lead structure of the corner of the conventional lead frame as follows.

첨부한 도 6은 기존의 반도체 패키지 제조용 리드프레임으로서, 코너쪽 리드 부분을 확대하여 나타낸 저면도이다.6 is a bottom view illustrating an enlarged corner portion of a lead frame for manufacturing a conventional semiconductor package.

코너쪽 리드(20)는 매트릭스 배열을 이루는 각 반도체 패키지 영역의 모서리에 형성된 부분으로서, 각 반도체 패키지 영역의 코너쪽 리드(20)는 제3커넥팅 바 (22)에 의하여 서로 일체로 연결된 상태를 이룬다.The corner leads 20 are formed at the corners of the semiconductor package regions forming the matrix array, and the corner leads 20 of each semiconductor package region are integrally connected to each other by the third connecting bar 22. .

즉, 각 반도체 패키지 영역의 모서리에 위치하는 각 코너쪽 리드(20)가 제3커넥팅 바(22)에 의하여 서로 일체로 연결되어, 마치 사각고리 형상을 이루고 있다.That is, the corner leads 20 positioned at the corners of each semiconductor package region are integrally connected to each other by the third connecting bar 22 to form a rectangular ring shape.

이때, 첨부한 도 6에서 점선은 싱귤레이션 라인을 나타낸다.In this case, a dotted line in FIG. 6 represents a singulation line.

따라서, 개개의 반도체 패키지로 분리되도록 싱귤레이션 툴과 싱귤레이션 라인을 따라 고속으로 지나갈 때, 제3커넥팅 바가 절단되면서 그 진동 충격이 상기 코너쪽 리드로 전달되는 동시에 고온의 열이 전달되어, 첨부한 도 7의 (d)에 나타낸 현미경 사진에서 보는 바와 같이 코너쪽 리드가 파손(깨짐)되는 문제점이 있었다.Thus, when passing along the singulation tool and the singulation line at high speed to be separated into individual semiconductor packages, the third connecting bar is cut and its vibratory shock is transmitted to the corner lead and at the same time high temperature heat is transferred. As shown in the micrograph shown in Fig. 7D, there was a problem in that the corner lead was broken (broken).

본 발명은 상기과 같은 문제점을 감안하여 연구 개발된 것으로서, 인너리드의 강도를 보강하고자 그 후부에 한 쌍의 브릿지단을 형성하여, 와이어 본딩의 수율을 크게 향상시킬 수 있고, 또한 코너쪽 리드를 싱귤레이션 툴과 접촉되지 않는 구조로 개선하여, 코너쪽 리드가 파손되는 현상을 용이하게 방지할 수 있도록 한 반도체 패키지 제조용 리드프레임 구조를 제공하는데 그 목적이 있다.The present invention has been researched and developed in view of the above problems, and in order to reinforce the strength of the inner lead, a pair of bridge ends are formed at the rear thereof, and thus the yield of wire bonding can be greatly improved, and the corner leads are singled. It is an object of the present invention to provide a leadframe structure for manufacturing a semiconductor package, which is improved to a structure that does not come into contact with a migration tool, so that a corner lead can be easily prevented from being broken.

상기한 목적을 달성하기 위한 본 발명의 일구현예는 인너리드와 아우터 리드 가 서로 엇갈림 배열을 이루면서 제1커넥팅 바에 의하여 서로 일체로 연결된 반도체 패키지 제조용 리드프레임 구조에 있어서, 상기 인너리드의 강도 보강을 위하여 인너리드와 제1커넥팅 바를 한 쌍의 브릿지단으로 연결하여서 된 것을 특징으로 반도체 패키지 제조용 리드프레임 구조를 제공한다.One embodiment of the present invention for achieving the above object is in the lead frame structure for manufacturing a semiconductor package connected to each other by the first connecting bar while the inner lead and the outer lead are staggered arrangement, the strength reinforcement of the inner lead In order to provide a lead frame structure for manufacturing a semiconductor package, the inner lead and the first connecting bar are connected by a pair of bridge ends.

바람직한 구현예로서, 상기 한 쌍의 브릿지단의 전단은 인너리드의 후단부 양측면에 일체로 연결되고, 후단은 상기 제1커넥팅 바의 전단에 일체로 연결되어, 상기 한 쌍의 브릿지단의 내측면과 상기 인너리드의 후단과 상기 제1커넥팅 바의 전단 사이는 중공의 관통홀로 형성되는 것을 특징으로 한다.In a preferred embodiment, the front end of the pair of bridge ends are integrally connected to both sides of the rear end of the inner lead, the rear end is integrally connected to the front end of the first connecting bar, the inner surface of the pair of bridge ends And between the rear end of the inner lead and the front end of the first connecting bar are hollow through-holes.

상기한 목적을 달성하기 위한 본 발명의 다른 구현예는 다수의 반도체 패키지 영역이 매트릭스 배열을 이루며, 각 반도체 패키지 영역의 각 모서리에 코너쪽 리드가 형성된 반도체 패키지 제조용 리드프레임 구조에 있어서, 서로 일체로 연결된 상기 리드프레임의 각 반도체 패키지 영역의 코너쪽 리드를 서로 독립적으로 분리 형성하여, 분리된 코너쪽 리드가 싱귤레이션 툴과 접촉되지 않는 싱귤레이션 라인의 안쪽 영역에 위치되도록 한 것을 특징으로 한다.Another embodiment of the present invention for achieving the above object is a semiconductor package manufacturing leadframe structure in which a plurality of semiconductor package regions form a matrix array, corner leads are formed at each corner of each semiconductor package region, integrally with each other The corner leads of each semiconductor package region of the lead frames connected to each other are independently formed so that the separated corner leads are positioned in the inner region of the singulation line that is not in contact with the singulation tool.

이하, 본 발명의 바람직한 실시예를 첨부도면을 참조로 상세하게 설명한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

첨부한 도 1은 본 발명에 따른 반도체 패키지 제조용 리드프레임으로서, 리드 부분을 확대하여 나타낸 저면도이고, 도 2는 와이어 본딩이 이루어진 상태의 평면도이다.1 is a bottom view showing an enlarged lead portion as a lead frame for manufacturing a semiconductor package according to the present invention, and FIG. 2 is a plan view of a wire bonding state.

전술한 바와 같이, 상기 리드프레임(10)은 다수의 반도체 패키지 영역이 설계에 따라 4×4 또는 5×5 등의 매트릭스 배열을 이루는 구조로서, 인너리드(12)와 아웃터 리드(14)가 제1커넥팅 바(16)에 의하여 일체로 연결되면서 서로 엇갈림 배열로 되어 있고, 각 아웃터 리드(14)의 후단은 인접하는 다른 반도체 패키지 영역의 아웃터 리드(14')의 후단과 제2커넥팅 바(18)에 의하여 서로 연결되어 있다.As described above, the lead frame 10 has a structure in which a plurality of semiconductor package regions form a matrix arrangement such as 4 × 4 or 5 × 5 according to a design, and the inner lead 12 and the outer lead 14 may be formed. It is integrally connected by one connecting bar 16 and is arranged in a staggered arrangement with each other. The rear ends of each of the outer leads 14 are connected to the rear ends of the outer leads 14 'of the other semiconductor package areas adjacent to each other and the second connecting bars 18. Are connected to each other.

참고로, 도 1의 리드프레임에서 해칭 처리된 부분은 하프-에칭된 부분이다.For reference, the hatched portion in the lead frame of FIG. 1 is a half-etched portion.

이러한 구조의 인너리드(12) 및 아웃터 리드(14) 그리고 칩탑재판(24)은 반도체 패키지의 완성후 그 저면이 몰딩 컴파운드 수지(26)와 평행을 이루며 외부로 노출된다(도 8참조).The inner lead 12, the outer lead 14, and the chip mounting plate 24 having such a structure are exposed to the outside in parallel with the molding compound resin 26 after completion of the semiconductor package (see FIG. 8).

여기서, 본 발명에 따르면 상기 인너리드(12)와 제1커넥팅 바(16)가 서로 일체로 연결되는 지점을 한 쌍의 브릿지단(28)으로 연결하여, 각 인너리드(12)의 강도(성)를 보강하게 된다.According to the present invention, the inner lead 12 and the first connecting bar 16 are connected to each other by a pair of bridge ends 28, the strength of each inner lead 12 ).

보다 상세하게는, 상기 한 쌍의 브릿지단(28)의 전단은 인너리드(12)의 후단부 양측면에 일체로 연결되고, 후단은 상기 제1커넥팅 바(16)의 전단에 일체로 연결되어, 결국 한 쌍의 브릿지단(28)이 인너리드(12)의 양측단부를 지지하는 구조를 이루게 된다.More specifically, the front end of the pair of bridge ends 28 are integrally connected to both sides of the rear end of the inner lead 12, the rear end is integrally connected to the front end of the first connecting bar 16, As a result, a pair of bridge ends 28 forms a structure for supporting both ends of the inner lead 12.

이때, 상기 한 쌍의 브릿지단(28)의 내측면과 상기 인너리드(12)의 후단과 상기 제1커넥팅 바(16)의 전단 사이는 빈공간의 관통홀(30b)로 형성된다.At this time, the inner surface of the pair of bridge ends 28, the rear end of the inner lead 12 and the front end of the first connecting bar 16 is formed as a through-hole 30b of the empty space.

이에, 싱귤레이션 공정시 상기 인너리드(12)와 아우터 리드(14)가 독립적으로 분리되도록 상기 제1커넥팅 바(16)의 소잉라인(도 1 및 도 2의 일점점선)을 따라 커팅이 이루어진다.Accordingly, the cutting is performed along a sawing line (one dotted line in FIGS. 1 and 2) of the first connecting bar 16 so that the inner lead 12 and the outer lead 14 are independently separated during the singulation process. .

보다 상세하게는, 소잉용 툴(미도시됨)이 제1커넥팅 바(16)와 한 쌍의 브릿 지단(28)을 지나가게 되는 바, 이때 고속으로 작동하는 소잉용 툴이 지나가면서 발생된 고온의 열이 한 쌍의 브릿지단(28)에 의하여 분산되어 인너리드(12)쪽으로 잘 전달되지 않게 되어, 열에 의한 인너리드(12)의 도금층이 녹는 현상을 방지할 수 있다.More specifically, the sawing tool (not shown) passes through the first connecting bar 16 and the pair of bridging edges 28, wherein the high temperature generated as the sawing tool operating at high speed passes. Heat is dispersed by the pair of bridge ends 28, so that it is difficult to transfer to the inner lead 12, thereby preventing the plating layer of the inner lead 12 from melting.

즉, 기존에는 인너리드(12)와 제1커넥팅 바(16)가 서로 일체로 연결되는 단면적이 크지만, 본 발명은 한 쌍의 브릿지단(28)에 의하여 인너리드(12)와 제1커넥팅 바(16)의 연결 단면적이 감소된 상태이므로, 소잉용 툴이 지나가면서 발생된 고온의 열이 한 쌍의 브릿지단(28)에 의하여 분산되어 인너리드(12)쪽으로 잘 전달되지 않게 되는 것이다.That is, although the cross-sectional area where the inner lead 12 and the first connecting bar 16 are integrally connected to each other is large, the present invention uses the pair of bridge ends 28 to connect the inner lead 12 and the first connecting portion. Since the connection cross-sectional area of the bar 16 is reduced, the hot heat generated as the sawing tool passes by is dissipated by the pair of bridge ends 28 so as not to be transferred to the inner lead 12 well.

또한, 상기 한 쌍의 브릿지단(28)에 의하여 인너리드(12)는 제1커넥팅 바(16)에 견고하게 지지 고정된 상태이므로, 기존의 스티치 리프트 또는 스티치 깨짐 현상없이 인너리드에 대한 와이어 본딩 공정의 스티치 본딩이 용이하게 이루어지게 된다.In addition, since the inner lead 12 is firmly supported and fixed to the first connecting bar 16 by the pair of bridge ends 28, wire bonding to the inner lead is performed without conventional stitch lift or stitch cracking. Stitch bonding of the process is made easy.

이하, 본 발명의 다른 실시예를 설명하면 다음과 같다.Hereinafter, another embodiment of the present invention will be described.

첨부한 도 3은 본 발명에 따른 반도체 패키지 제조용 리드프레임으로서, 코너쪽 리드 부분을 확대하여 나타낸 저면도이다.3 is a bottom view of the lead frame for manufacturing a semiconductor package according to the present invention, with an enlarged corner lead portion.

전술한 바와 같이, 상기 리드프레임 즉, 마이크로 리드프레임은 다수의 반도체 패키지 영역이 매트릭스 배열을 이루며, 각 반도체 패키지 영역의 각 모서리에는 코너쪽 리드(20)가 형성되어 있다.As described above, in the lead frame, that is, the micro lead frame, a plurality of semiconductor package regions form a matrix array, and corner leads 20 are formed at each corner of each semiconductor package region.

기존에는 상기 코너쪽 리드(20)가 제3커넥팅 바(22)에 의하여 서로 일체로 연결되는 바, 싱귤레이션 툴(미도시됨)이 제3커넥팅 바(22)를 절단하면서 지나가는 충격으로 인해 코너쪽 리드(20)가 파손되는 문제점이 있었다.Conventionally, the corner lead 20 is integrally connected to each other by a third connecting bar 22, and a corner caused by a shock passing while a singulation tool (not shown) cuts the third connecting bar 22. There was a problem that the side lead 20 is broken.

이에, 본 발명은 서로 일체로 연결된 각 반도체 패키지 영역의 코너쪽 리드(20)를 서로 독립적으로 분리 형성하여, 싱귤레이션 공정시 분리된 각 코너쪽 리드(20)가 싱귤레이션 툴과 접촉되지 않도록 한다.Thus, the present invention separates the corner leads 20 of each semiconductor package region integrally connected to each other independently so that each corner lead 20 separated during the singulation process does not come into contact with the singulation tool. .

즉, 각 반도체 패키지 영역의 코너쪽 리드(20)가 서로 독립적으로 분리되어 싱귤레이션 라인(도 3의 점선)의 안쪽 영역에 위치되도록 함으로써, 싱귤레이션 툴과 접촉되지 않게 된다.That is, the corner leads 20 of the respective semiconductor package regions are separated from each other independently so as to be located in the inner region of the singulation line (dotted line in FIG. 3), so that they do not come into contact with the singulation tool.

따라서, 싱귤레이션 공정시 싱귤레이션 툴과 접촉되지 않는 상태가 되는 코너쪽 리드의 파손을 방지할 수 있게 되고, 결과적으로 싱귤레이션 작업의 속도를 향상시킬 수 있다.Therefore, it is possible to prevent the breakage of the corner lead that is not in contact with the singulation tool during the singulation process, and consequently to speed up the singulation operation.

이상에서 본 바와 같이, 본 발명에 따른 반도체 패키지 제조용 리드프레임 구조에 의하면, 인너리드의 강도를 보강하고자 그 후부에 한 쌍의 브릿지단을 형성함으로써, 와이어 본딩시 스티치 리프트 및 스티치 깨짐 현상과, 와이어 본딩이 이루어지는 리드프레임의 리드가 소잉시 발생되는 열에 의하여 손상되는 현상을 용이하게 방지하여 와이어 본딩의 수율을 크게 향상시킬 수 있다.As described above, according to the lead frame structure for manufacturing a semiconductor package according to the present invention, a pair of bridge ends are formed on the rear side to reinforce the strength of the inner lead, so that the stitch lift and stitch cracking phenomenon during wire bonding, and the wire The lead of the lead frame in which the bonding is performed is easily prevented from being damaged by heat generated when sawing, thereby greatly improving the yield of wire bonding.

또한, 리드프레임의 각 반도체 패키지 영역에서 코너쪽 리드를 싱귤레이션 툴과 접촉되지 않는 구조로 개선하여, 코너쪽 리드가 파손되는 현상을 용이하게 방 지할 수 있다.In addition, the corner leads in each semiconductor package region of the lead frame can be improved to a structure that does not come into contact with the singulation tool, thereby easily preventing the corner leads from being broken.

Claims (3)

인너리드와 아우터 리드가 서로 엇갈림 배열을 이루면서 제1커넥팅 바에 의하여 서로 일체로 연결된 반도체 패키지 제조용 리드프레임 구조에 있어서, In the lead frame structure for manufacturing a semiconductor package in which the inner lead and the outer lead are staggered and connected integrally with each other by a first connecting bar, 상기 인너리드의 강도 보강을 위하여 인너리드와 제1커넥팅 바를 한 쌍의 브릿지단으로 연결하여서 된 것을 특징으로 반도체 패키지 제조용 리드프레임 구조.Lead frame structure for manufacturing a semiconductor package, characterized in that by connecting the inner lead and the first connecting bar in a pair of bridge ends to strengthen the strength of the inner lead. 청구항 1에 있어서, 상기 한 쌍의 브릿지단의 전단은 인너리드의 후단부 양측면에 일체로 연결되고, 후단은 상기 제1커넥팅 바의 전단에 일체로 연결되어, 상기 한 쌍의 브릿지단의 내측면과 상기 인너리드의 후단과 상기 제1커넥팅 바의 전단 사이는 중공의 관통홀로 형성되는 것을 특징으로 하는 반도체 패키지 제조용 리드프레임 구조.The method of claim 1, wherein the front end of the pair of bridge ends are integrally connected to both sides of the rear end of the inner lead, the rear end is integrally connected to the front end of the first connecting bar, the inner surface of the pair of bridge ends And a hollow through hole formed between the rear end of the inner lead and the front end of the first connecting bar. 다수의 반도체 패키지 영역이 매트릭스 배열을 이루며, 각 반도체 패키지 영역의 각 모서리에 코너쪽 리드가 형성된 반도체 패키지 제조용 리드프레임 구조에 있어서, In a semiconductor package manufacturing leadframe structure in which a plurality of semiconductor package regions form a matrix array and corner leads are formed at each corner of each semiconductor package region. 서로 일체로 연결된 상기 리드프레임의 각 반도체 패키지 영역의 코너쪽 리드를 서로 독립적으로 분리 형성하여, 분리된 코너쪽 리드가 싱귤레이션 툴과 접촉 되지 않는 싱귤레이션 라인의 안쪽 영역에 위치되도록 한 것을 특징으로 하는 반도체 패키지 제조용 리드프레임 구조.A corner lead of each semiconductor package region of the lead frame which is integrally connected to each other is formed independently of each other so that the separated corner lead is positioned in the inner region of the singulation line which is not in contact with the singulation tool. Lead frame structure for manufacturing a semiconductor package.
KR1020050033917A 2005-04-25 2005-04-25 Leadframe structure for manufacturing semiconductor package KR100622821B1 (en)

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