KR100620188B1 - Method for forming a bonding pad in a semiconductor device - Google Patents
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- KR100620188B1 KR100620188B1 KR1020020086348A KR20020086348A KR100620188B1 KR 100620188 B1 KR100620188 B1 KR 100620188B1 KR 1020020086348 A KR1020020086348 A KR 1020020086348A KR 20020086348 A KR20020086348 A KR 20020086348A KR 100620188 B1 KR100620188 B1 KR 100620188B1
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 14
- 229910052786 argon Inorganic materials 0.000 claims abstract description 11
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 238000002161 passivation Methods 0.000 claims abstract description 10
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000001465 metallisation Methods 0.000 claims abstract description 9
- 239000007789 gas Substances 0.000 claims abstract description 7
- 230000004888 barrier function Effects 0.000 claims abstract description 5
- 238000004140 cleaning Methods 0.000 claims abstract description 5
- 238000004380 ashing Methods 0.000 claims abstract description 4
- 238000001311 chemical methods and process Methods 0.000 claims abstract description 3
- 238000005260 corrosion Methods 0.000 abstract description 5
- 230000007797 corrosion Effects 0.000 abstract description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 229940125810 compound 20 Drugs 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- JAXFJECJQZDFJS-XHEPKHHKSA-N gtpl8555 Chemical compound OC(=O)C[C@H](N)C(=O)N[C@@H](CCC(O)=O)C(=O)N[C@@H](C(C)C)C(=O)N[C@@H](C(C)C)C(=O)N1CCC[C@@H]1C(=O)N[C@H](B1O[C@@]2(C)[C@H]3C[C@H](C3(C)C)C[C@H]2O1)CCC1=CC=C(F)C=C1 JAXFJECJQZDFJS-XHEPKHHKSA-N 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- -1 aluminum-fluorine-oxide Chemical compound 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- Manufacturing & Machinery (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
반도체 소자의 본딩패드 형성 방법을 개시한다.A method of forming a bonding pad of a semiconductor device is disclosed.
본 발명에 따른 방법은, 하부 절연막 상에 배리어 금속막, 알루미늄막, 반사 방지막으로 구성된 금속막을 형성하는 제 1 단계와; 금속막 상부에 패시베이션막을 형성한 후 패드 패턴을 형성하는 제 2 단계와; 패드 패턴을 마스크로 하여 패시베이션막을 선택 식각함으로써 패드 개구를 형성하는 제 3 단계와; 에싱 및 케미칼 공정을 수행하여 마스크 패턴을 제거하는 제 4 단계와; 메탈 증착 장비의 디가스(Degas) 챔버를 통해 열처리하여 잔류 플로린 가스를 제거하는 제 5 단계와; 아르곤 식각 또는 아르곤 세정 챔버를 통해 본딩패드의 산화물을 제거하는 제 6 단계를 포함한다.The method according to the present invention comprises a first step of forming a metal film composed of a barrier metal film, an aluminum film and an antireflection film on a lower insulating film; A second step of forming a pad pattern after forming a passivation film on the metal film; A third step of forming a pad opening by selectively etching the passivation film using the pad pattern as a mask; Performing a ashing and chemical process to remove the mask pattern; A fifth step of removing the residual florin gas by heat treatment through a degas chamber of the metal deposition apparatus; And a sixth step of removing oxide from the bonding pad through an argon etch or argon cleaning chamber.
즉, 본 발명은 일반적인 큐어링 공정 대신 메탈 증착에 사용되는 디가스 챔버에서 고온 열처리하여 잔여 플로린 가스를 제거함으로써, 본딩패드의 부식을 방지하고 프로빙 문제를 해결할 수 있다.That is, the present invention can remove corrosion of the bonding pad and solve the probing problem by removing the residual florin gas by performing a high temperature heat treatment in a degas chamber used for metal deposition instead of the general curing process.
Description
도 1a 및 도 1b는 종래의 전형적인 반도체 소자의 본딩패드 형성 방법을 설명하기 위한 공정 단면도,1A and 1B are cross-sectional views illustrating a method of forming a bonding pad of a typical semiconductor device in the related art;
도 2는 본 발명의 바람직한 실시예에 따른 반도체 소자의 본딩패드 형성 방법을 설명하기 위한 공정 단면도.2 is a cross-sectional view illustrating a method of forming a bonding pad of a semiconductor device in accordance with a preferred embodiment of the present invention.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
10 : 하부 절연막 12 : 배리어 금속막10 lower
14 : 알루미늄막 16 : 반사 방지막14 aluminum film 16: antireflection film
18 : 패시베이션막 20 : 알루미늄-플로린-옥사이드 화합물18: passivation film 20: aluminum-florin-oxide compound
본 발명은 반도체 소자 제조 방법에 관한 것으로, 특히, 본딩패드(bonding pad)의 부식을 방지하는데 적합한 반도체 소자의 본딩패드 형성 방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a bonding pad of a semiconductor device suitable for preventing corrosion of a bonding pad.
반도체 소자는 그 내부에 여러 가지 기능을 갖는 회로를 포함하는데, 이러한 회로는 외부의 전기적 시스템과 연결되어야 반도체로서의 기능을 수행하게 된다.The semiconductor device includes circuits having various functions therein, which must be connected to an external electrical system to function as a semiconductor.
이와 같이, 내부의 여러 회로를 외부의 전기적 시스템과 연결시키기 위해서는 다수의 본딩패드를 형성하여야 한다. 즉, 본딩패드에 도전성 와이어를 연결시킴으로써 외부와 반도체간의 상호 데이터 교환이 가능한 것이다.As such, a plurality of bonding pads must be formed in order to connect various internal circuits with external electrical systems. That is, by connecting a conductive wire to the bonding pad, data exchange between the outside and the semiconductor is possible.
한편, 반도체 금속 라인을 형성하기 위해서 알루미늄에 미량의 구리를 함유시킨 금속 재료를 대부분 사용하고 있다.On the other hand, in order to form a semiconductor metal line, most metal materials which contained a trace amount of copper in aluminum are used.
본딩패드는 최상위 금속 배선을 노출시킴으로써 외부와 연결되는데, 도 1a 및 도 1b는 종래의 전형적인 본딩패드 형성 과정을 설명하기 위한 도면이다.The bonding pads are connected to the outside by exposing the topmost metal wires, and FIGS. 1A and 1B are views for explaining a conventional bonding pad forming process.
먼저, 도 1a에 도시한 바와 같이, 하부 절연막(10) 상에 배리어 금속막(12), 알루미늄막(14), 반사 방지막(16)으로 구성된 금속막을 형성하고, 그 상부에 패시베이션막(18)을 형성한다.First, as shown in FIG. 1A, a metal film composed of the
그후, 포토 공정 및 식각 공정을 통해 본딩패드의 개구를 형성한다. 경우에 따라서는 패시베이션막(18) 상에 폴리이미드층을 덥고 폴리이미드층을 마스크로 사용하여 본딩패드의 개구를 형성하기도 한다.Thereafter, an opening of the bonding pad is formed through a photo process and an etching process. In some cases, the opening of the bonding pad may be formed by using a polyimide layer on the
이러한 본딩패드의 개구 형성시 일반적으로 건식 식각 공정을 사용하는데, 식각 가스로 플로린(F)이 함유된 가스를 사용할 경우 노출된 알루미늄막(14) 상에 플로린이 잔류하게 된다.In the formation of the opening of the bonding pad, a dry etching process is generally used. When using a gas containing florin (F) as an etching gas, florin remains on the exposed
잔류된 플로린을 제거하기 위해서는 후속 공정으로서 통상 큐어링(curing) 공정을 실시한다. 이러한 큐어링 공정에 수행되는 큐어링 장비는 대부분 배치(batch) 타입으로서 고온(300 내지 350℃)에서 장시간(30분 내지 1시간) 구동 되곤 한다.In order to remove the residual florin, a subsequent curing process is usually performed. Most of the curing equipment performed in this curing process is a batch type and is often driven for a long time (30 minutes to 1 hour) at a high temperature (300 to 350 ° C).
이때, 큐어링 공정에서 플로린이 완전히 제거되지 못하는 경우가 발생할 수 있는데, 이러한 경우, 도 1b에 도시한 바와 같은 알루미늄-플로린-옥사이드 계열의 화합물(20)이 알루미늄막(14) 상에 두껍게 생성됨을 알 수 있다.In this case, the fluorine may not be completely removed during the curing process. In this case, the aluminum-fluorine-oxide-based
이러한 화합물(20)은 후속되는 프로빙 공정시 탐침(probe)이 화합물을 뚫지 못하는 문제로 발전하게 된다. 특히, 배치 타입의 큐어링 장비를 사용하는 경우에는 챔버 내부의 온도 불균일성에 의해 웨어퍼간의 편차가 더욱 심하게 된다.
또한, 본딩패드를 형성하기 위하여 건식 식각 이후 화학물질 투입시 알루미늄 내부의 구리성분이 미세하게 응집되는데, 고온 공정에서 장시간 큐어링을 실시할 경우 구리의 응집을 가속화시켜 소위 '갈바닉' 부식을 야기시키게 된다.In addition, in order to form a bonding pad, the copper component inside the aluminum is finely agglomerated when the chemical is added after the dry etching. If the curing is performed for a long time in a high temperature process, the copper is accelerated to cause the galvanic corrosion. do.
본 발명은 상술한 문제를 해결하기 위해 안출한 것으로, 일반적인 큐어링 공정 대신 메탈 증착에 사용되는 디가스(Degas) 챔버에서 고온 열처리하여 잔여 플로린 가스를 제거함으로써, 본딩패드의 부식을 방지하고 프로빙 문제를 해결하도록 한 반도체 소자의 본딩패드 형성 방법을 제공하는데 그 목적이 있다.The present invention has been made to solve the above-described problems, and by removing the residual florin gas by high-temperature heat treatment in the Degas chamber used for metal deposition instead of the general curing process, to prevent corrosion of the bonding pads and probing problems It is an object of the present invention to provide a method for forming a bonding pad of a semiconductor device.
이러한 목적을 달성하기 위한 본 발명의 바람직한 실시예에 따르면, 하부 절연막 상에 배리어 금속막, 알루미늄막, 반사 방지막으로 구성된 금속막을 형성하는 제 1 단계와; 금속막 상부에 패시베이션막을 형성한 후 패드 패턴을 형성하는 제 2 단계와; 패드 패턴을 마스크로 하여 패시베이션막을 선택 식각함으로써 패드 개구를 형성하는 제 3 단계와; 에싱 및 케미칼 공정을 수행하여 마스크 패턴을 제거하 는 제 4 단계와; 메탈 증착 장비의 디가스 챔버를 통해 열처리하여 잔류 플로린 가스를 제거하는 제 5 단계와; 아르곤 식각 또는 아르곤 세정 챔버를 통해 본딩패드의 산화물을 제거하는 제 6 단계를 포함하는 반도체 소자의 본딩패드 형성 방법을 제공한다.According to a preferred embodiment of the present invention for achieving the above object, a first step of forming a metal film consisting of a barrier metal film, an aluminum film, an antireflection film on the lower insulating film; A second step of forming a pad pattern after forming a passivation film on the metal film; A third step of forming a pad opening by selectively etching the passivation film using the pad pattern as a mask; A fourth step of removing the mask pattern by performing an ashing and chemical process; A fifth step of removing the residual florin gas by heat treatment through the degas chamber of the metal deposition apparatus; Provided is a method of forming a bonding pad for a semiconductor device, the method including a sixth step of removing oxide of the bonding pad through an argon etching or argon cleaning chamber.
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예에 대하여 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.
도 2는 본 발명의 바람직한 실시예에 따른 반도체 소자의 본딩패드 형성 방법을 설명하기 위한 공정 단면도이다.2 is a cross-sectional view illustrating a method of forming a bonding pad of a semiconductor device in accordance with an embodiment of the present invention.
먼저, 본 실시예는 일반적인 본딩패드 형성 공정 이후 수행되는 큐어링 공정 대신에 메탈 증착에 사용되는 디가스 챔버 및 아르곤 스퍼터링을 이용하는 세정 챔버를 이용한다는 것에 그 특징이 있는 바, 본 특징을 제외하고 동일하거나 중복되는 공정 과정은 설명을 생략하기로 한다.First, the present embodiment is characterized in that it uses a degas chamber used for metal deposition and a cleaning chamber using argon sputtering instead of the curing process performed after the general bonding pad forming process. Or redundant process steps will be omitted.
도 2에 도시한 바와 같이, 패시베이션막(18)을 선택적으로 식각하고, 에싱 및 잔류 포토레지스트의 제거를 위한 화학적 처리 후, 메탈 증착 장비의 디가스 챔버를 이용하여 열처리하는 공정을 수행한다.As shown in FIG. 2, the
이때, 이러한 열처리 공정은, 바람직하게는 150 내지 400℃의 온도로 150초 내지 600초 이내에서 수행된다.At this time, the heat treatment process is preferably performed within 150 seconds to 600 seconds at a temperature of 150 to 400 ℃.
그리고, 이러한 열처리 공정 수행 후, 메탈 증착 장비의 아르곤 식각 또는 아르곤 세정 챔버를 이용하여 아르곤 스퍼터링 공정을 수행함으로써, 본딩패드의 산화물(20)을 제거한다.After the heat treatment is performed, the
이상 설명한 바와 같이, 본 발명은 일반적인 큐어링 공정 대신에 싱글 웨이퍼 공정이 가능한 메탈 증착 장비의 디가스 챔버를 이용한 고온 열처리 공정과 아르곤 식각 챔버를 이용하여 산화막을 제거함으로써 본딩패드의 부식을 방지하고 프로빙 문제를 해결할 수 있다.As described above, the present invention is a high temperature heat treatment process using the degas chamber of the metal deposition equipment capable of a single wafer process instead of the general curing process and the oxide film is removed using the argon etching chamber to prevent corrosion and bonding of the bonding pads You can solve the problem.
이상, 본 발명을 실시예에 근거하여 구체적으로 설명하였지만, 본 발명은 이러한 실시예에 한정되는 것이 아니라, 그 요지를 벗어나지 않는 범위내에서 여러 가지 변형이 가능한 것은 물론이다.As mentioned above, although this invention was concretely demonstrated based on the Example, this invention is not limited to this Example, Of course, various changes are possible within the range which does not deviate from the summary.
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| KR1020020086348A KR100620188B1 (en) | 2002-12-30 | 2002-12-30 | Method for forming a bonding pad in a semiconductor device |
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| KR1020020086348A KR100620188B1 (en) | 2002-12-30 | 2002-12-30 | Method for forming a bonding pad in a semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105448645A (en) * | 2014-07-07 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad processing method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63293948A (en) | 1987-05-27 | 1988-11-30 | Seiko Epson Corp | Forming method for interlayer insulating film |
| JPH0758107A (en) * | 1993-08-18 | 1995-03-03 | Toshiba Corp | Manufacture of semiconductor device |
| KR970067633A (en) * | 1996-03-05 | 1997-10-13 | 김주용 | Method of forming metal wiring |
| JPH10163127A (en) | 1996-12-04 | 1998-06-19 | Shibaura Eng Works Co Ltd | Manufacture of semiconductor device |
| KR19980057018A (en) * | 1996-12-30 | 1998-09-25 | 김영환 | Metal contact formation method of semiconductor device |
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2002
- 2002-12-30 KR KR1020020086348A patent/KR100620188B1/en not_active IP Right Cessation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63293948A (en) | 1987-05-27 | 1988-11-30 | Seiko Epson Corp | Forming method for interlayer insulating film |
| JPH0758107A (en) * | 1993-08-18 | 1995-03-03 | Toshiba Corp | Manufacture of semiconductor device |
| KR970067633A (en) * | 1996-03-05 | 1997-10-13 | 김주용 | Method of forming metal wiring |
| JPH10163127A (en) | 1996-12-04 | 1998-06-19 | Shibaura Eng Works Co Ltd | Manufacture of semiconductor device |
| KR19980057018A (en) * | 1996-12-30 | 1998-09-25 | 김영환 | Metal contact formation method of semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105448645A (en) * | 2014-07-07 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad processing method |
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