KR100596883B1 - Method for forming the gate oxide of semiconductor device - Google Patents
Method for forming the gate oxide of semiconductor device Download PDFInfo
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- KR100596883B1 KR100596883B1 KR1020040110217A KR20040110217A KR100596883B1 KR 100596883 B1 KR100596883 B1 KR 100596883B1 KR 1020040110217 A KR1020040110217 A KR 1020040110217A KR 20040110217 A KR20040110217 A KR 20040110217A KR 100596883 B1 KR100596883 B1 KR 100596883B1
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 229920005591 polysilicon Polymers 0.000 claims abstract description 24
- 239000001257 hydrogen Substances 0.000 claims abstract description 17
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 17
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 13
- 150000004767 nitrides Chemical class 0.000 claims abstract description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 238000011065 in-situ storage Methods 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 5
- 238000006722 reduction reaction Methods 0.000 claims description 2
- -1 in-situ Inorganic materials 0.000 abstract description 3
- 150000002431 hydrogen Chemical class 0.000 abstract description 2
- 238000005468 ion implantation Methods 0.000 abstract description 2
- 229910052796 boron Inorganic materials 0.000 description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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- Crystallography & Structural Chemistry (AREA)
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- Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
Abstract
본 발명은 반도체 소자의 게이트 산화막 형성 방법에 관한 것으로, 실리콘 기판 상에 질소를 이온주입하여 질화막을 형성하는 단계; 상기 질화막 상에 게이트 산화막을 형성하는 단계; 상기 게이트 산화막 상에 제1 폴리 실리콘막을 증착하는 단계; 상기 제1 폴리 실리콘막을 인시튜 수소로 열처리하는 단계 및 상기 제1 폴리 실리콘막 상에 제2 폴리 실리콘막을 증착하는 단계로 이루어짐에 기술적 특징이 있고, 게이트 산화막을 형성한 후 폴리 실리콘막 증착시 인시튜 수소로 열처리를 함으로써 게이트 산화막의 손실없이 게이트 산화막의 상하부 계면에 존재하는 댕글링 본드를 수소와 결합하여 계면 특성을 향상할 수 있는 효과가 있다.The present invention relates to a method for forming a gate oxide film of a semiconductor device, comprising: forming a nitride film by ion implantation of nitrogen on a silicon substrate; Forming a gate oxide film on the nitride film; Depositing a first polysilicon film on the gate oxide film; Heat treatment of the first polysilicon film with in-situ hydrogen and depositing a second polysilicon film on the first polysilicon film. By heat treatment with the tu hydrogen, the dangling bonds present at the upper and lower interfaces of the gate oxide film can be combined with hydrogen to improve the interface characteristics without loss of the gate oxide film.
게이트 산화막, 폴리 실리콘막, 인시튜, 수소 열처리Gate oxide, polysilicon, in-situ, hydrogen heat treatment
Description
도1은 종래의 반도체 소자에서 게이트 산화막을 형성하는 방법을 나타내는 단면도이다.1 is a cross-sectional view showing a method of forming a gate oxide film in a conventional semiconductor device.
도 2a 및 도 2b는 본 발명에 따른 게이트 산화막을 형성하는 방법을 나타내는 공정 단면도이다.2A and 2B are cross-sectional views illustrating a method of forming a gate oxide film according to the present invention.
본 발명은 반도체 소자의 게이트 산화막 형성 방법에 관한 것으로, 보다 자세하게는 인시튜(insitu) 수소 열처리를 실시하여 게이트 산화막을 형성하는 반도체 소자의 게이트 산화막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a gate oxide film of a semiconductor device, and more particularly, to a method for forming a gate oxide film of a semiconductor device in which an insitu hydrogen heat treatment is performed to form a gate oxide film.
게이트 산화막은 반도체 소자에서 주전류를 제어하기 위한 신호가 입력되는 게이트 전극과 반도체 기판과의 절연을 위해 형성되는 산화막으로, 상기 게이트 산화막 위해 게이트 전극을 형성하게 된다. 그리고 게이트 전극의 형성은 폴리 실리 콘막을 증착시키고 전기전도성을 띠도록 하기 위해 보론(Boron) 이온을 주입시켜 게이트 전극을 형성하게 된다.The gate oxide layer is an oxide layer formed to insulate the semiconductor substrate from a gate electrode to which a signal for controlling main current is input in the semiconductor device, and forms a gate electrode for the gate oxide layer. In addition, in order to form the gate electrode, boron ions are implanted to form the gate electrode in order to deposit a polysilicon layer and have electrical conductivity.
그런데 보론은 원자반경이 작기 때문에 게이트 전극 물질로 사용되는 폴리 실리콘막을 쉽게 투과하고 일부는 게이트 산화막까지 투과하는 성질이 있다. 이로 인한 게이트 산화막의 특성 열화에 대한 해결이 중요한 문제로 등장하고 있다.However, since boron has a small atomic radius, the boron easily penetrates the polysilicon film used as the gate electrode material, and some of the boron penetrates the gate oxide film. As a result, a solution to the deterioration of the gate oxide film has emerged as an important problem.
도1은 종래의 반도체 소자에서 게이트 산화막을 형성하는 방법을 나타내는 단면도이다. 도 1에 도시된 바와 같이, 실리콘 기판(10) 위에 질소를 이온주입하여 질화막(20)을 적층시킨후 건식산화하여 게이트 산화막(30)을 형성함으로서 질화막(20)을 실리콘 기판(10)과 게이트 산화막(30) 사이에 적층시킨 후, 폴리 실리콘막(40)을 증착한 다음 도핑원소인 보론을 침투시킨 상태를 나타낸다. 1 is a cross-sectional view showing a method of forming a gate oxide film in a conventional semiconductor device. As shown in FIG. 1, nitrogen is ion-implanted on the
상기와 같은 방법에 의해 게이트 전극을 형성하면 폴리 실리콘막(40)에 주입되는 보론 이온이 실리콘 기판(10)에 침투되는 것을 방지할 수 있다. 그러나 게이트 산화막(30)내로 침투된 보론 원자들에 의한 결함작용 때문에 게이트 산화막(30)의 파손을 야기하여 게이트 산화막(30)의 신뢰성을 저하시킨다는 문제점이 있다. If the gate electrode is formed by the above method, it is possible to prevent the boron ions injected into the
또한 실리콘 기판(10) 표면에 질화막(20)이 존재하면 건식산화 공정에서 게이트 산화막(30)이 잘 형성되지 않을 뿐만아니라 게이트 산화막(30) 표면에 끊어진 댕글링본드(dangling bond)가 많아 표면이 거칠게 형성되어 전류가 흐를 때 전하가 거친부분으로 집중되어 게이트 산화막(30)의 파손되고 문턱전압의 특성과 소자의 신뢰성을 저하하는 문제점이 있었다.In addition, when the
따라서, 본 발명은 상기와 같은 종래 기술의 제반 단점과 문제점을 해결하기 위한 것으로, 게이트 산화막을 형성한 후, 제1 폴리 실리콘막을 증착하고, 인시튜 수소로 열처리를 하여 제2 폴리 실리콘막을 증착함으로써 게이트 산화막의 손실을 최소로 하는 반도체 소자의 게이트 산화막 형성 방법을 제공함에 본 발명의 목적이 있다.
Accordingly, the present invention is to solve the above disadvantages and problems of the prior art, by forming a gate oxide film, and then depositing a first polysilicon film, heat treatment with in situ hydrogen to deposit a second polysilicon film An object of the present invention is to provide a method for forming a gate oxide film of a semiconductor device which minimizes the loss of the gate oxide film.
본 발명의 상기 목적은 실리콘 기판 상에 질소를 이온주입하여 질화막을 형성하는 단계; 상기 질화막 상에 게이트 산화막을 형성하는 단계; 상기 게이트 산화막 상에 제1 폴리 실리콘막을 증착하는 단계; 상기 제1 폴리 실리콘막을 인시튜 수소로 열처리하는 단계 및 상기 제1 폴리 실리콘막 상에 제2 폴리 실리콘막을 증착하는 단계를 포함하여 이루어진 반도체 소자의 게이트 산화막 형성 방법에 의해 달성된다.The object of the present invention is to form a nitride film by ion implantation of nitrogen on a silicon substrate; Forming a gate oxide film on the nitride film; Depositing a first polysilicon film on the gate oxide film; A method of forming a gate oxide film of a semiconductor device comprising the step of heat-treating the first polysilicon film with in-situ hydrogen and depositing a second polysilicon film on the first polysilicon film.
본 발명의 상기 목적과 기술적 구성 및 그에 따른 작용효과에 관한 자세한 사항은 본 발명의 바람직한 실시예를 도시하고 있는 도면을 참조한 이하 상세한 설명에 의해 보다 명확하게 이해될 것이다.Details of the above object and technical configuration of the present invention and the effects thereof according to the present invention will be more clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention.
도 2a 및 도 2b는 본 발명에 따른 게이트 산화막을 형성하는 방법을 나타내는 공정 단면도이다. 도 2a에 도시된 바와 같이, 실리콘 기판(100) 상에 질소를 이온주입하여 질화막(미도시)을 적층시킨다. 2A and 2B are cross-sectional views illustrating a method of forming a gate oxide film according to the present invention. As shown in FIG. 2A, nitrogen is ion-implanted on the
이후, 건식산화하여 상기 질화막 상에 게이트 산화막(110)을 형성하고, 상기 게이트 산화막(110) 상에 제1 폴리 실리콘막(120)을 증착한 후, 인시튜 수소(H2)로 열처리 공정을 한다.Thereafter, dry oxidation is performed to form a
도 2b에 도시된 바와 같이, 상기 인시튜 수소로 열처리 공정을 마친 제1 폴리 실리콘막(120) 상에 제2 폴리 실리콘막(130)을 증착한다. As shown in FIG. 2B, a
따라서, 본 발명과 같이 산화막을 형성하면, 환원 반응에 의한 게이트 산화막의 손실이 없어 상기 게이트 산화막과 질화막 및 게이트 산화막과 폴리 실리콘막의 계면에 존재하는 댕글링 본드가 수소와 결합하여 계면 특성이 향상된다.Therefore, when the oxide film is formed as in the present invention, there is no loss of the gate oxide film due to the reduction reaction, and the dangling bond existing at the interface between the gate oxide film, the nitride film, the gate oxide film, and the polysilicon film is combined with hydrogen to improve the interface characteristics. .
본 발명은 이상에서 살펴본 바와 같이 바람직한 실시예를 들어 도시하고 설명하였으나, 상기한 실시예에 한정되지 아니하며 본 발명의 정신을 벗어나지 않는 범위 내에서 당해 발명이 속하는 기술분야에서 통상의 지식을 가진 자에 의해 다양한 변경과 수정이 가능할 것이다.Although the present invention has been shown and described with reference to the preferred embodiments as described above, it is not limited to the above embodiments and those skilled in the art without departing from the spirit of the present invention. Various changes and modifications will be possible.
따라서, 본 발명의 반도체 소자의 게이트 산화막 형성 방법은 게이트 산화막을 형성한 후 폴리 실리콘막 증착시 인시튜 수소로 열처리를 함으로써 게이트 산화막의 손실없이 게이트 산화막의 상하부 계면에 존재하는 댕글링 본드를 수소와 결합하여 계면 특성을 향상할 수 있는 효과가 있다.Therefore, in the method of forming a gate oxide film of the semiconductor device of the present invention, after the gate oxide film is formed, heat treatment is performed with in-situ hydrogen during deposition of the polysilicon film, so that the dangling bond existing at the upper and lower interfaces of the gate oxide film without hydrogen is replaced with hydrogen. By combining there is an effect that can improve the interface properties.
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Patent Citations (4)
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|---|---|---|---|---|
| KR19990068880A (en) * | 1998-02-02 | 1999-09-06 | 윤종용 | Improvement of Electrical Properties of Titanium Silicide Transistor Using Hydrogen Heat Treatment |
| KR20000008022A (en) * | 1998-07-09 | 2000-02-07 | 김영환 | Method for forming a gate oxide |
| KR20040067692A (en) * | 2003-01-24 | 2004-07-30 | 주식회사 하이닉스반도체 | Method for fabricating dual gate of semiconductor device |
| KR20040069467A (en) * | 2003-01-29 | 2004-08-06 | 주식회사 하이닉스반도체 | Method of manufacturing a transistor in a semiconductor device |
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