KR100575883B1 - Method for forming capacitor of semiconductor device - Google Patents

Abstract

The present invention discloses a method for forming a capacitor of a semiconductor device. The disclosed invention provides a semiconductor substrate having a landing plug poly; Forming a cap oxide film on the substrate; Forming an oval photoresist pattern defining a storage node on the cap oxide layer; Etching a cap oxide film using the photoresist pattern; Forming an amorphous silicon film on the cap oxide film surface; Removing the amorphous silicon layer on the cap oxide layer to form the storage node to separate the storage node; Forming a dielectric film on the surface of the amorphous silicon film; Performing a heat treatment process to improve characteristics of the dielectric film; And forming a plate node on the dielectric film. According to the present invention, by forming a capacitor using an elliptical structure, it is possible to increase the charging capacity of the capacitor while securing the critical dimension between adjacent cells and the area of the storage node contact plug and the storage node contact without the addition of the storage node 2 process. have.

Description

Method for forming capacitor of semiconductor device

1 to 2 is a cross-sectional view for explaining the problem of the capacitor forming method according to the prior art.

3A to 3E are cross-sectional views illustrating processes of forming a capacitor of a semiconductor device in accordance with an embodiment of the present invention.

4 is a view showing a charging capacity according to the capacitor structure of the present invention.

Explanation of symbols on the main parts of the drawings

31 silicon substrate 32 interlayer insulating film

33: contact hole 34: landing plug pulley

35 cap oxide film 36 Photosensitive film pattern

37 amorphous silicon film 38 oxide film

39: dielectric film 40: polysilicon film

The present invention relates to a method of forming a capacitor of a semiconductor device, and more particularly, to a method of forming a capacitor of a semiconductor device capable of improving the refresh characteristics and simplifying the process by increasing the charge capacity of the capacitor.

As the demand for semiconductor memory devices has soared, various techniques for obtaining high capacity capacitors have been proposed. Here, the capacitor has a structure in which a dielectric film is interposed between the storage node and the plate node, and the capacitance thereof is proportional to the electrode surface area and the dielectric constant of the dielectric film, and the distance between the electrodes, that is, It is inversely proportional to the thickness of the dielectric film.

Therefore, in order to obtain a high capacity capacitor, it is required to use a dielectric film having a large dielectric constant, to enlarge the electrode surface area, or to reduce the distance between the electrodes. However, reducing the distance between the electrodes, that is, the thickness of the dielectric film has its limitation, and researches for forming a capacitor having a high capacity have been conducted by using a dielectric film having a high dielectric constant or increasing the electrode surface area.

As the integration of memory devices is increased, the device area is reduced, and consequently, the capacitor area is also reduced. Therefore, in order to compensate for the capacitance of the capacitor due to the reduction in area, the height of the capacitor electrode, that is, the storage node, is relatively increasing.

Recently, a capacitor of a highly integrated memory device has been manufactured using a cup structure or a cylinder structure, which is formed in a hole formed to expose the landing plug poly to the cap oxide layer and has a concave shape. The cup structure capacitor is characterized in that the separation between the capacitor and the capacitor as an insulating film, compared to the cylinder capacitor structure has the advantage of low dual bit fail rate (dual bit fail rate) by the bridge (bridge) between adjacent capacitors.

However, as shown in FIG. 1, in the case of 100 nm or less nanoscale devices, in the conventional rectangular cup structure capacitor, the charge capacity and the separator between the capacitor and the capacitor are simultaneously secured according to the reduction of the design rule. Since this is impossible, a circular capacitor is used to move neighboring cells in a zigzag form.

As shown in FIG. 2, when the capacitor is formed in a rectangular shape having a design rule of 100 nm, since the minimum feature size of the chip is 200 nm, it is impossible to secure an intercell separator, but the capacitor may be circular or When formed in an elliptical shape, the minimum size of the chip is increased by more than 40% to 280 nm, so that the critical dimension of the cell-to-cell separator can be easily obtained, thereby minimizing dual bit fail.

On the other hand, since the capacitor of the circular structure is moved in the x-axis direction based on the storage storage node contact plug, the storage node 2 process must be added to secure the contact area with the storage node contact plug. There is a disadvantage in that unit price rise and semiconductor manufacturing process (Turn Around Time) increase.

Accordingly, an object of the present invention is to provide a method for forming a capacitor of a semiconductor device, which is designed to solve the above problems and to improve refresh characteristics and simplify the process by increasing the charge capacity of a capacitor. .

In order to achieve the above object, the present invention provides a semiconductor substrate comprising a landing plug poly; Forming a cap oxide film on the substrate; Forming an oval photoresist pattern defining a storage node on the cap oxide layer; Etching a cap oxide film using the photoresist pattern; Forming an amorphous silicon film on the cap oxide film surface; Removing the amorphous silicon layer on the cap oxide layer to form the storage node to separate the storage node; Forming a dielectric film on the surface of the amorphous silicon film; Performing a heat treatment process to improve characteristics of the dielectric film; And forming a plate node on the dielectric film.

Here, the photosensitive film pattern has a long axis / short axis ratio of 1.2 to 1.7.

The forming of the storage node removes the amorphous silicon layer using an etch back or CMP process.

The storage node is formed of a titanium nitride film (TiN), a tantalum nitride film (TaN), a tungsten nitride film (WN), and tungsten (W) using CVD or ALD.

An oxide film is formed on the surface of the storage node by using a cleaning solution having a mixing ratio of NH 4 OH: H 2 O 2: H 2 O = 1: 4: 20 to 1: 5: 50 between forming the storage node and forming the dielectric film. It is formed to the thickness of.

Between the step of forming the storage node and the step of forming the dielectric film, a natural oxide film on the surface of the storage node is removed using HF or BOE cleaning solution, and then the oxide film is 0.8 to 1.5 nm using rapid thermal oxide devices. It is formed to the thickness of.

Between the step of forming the storage node and the step of forming the dielectric film, a natural oxide film on the surface of the storage node is removed using an HF or BOE cleaning solution, and a nitride film is formed to a thickness of 0.5 to 1.5 nm using a furnace annealing or rapid heat treatment process. do.

Forming the dielectric film uses an atomic layer deposition method.

The dielectric film is formed of a laminate of aluminum oxide (Al 2 O 3), aluminum oxide (Al 2 O 3) / hafnium oxide (HfO 2), and a laminate layer of aluminum oxide (Al 2 O 3) / hafnium oxide (HfO 2).

The heat treatment process proceeds to a furnace annealing or rapid heat treatment process.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3E are cross-sectional views illustrating processes of forming a capacitor of a semiconductor device according to an embodiment of the present invention.

As shown in FIG. 3A, after forming the interlayer dielectric layer 32 on the silicon substrate 31 to cover a predetermined base layer, the interlayer dielectric layer 32 is etched to form a contact hole 33. At this time, the interlayer insulating film 32 is formed of an oxide film.

Next, the landing plug poly 34 is formed using polysilicon doped by chemical vapor deposition (CVD) so that the contact hole is filled, and then the contact hole 33 is subjected to an etchback process. ).

As shown in FIG. 3B, a cap oxide layer 35 is formed on the substrate resultant. Here, the cap oxide film 35 is formed by a single layer of PE-TEOS or a stack of BPSG and PE-TEOS, PSG and PE-TEOS and a stack of BPSG, BPSG and PE-TEOS.

Subsequently, the photoresist pattern 36 defining the storage node is formed on the cap oxide layer 35 in an elliptical shape. Here, the photosensitive film pattern 36 is such that the ratio of the major axis and minor axis is in the range of 1.2 to 1.7.

As shown in FIG. 3C, after the cap oxide layer 35 is etched using the photoresist pattern 36, an amorphous silicon layer 37 is formed on the surface of the cap oxide layer using a CVD method to form a storage node. .

Then, the amorphous silicon layer 37 on the cap oxide layer 35 is removed using an etch back or CMP process to form the storage node to separate the storage node. Here, the storage node may be formed of a titanium nitride film (TiN), a tantalum nitride film (TaN), a tungsten nitride film (WN), and tungsten (W) using a CVD or ALD method.

Subsequently, before forming the dielectric film, an oxide film 38 is formed on the storage node surface to a thickness of 0.3 to 1.5 nm using a cleaning solution having a mixing ratio of NH 4 OH: H 2 O 2: H 2 O = 1: 4: 20 to 1: 5: 50. .

In addition, before the dielectric layer is formed, the oxide layer may be formed to a thickness of 0.8 to 1.5 nm using a rapid thermal oxidizer (RTO) after removing the native oxide layer on the surface of the storage node using HF or BOE cleaning liquid. .

Before the dielectric layer is formed, the nitride layer is removed using a HF or BOE cleaning solution, and then a furnace annealing or rapid thermal process (RTP) is used to remove the native oxide layer on the surface of the storage node. It can be formed in thickness.

As shown in FIG. 3D, the dielectric film 39 is formed on the surface of the amorphous silicon film 37 by an atomic layer deposition method. Here, the dielectric film 39 is formed of a laminate of aluminum oxide film (Al2O3), aluminum oxide film (Al2O3) / hafnium oxide film (HfO2), and a laminate layer of aluminum oxide film (Al2O3) / hafnium oxide film (HfO2).

Subsequently, a heat treatment process is performed to improve the characteristics of the dielectric film 39. At this time, the heat treatment process is performed by Furnace Annealing (Furnace Annealing) or Rapid Thermal Process (RTP).

As shown in FIG. 3E, the polysilicon film 40 doped by the CVD method is formed on the dielectric film 39 to form a plate node.

4 is a view showing the charge capacity according to the capacitor structure of the present invention, when the capacitor is formed using an elliptic capacitor structure compared with the charge capacity of the rectangular or circular capacitor, the capacitor without the addition of the storage node 2 process The charging capacity of can be increased by about 15%. For this reason, the yield by improvement of a refresh characteristic and a process simplification can be improved.

As described above, the present invention, unlike the conventional method of forming a capacitor using a rectangular or circular structure, by forming a capacitor using an elliptical structure, the critical dimension and storage node contact plug and storage node between adjacent cells without the addition of the storage node 2 process It is possible to increase the charging capacity of the capacitor while securing the contact area.

In the above, the present invention has been described with reference to some examples, but the present invention is not limited thereto, and a person of ordinary skill in the art may make many modifications and variations without departing from the spirit of the present invention. I will understand.

As described above, the present invention increases the charge capacity of the capacitor while forming the capacitor using an elliptical structure to secure the critical dimension between adjacent cells and the area of the storage node contact plug and the storage node contact without the addition of the storage node 2 process. Refresh characteristics and process simplification can be obtained.

Claims (10)

Providing a semiconductor substrate having a landing plug poly formed thereon; Forming a cap oxide film on the substrate; Forming an oval photoresist pattern defining a storage node on the cap oxide layer; Etching a cap oxide film using the photoresist pattern; Forming an amorphous silicon film on the cap oxide film surface; Removing the amorphous silicon layer on the cap oxide layer to form the storage node to separate the storage node; Forming a dielectric film on the surface of the amorphous silicon film; Performing a heat treatment process to improve characteristics of the dielectric film; And Forming a plate node on the dielectric film. The method of forming a capacitor of a semiconductor device according to claim 1, wherein the photoresist pattern has a long / short ratio of 1.2 to 1.7. The method of claim 1, wherein the forming of the storage node comprises removing an amorphous silicon layer using an etch back or CMP process. The semiconductor device of claim 1, wherein the storage node is formed of a titanium nitride layer (TiN), a tantalum nitride layer (TaN), a tungsten nitride layer (WN), and tungsten (W) using CVD or ALD. Capacitor Formation Method. The storage node surface of claim 1, wherein a cleaning solution having a mixing ratio of NH 4 OH: H 2 O 2: H 2 O = 1: 4: 20 to 1: 5: 50 is formed between forming the storage node and forming the dielectric layer. A method for forming a capacitor of a semiconductor device, characterized in that an oxide film is formed to a thickness of 0.3 to 1.5 nm. The method of claim 1, wherein the oxide layer is formed using rapid thermal oxidizers after removing the natural oxide layer on the surface of the storage node using HF or BOE cleaning liquid between forming the storage node and forming the dielectric layer. To form a thickness of 0.8 to 1.5 nm. 2. The method of claim 1, wherein the nitride layer is formed by using an annealing or rapid heat treatment process after removing the natural oxide layer on the surface of the storage node using HF or BOE cleaning liquid between forming the storage node and forming the dielectric film. A capacitor forming method of a semiconductor device, characterized in that formed to a thickness of 1.5nm. The method of claim 1, wherein the forming of the dielectric layer uses an atomic layer deposition method. The method of claim 1, wherein the dielectric layer is formed of a laminate of aluminum oxide (Al2O3), aluminum oxide (Al2O3) / hafnium oxide (HfO2), and a laminate layer of aluminum oxide (Al2O3) / hafnium oxide (HfO2). A method of forming a capacitor of a semiconductor device. The method of claim 1, wherein the heat treatment process is a furnace annealing or rapid heat treatment process.

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