KR100566817B1 - Thin Film Transistor Substrate for Display Device And Method For Fabricating The Same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate for a display element and a method of manufacturing the same, which can prevent a short defect with a pixel electrode during repair of a storage line.

The thin film transistor substrate for display elements includes: a gate line and a data line formed in a cross structure with a first insulating film interposed therebetween to determine a pixel region; A thin film transistor connected to the gate line and the data line; A second insulating film covering the gate line, the data line, and the thin film transistor; A pixel electrode formed in the pixel region and connected to the thin film transistor through a contact hole passing through the second insulating layer; A storage line crossing the pixel electrode and the data line; A storage upper electrode connected to the pixel electrode and configured to form the storage line and a storage capacitor; The pixel electrode may include a cutout portion of the storage line to be opened during repair, overlapping only the first and second insulating layers, adjacent to an intersection of the storage line and the data line, and symmetrically with respect to the data line. A groove part is provided.

Description

Thin film transistor substrate for display device and method for manufacturing same {Thin Film Transistor Substrate for Display Device And Method For Fabricating The Same}             

1 is a plan view partially showing a conventional thin film transistor substrate for display elements;

FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along lines II ′ and II-II ′.

3 is a plan view partially illustrating a thin film transistor substrate for a display device according to an exemplary embodiment of the present invention.

FIG. 4 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 3 taken along lines III-III ′ and IV-IV ′.

5A through 5E are cross-sectional views illustrating a method of manufacturing the thin film transistor substrate illustrated in FIG. 4.

 <Description of Symbols for Main Parts of Drawings>

2, 102: gate line 4, 104: data line

6, 106 thin film transistor 8, 108 gate electrode

10, 110: source electrode 12, 112: drain electrode

14, 114: active layer 16, 26, 116, 126: contact hole

18, 118: pixel electrodes 20, 120: storage capacitor

22, 122: storage upper electrode 26, 126: storage line

42, 142: substrate 44, 144: gate insulating film

46 and 146: ohmic contact layer 50 and 150: protective film

148: groove

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate applied to a display device and a method of manufacturing the same, and more particularly, to a thin film transistor substrate and a method of manufacturing the same, which can prevent a short defect with a pixel electrode during a repair of a storage line.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display includes a liquid crystal display panel (hereinafter, referred to as a liquid crystal panel) in which liquid crystal cells are arranged in a matrix form, and a driving circuit for driving the liquid crystal panel.

The liquid crystal panel includes a thin film transistor substrate and a color filter substrate facing each other, a liquid crystal injected between the two substrates, and a spacer for maintaining a cell gap between the two substrates.

The thin film transistor substrate is composed of a pixel electrode formed for each liquid crystal cell region defined by the intersection of a gate line and a data line, a thin film transistor connected between the gate line and the data line and the pixel electrode, a plurality of insulating films, and an alignment film applied thereon.

The color filter substrate includes a color filter formed in units of liquid crystal cells, a black matrix for distinguishing between color filters and reflecting external light, a common electrode for supplying a reference voltage to the liquid crystal in common, and an alignment layer applied thereon.

The thin film transistor substrate and the color filter substrate are bonded to each other to inject and encapsulate a liquid crystal to complete a liquid crystal panel, or to form a liquid crystal on any one of the two substrates and then attach the liquid crystal panel.

On the other hand, a protective film for protecting signal lines and the thin film transistor is entirely coated on the thin film transistor substrate, and pixel electrodes are formed for each liquid crystal cell on the protective film. As the protective film, an inorganic insulating film or an organic insulating film is used. In this case, the organic insulating layer has a relatively low dielectric constant and can be formed thick by spin coating, thereby partially forming the data line and the pixel electrode. As a result, the area of the pixel electrode is increased to improve the aperture ratio.

FIG. 1 is a plan view illustrating a portion of a conventional thin film transistor substrate having an improved aperture ratio by employing an organic insulating layer, and FIG. 2 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 1 taken along line II ′.

The thin film transistor substrate illustrated in FIGS. 1 and 2 includes a gate line 2 and a data line 4 intersecting each other with a gate insulating layer 44 interposed therebetween on a lower substrate 42, and a thin film transistor 6 formed at each intersection thereof. ) And a pixel electrode 18 formed in the liquid crystal cell region defined by the intersection structure. The thin film transistor substrate further includes a storage capacitor 20 formed at an overlapping portion of the pixel electrode 18 and the storage line 24 crossing the pixel electrode 18.

The thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 4, a drain electrode 12 connected to the pixel electrode 18, and And an active layer 14 overlapping the gate electrode 8 to form a channel between the source electrode 10 and the drain electrode 12. The active layer 14 is also formed to overlap the data line 4. An ohmic contact layer 46 is further formed between the active layer 14 and the data line 4, the source electrode 10, and the drain electrode 12.

The pixel electrode 18 is connected to the drain electrode 12 of the thin film transistor 6 via the first contact hole 16 penetrating the protective film 50. In particular, when the organic insulating layer is used as the passivation layer 50, both sides of the pixel electrode 18 are formed to partially overlap the data line 4.

The storage capacitor 20 overlaps the storage line 24 including the storage lower electrode, and the second contact hole 26 overlapping the storage lower electrode and the gate insulating layer 44 therebetween and penetrating the passivation layer 50. The storage upper electrode 22 is connected to the pixel electrode 18. The storage line 24 crosses the data line 4 across the pixel electrode 18. The gate insulating layer 44, the active layer 14, and the ohmic contact layer 46 are positioned between the storage line 24 and the data line 4.

Here, the storage line 24 is repaired by opening the defective part when a pattern defect or other defect occurs. At this time, in order to facilitate opening of the storage line 24, the vertical width of the storage line 24 is set smaller than other portions at the intersection with the data line 4 as shown in FIG. 1. In detail, when a failure occurs in the storage line 24, the cutting line CP of the storage line 24 adjacent to the data line 4 and the data line 4 are cut with a laser or the like while having a relatively small width as shown in FIG. 1. It repairs by opening the defective part of (24). However, since the cutout CP of the storage line 24 has a structure overlapping with the pixel electrode 18 thereon, short-circuit of the pixel electrode 18 and a short defect occurs when the storage line 24 is cut. It is happening.

Accordingly, an object of the present invention is to provide a thin film transistor substrate for a display element and a method of manufacturing the same, which can prevent a short defect with a pixel electrode during repair of a storage line.

In order to achieve the above object, a thin film transistor substrate for a display device according to an embodiment of the present invention includes a gate line and a data line formed in a cross structure with a first insulating film interposed therebetween to determine a pixel region; A thin film transistor connected to the gate line and the data line; A second insulating film covering the gate line, the data line, and the thin film transistor; A pixel electrode formed in the pixel region and connected to the thin film transistor through a contact hole passing through the second insulating layer; A storage line crossing the pixel electrode and the data line; A storage upper electrode connected to the pixel electrode and configured to form the storage line and a storage capacitor; The pixel electrode includes a groove portion that allows the cut portion of the storage line to be opened during repair to overlap only the first and second insulating layers.

In addition, the method of manufacturing a thin film transistor substrate for a display device according to the present invention may include forming a first conductive pattern including a gate line, a gate electrode connected to the gate line, and a storage line parallel to the gate line; ; Forming a first insulating film on the substrate on which the first conductive pattern is formed; Forming a semiconductor pattern on a predetermined region of the first insulating film; A data line defining the gate line and the pixel region, a source electrode connected to the data line, a drain electrode facing the source electrode, and a storage upper electrode partially overlapping the storage line in the first insulating layer on which the semiconductor pattern is formed; Forming a second conductive pattern comprising; Forming a second insulating film on the first insulating film on which the second conductive pattern is formed and exposing the drain electrode and the storage upper electrode, respectively; A pixel formed on the second insulating layer of the pixel region and connected to the exposed drain electrode and the upper storage electrode, and having a groove portion to allow the cutout of the storage line to be opened during repair to overlap only the first and second insulating layers; Forming an electrode.

The groove portion of the pixel electrode is formed adjacent to the intersection of the storage line and the data line.

Grooves of the pixel electrode are symmetrically formed with respect to the data line.

The cutout of the storage line is formed to have a smaller vertical width than other portions of the storage line.

The groove portion of the pixel electrode is formed such that its edge portion has a separation distance greater than the width of the data line and at least the laser beam.

The second insulating layer is an organic insulating layer, and both side portions of the pixel electrode except the groove portion are formed to overlap the data line.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 to 5E.

3 is a plan view illustrating a thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 3 taken along the line II-II ′.

The thin film transistor substrate illustrated in FIGS. 3 and 4 includes a gate line 102 and a data line 104 intersecting each other with a gate insulating layer 144 therebetween on the lower substrate 142, and the thin film transistor 106 formed at each intersection thereof. ), And a pixel electrode 118 formed in the liquid crystal cell region defined by the cross structure thereof. The thin film transistor substrate further includes a storage capacitor 120 formed at an overlapping portion of the pixel electrode 118 and the storage line 124 crossing the pixel electrode 118.

The thin film transistor 106 keeps the pixel signal supplied to the data line 104 charged to the pixel electrode 118 in response to the scan signal supplied to the gate line 102. To this end, the thin film transistor 106 may include a gate electrode 108 connected to the gate line 102, a source electrode 110 connected to the data line 104, and a drain electrode connected to the pixel electrode 118. 112 and an active layer 114 overlapping the gate electrode 108 to form a channel between the source electrode 110 and the drain electrode 112. The active layer 114 is also formed to overlap the data line 104. In addition, an ohmic contact layer 146 is further formed between the data line 104, the source electrode 110, the drain electrode 112, and the active layer 114.

The pixel electrode 118 is connected to the drain electrode 112 of the thin film transistor 106 via the first contact hole 116 penetrating the passivation layer 150. In particular, when the organic insulating layer is used as the passivation layer 150, both sides of the pixel electrode 118 are formed to partially overlap the data line 104. The pixel electrode 118 generates a potential difference with a common electrode of a color filter substrate (not shown) by the charged pixel signal. Due to this potential difference, the liquid crystal between the thin film transistor substrate and the color filter substrate is rotated by dielectric anisotropy to transmit light incident from the light source (not shown) via the pixel electrode 118 toward the color filter substrate.

The storage capacitor 120 overlaps the storage line 124 with the storage line 124 and the gate insulating layer 144 therebetween and passes through the second contact hole 126 that passes through the passivation layer 150. 118 and a storage upper electrode 122 connected thereto. The storage capacitor 120 allows the pixel signal charged in the pixel electrode 118 to remain stable until the next pixel signal is charged.

Here, the storage line 124 is provided with a cutout CP that does not overlap with the data line 104 in order to open the defective portion when a pattern defect or other defect occurs. The cut portion CP of the storage line 124 is symmetrically formed at both sides of the intersection point between the storage line 124 and the data line 104, and has a vertical width smaller than that of the other portion so as to be easily cut by a laser or the like. Is formed. The pixel electrode 118 has a groove 148 so as not to overlap the cutout CP of the storage line 124, and the groove 148 of the pixel electrode 118 is symmetrically with respect to the data line 104. Is formed. Accordingly, the cut portion CP of the storage line 124 overlaps only the gate insulating layer 144 and the passivation layer 150 without top and bottom overlapping with the pixel electrode 118. As a result, when a defect occurs in the storage line 124, a short defect with the pixel electrode 118 is caused by cutting and opening the cut portion CP of the storage line 124 that does not overlap the pixel electrode 118 with a laser or the like. The storage line 124 can be repaired without repair. Here, when cutting the cut portion CP of the storage line 124 with a laser beam, the edge portion of the groove 148 of the pixel electrode 118 may not interfere with the adjacent pixel electrode 118 (that is, the storage line 124). The edges of the overlapped grooves 148 have a separation distance (eg, about 5 μm) greater than the width of the data line 104 and the laser beam.

5A through 5D are cross-sectional views illustrating a method of manufacturing the thin film transistor substrate illustrated in FIG. 4 step by step.

Referring to FIG. 5A, a gate metal pattern including a gate line 102, a gate electrode 110, and a storage line 124 is formed in a first mask process. Specifically, the gate metal layer is formed on the lower substrate 142 through a deposition method such as a sputtering method. Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) are used as the gate metal layer. Subsequently, the gate metal layer is patterned by a photolithography process and an etching process using a first mask, so that the storage is parallel with the gate line 102, the gate electrode 108 protruding from the gate line 102, and the gate line 102. A gate metal pattern is formed that includes lines 124. The storage line 124 is formed such that an intersection with the data line to be formed later and a cutout CP for repairing have a smaller vertical width than other portions.

Referring to FIG. 5B, a gate insulating layer 144 is formed on a lower substrate 142 on which a gate metal pattern is formed through a deposition method such as PECVD or sputtering. As the material of the gate insulating film 144, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used. The semiconductor pattern including the active layer 114 and the ohmic contact layer 146 is formed on the gate insulating layer 144 by the second mask process. In detail, a semiconductor layer, that is, an amorphous silicon layer and an n + amorphous silicon layer, is deposited on the gate insulating layer 144 through a deposition method such as PECVD or sputtering. Subsequently, the semiconductor layer is etched by the photolithography process and the etching process using the second mask to form a semiconductor pattern including the active layer 114 and the ohmic contact layer 146.

Referring to FIG. 5C, a source / drain metal pattern including a data line 104, source and drain electrodes 110 and 112, and a storage upper electrode 122 is formed on a gate insulating layer 144 on which a semiconductor pattern is formed. In detail, the source / drain metal layer is deposited on the gate insulating layer 144 on which the semiconductor pattern is formed through a deposition method such as PECVD or sputtering. As the source / drain metal layer, Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) and the like are used. Subsequently, the source / drain metal layer is etched by the photolithography process and the etching process using the third mask to face the source electrode 110 and the source electrode 112 protruding from the data line 102 and the data line 102. A source / drain metal pattern including a drain electrode 114 and a storage upper electrode 122 overlapping a portion of the storage line 124 is formed. The active layer 114 is then exposed by removing the ohmic contact layer 146 exposed between the source electrode 112 and the drain electrode 114 as a mask.

Meanwhile, the above-described semiconductor pattern and the source / drain metal pattern may be formed using one mask when using a partially transmissive (diffractive exposure or semitransmissive) mask.

Referring to FIG. 5D, the passivation layer 150 including the first and second contact holes 116 and 126 is formed on the gate insulating layer 144 on which the source / drain metal pattern is formed in the fourth mask process. In detail, the passivation layer 150 is entirely formed on the gate insulating layer 144 on which the source / drain metal pattern is formed. As the material of the protective film 150, an organic insulating material is used. The first and second contact holes 116 and 126 penetrating the passivation layer 150 are formed by a photolithography process and an etching process using a third mask. Here, the first contact hole 116 exposes the drain electrode 112 and the second contact hole 126 exposes the storage upper electrode 1220.

Referring to FIG. 5E, the pixel electrode 118 is formed on the passivation layer 150 by a fifth mask process. Specifically, the transparent conductive film is formed on the protective film 150 through a deposition method such as sputtering. ITO, TO, IZO, etc. are used as a transparent conductive film. Subsequently, the transparent conductive layer is patterned through a photolithography process and an etching process using a fourth mask to form the pixel electrode 118. In this case, the groove 148 is provided in the pixel electrode 118 so that the pixel electrode 118 does not overlap the cutout CP of the storage line 124 adjacent to the data line 104.

As described above, the thin film transistor substrate and the method of manufacturing the same according to the present invention can prevent the short circuit with the pixel electrode during repair of the storage line by forming the pixel electrode so as not to overlap with the cut portion of the storage line.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

A gate line and a data line formed in an intersecting structure with the first insulating film interposed therebetween to determine the pixel region; A thin film transistor connected to the gate line and the data line; A second insulating film covering the gate line, the data line, and the thin film transistor; A pixel electrode formed in the pixel region and connected to the thin film transistor through a contact hole passing through the second insulating layer; A storage line crossing the pixel electrode and the data line; A storage upper electrode connected to the pixel electrode and configured to form the storage line and a storage capacitor; The pixel electrode may include a cutout portion of the storage line to be opened during repair, overlapping only the first and second insulating layers, adjacent to an intersection of the storage line and the data line, and symmetrically with respect to the data line. A thin film transistor substrate for display elements, comprising a groove portion. delete delete The method of claim 1, And the cutout of the storage line has a smaller vertical width than other portions of the storage line. The method of claim 1, The groove portion of the pixel electrode A thin film transistor substrate for display elements, wherein an edge portion thereof is formed to have a separation distance greater than the width of the data line and at least a laser beam. The method of claim 1, The second insulating layer is an organic insulating layer, and both side portions of the pixel electrode except the groove portion are formed to overlap the data line. Forming a first conductive pattern on the substrate, the first conductive pattern comprising a gate line, a gate electrode connected to the gate line, and a storage line parallel to the gate line; Forming a first insulating film on the substrate on which the first conductive pattern is formed; Forming a semiconductor pattern on a predetermined region of the first insulating film; A data line defining the gate line and the pixel region, a source electrode connected to the data line, a drain electrode facing the source electrode, and a storage upper electrode partially overlapping the storage line in the first insulating layer on which the semiconductor pattern is formed; Forming a second conductive pattern comprising; Forming a second insulating film on the first insulating film on which the second conductive pattern is formed and exposing the drain electrode and the storage upper electrode, respectively; A cut portion of the storage line which is formed on the second insulating layer of the pixel area and is connected to the exposed drain electrode and the storage upper electrode, and is to be opened during repair, overlaps only the first and second insulating layers, and the storage line and the data. And forming a pixel electrode formed adjacent to an intersection of the lines and having a groove formed symmetrically with respect to the data line. delete delete The method of claim 7, wherein And a cutout portion of the storage line is formed to have a smaller vertical width than other portions of the storage line. The method of claim 7, wherein The groove portion of the pixel electrode A method of manufacturing a thin film transistor substrate for a display element, wherein an edge portion thereof is formed to have a separation distance greater than the width of the data line and at least a laser beam. The method of claim 7, wherein And the second insulating film is an organic insulating film, and both side portions of the pixel electrode except the groove portion are formed to overlap the data line.

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