KR100556347B1 - Liquid Crystal Display device and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device, comprising: a pixel portion in which a plurality of pixel regions defined by a plurality of gate lines and data lines perpendicular to each other are formed in a matrix, and the gate lines and data lines of the pixel portion A bottom gate type pixel thin film transistor formed at an intersection and having a microcrystalline silicon as an active layer, and a switching element of a driving circuit for driving the pixel thin film transistor, and having a top gate type pixel portion at the edge of the pixel region on the substrate. It is composed of a plurality of formed circuit thin film transistor can maximize the performance of the liquid crystal display device.

Amorphous Silicon, Polycrystalline Silicon, Grain, Micro-crystalline Silicon,

Description

Liquid crystal display device and method for manufacturing the same

1 is a detailed plan view of a conventional liquid crystal display using amorphous silicon, and FIG. 2 is a cross-sectional view taken along line II ′ of FIG. 1.

3 is a schematic configuration plan view of a liquid crystal display device using a conventional amorphous silicon thin film transistor.

4 is a schematic structural plan view of a conventional liquid crystal display using polycrystalline silicon.

5 is a cross-sectional view of a conventional polysilicon thin film transistor.

6 is a plan view schematically showing a liquid crystal display according to the present invention.

7 is a cross-sectional view of formation of microcrystalline silicon according to the present invention.

8A to 8E are cross-sectional views of manufacturing a liquid crystal display device of the present invention.

Explanation of symbols for main parts of the drawings

100: pixel portion 101: gate line

102: transmitted light shield 102a, 102b: first and second gate electrodes

103: data line 105a, 105b: source / drain electrodes

107a, 107b: Pixel and Circuit Thin Film Transistor

108: pixel electrodes 108a, 108b: first and second bus lines
109: lower substrate

111a and 111b: first and second gate insulating films

112: active layer 113: amorphous phase

114: crystal phase 115: substrate

200: circuit part

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device having a thin film transistor having a different structure from each of a pixel portion and a circuit portion using microcrystalline silicon as an active layer and a method of manufacturing the same.
Recently, as the information society develops, the demand for display devices is increasing in various forms, and in recent years, the liquid crystal display device (LCD), plasma display panel (PDP), electro luminescent display (ELD), and VFD ( Various flat panel display devices such as Vacuum Fluorescent Display have been studied, and some are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention, a variety of applications such as a television, a computer monitor, and the like for receiving and displaying broadcast signals have been developed.

As described above, although various technical advances have been made in order for a liquid crystal display device to serve as a screen display device in various fields, the task of improving the image quality as a screen display device is often arranged with the above characteristics and advantages. . Therefore, in order to use a liquid crystal display device in various parts as a general screen display device, the key to development is how much high definition images such as high definition, high brightness, and large area can be realized while maintaining the characteristics of light weight, thinness, and low power consumption. It can be said.

Such a liquid crystal display may be largely divided into a liquid crystal panel displaying an image and a driving unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel has a predetermined space and is bonded to the first and second glass substrates. And a liquid crystal layer formed between the first and second glass substrates.

The first glass substrate (TFT array substrate) may include a plurality of gate lines arranged in one direction at a predetermined interval, a plurality of data lines arranged at regular intervals in a direction perpendicular to the gate lines, and A plurality of pixel electrodes formed in a matrix form in each pixel region defined by crossing each gate line and data line, and a plurality of thin films that are switched by signals of the gate line and transfer the signal of the data line to each pixel electrode. Transistors are formed.

In the second glass substrate (color filter substrate), a black matrix layer for blocking light in portions other than the pixel region, an R, G, and B color filter layer for expressing color colors are common to implement an image. An electrode is formed.

The first and second substrates have a predetermined space by spacers and are bonded by a seal material to form a liquid crystal between the two substrates.

Here, the thin film transistor may be classified into large amorphous silicon type and polycrystalline silicon type according to the characteristics of the semiconductor thin film.

In both cases, efforts have been made to reduce the number of exposure steps in the process in order to reduce the process cost and increase the yield. In the case of amorphous silicon, the chemical vapor deposition (CVD) is formed even at a low temperature. Since this can be done, there is an advantage in the characteristics of the liquid crystal display device using the glass substrate. However, in the case of amorphous silicon, since the carrier mobility is low, it is not suitable for forming a transistor element of a driving circuit requiring fast operating characteristics. This fact means that an IC for driving the liquid crystal display device must be manufactured separately and attached to the periphery of the liquid crystal panel, and the manufacturing cost of the liquid crystal display device increases due to an increase in the process for the driving module.

On the other hand, the polycrystalline silicon layer has a much higher carrier mobility than amorphous silicon, and thus can be used to manufacture an IC for a driving circuit. Therefore, when the polycrystalline silicon layer is used as a semiconductor thin film for forming a thin film transistor of a liquid crystal display, a thin film transistor element for a pixel electrode and a transistor element for a driving circuit can be formed together on a same glass substrate through a series of processes. This has the effect of reducing the cost of the module process in the manufacturing of the liquid crystal display device and at the same time lowers the power consumption of the liquid crystal display device.

As described above, amorphous silicon and polycrystalline silicon have their advantages and disadvantages, and thin films are used not only in the liquid crystal display device but also in the EL display device.

First, in the liquid crystal display device, the amorphous silicon type thin film transistor is 300? Since it can be manufactured at an appropriate temperature, the mobility of the n-type TFT, which can be sufficiently applied to use a low-cost translucent glass substrate, is less than 1 cm ² / Vs, and practical mobility is obtained for the p-type thin film transistor. Because of this, because it cannot be applied to the peripheral circuit, the IC circuit was mounted on the substrate to configure the peripheral circuit.

On the other hand, in the case of using the polycrystalline silicon layer, in order to form the polycrystalline silicon layer thin film on the substrate, an additional step for crystallization such as forming an amorphous silicon thin film through a low temperature CVD process and irradiating a laser beam is required. This could reduce productivity.

Therefore, research and development for forming a silicon thin film having a large grain size, such as forming amorphous silicon directly by the low-temperature chemical vapor deposition method, are in a trend of continuing.

Hereinafter, a schematic configuration of a general liquid crystal display device will be described with reference to the drawings.

FIG. 1 is a detailed plan view of a conventional liquid crystal display using amorphous silicon, and FIG. 2 is a cross-sectional view taken along line II ′ of FIG. 1.

1 and 2, the liquid crystal display according to the related art is formed such that the lower substrate 9 and the upper substrate 10 face each other, and the gate line 1 is disposed on the lower substrate 9 in one direction. And the gate electrode 2 is formed to protrude from the gate line 1.

In addition, a gate insulating layer 11 is formed on an entire surface of the lower substrate 9 including the gate electrode 2, and an active layer made of amorphous silicon on the gate insulating layer 11 on the upper side of the gate electrode 2. (12) is formed in an island shape, and impurities are implanted into the upper surface of the active layer 12 to form an ohmic contact layer 12a on both sides of the upper surface of the active layer 12.

Source / drain electrodes 5a and 5b are formed on the ohmic contact layer 12a, and the data line 3 is perpendicular to the gate line 1 at the same time as the source / drain electrodes 5a and 5b. ) Is formed.

In this case, a gate electrode 2 formed to protrude from the gate line 1 on the lower substrate 9, an active layer 12 formed on the gate electrode 2 via a gate insulating layer 11, and the active layer Source / drain electrodes 5a and 5b formed on both sides on (12) constitute an amorphous silicon thin film transistor 7a.

In addition, a passivation layer 13 is formed on the lower substrate 9 including the source / drain electrodes 5a and 5b, and a pixel is formed on the passivation layer 13 to be electrically connected to the drain electrode 5a. An electrode 8 is formed, and a first alignment layer 17a for alignment of liquid crystal is formed on the pixel electrode 8.

A black matrix 14 is formed on the upper substrate 10 facing the lower substrate 9 to prevent light leakage to the gate line 1, the data line 3, and the thin film transistor 7. The color filter layer 15 is formed on the black matrix 14 to implement RGB color.

A common electrode 16 is formed on the color filter layer 15, a second alignment layer 17b is formed on the common electrode 16, and a liquid crystal layer 18 is formed between the two substrates. .

Although not shown in the drawings, a spacer is formed to have a predetermined space between the lower substrate 9 and the upper substrate 10.

In this case, a pixel region is defined by the gate line 1 and the data line 3 formed vertically and horizontally on the lower substrate 9, and the pixel electrode 8 formed on the pixel region is indium tin. It is made of a transparent conductive metal such as indium-tin-oxide (ITO).

In addition, the amorphous silicon thin film transistor 7a formed at the intersection of the gator line 1 and the data line 3 is a switching element for controlling a data signal applied to the pixel electrode 8.

In such a liquid crystal display device, the liquid crystal layer 18 positioned on the pixel electrode 8 is aligned by a data signal applied from the amorphous thin film transistor 7, and the liquid crystal layer 18 is aligned according to the degree of alignment of the liquid crystal layer 18. The image may be expressed by controlling the amount of light passing through the liquid crystal layer 18.

Accordingly, the liquid crystal display device performs the on / off operation of an amorphous silicon thin film transistor 7a for switching a signal applied to the pixel electrode 8 so that the pixel electrode 8 is aligned for the alignment of the liquid crystal layer 18. And a vertical electric field formed between the common electrodes 16.

In this case, as shown in the drawing, in the conventional amorphous silicon thin film transistor 7a, the gate electrode 2 is formed on the lower substrate 9, and the gate insulating layer 11 is formed on the gate electrode 2. The active layer 12 is formed on the gate insulating layer 11, and the active layer 12 has a bottom gated structure in which source / drain electrodes 5a and 5b are formed at both edges of the active layer 12. Channels 12 are formed in the direction in which the gate electrode is formed, i.e., below.

As described above, when the amorphous silicon thin film transistor 7a is doped with n-type impurity, the mobility is less than 1 cm ² / Vs, and since the practical mobility cannot be obtained for the p-type thin film transistor, the liquid crystal display device is used. Since it cannot be applied to a driving circuit for driving, an IC chip was mounted on a board to form a driving circuit.

That is, FIG. 3 is a schematic configuration plan view of a liquid crystal display using a conventional amorphous silicon thin film transistor, and includes a pixel region 8a and an amorphous layer defined by a plurality of gate lines 1 and data lines 3 perpendicular to each other. The liquid crystal panel 20 in which the silicon thin film transistors 7a are arranged in a matrix form, and an amorphous silicon thin film transistor through the corresponding gate lines 1 in a predetermined number of pixel regions commonly connected to the gate lines 1. A gate driving IC 51 for supplying a gate driving voltage of 7a and a common connection to each of the data lines 3 correspond to one horizontal synchronous when a driving voltage is generated from the gate driving IC 51. And a data drive IC 61 for supplying image data in parallel.

The timing controller 30 receives a horizontal / vertical synchronization signal (H / V) of the video signal from the outside, and generates a control signal for driving the cell at a timing corresponding to each synchronization. A gate printed circuit board (PCB) 52 for supplying a gate driving voltage of the amorphous silicon thin film transistor 7 to the gate line 1 under control, and an analog video signal AV mounted on each horizontal synchronous ), The video signal generator 40 converts the digital signal into a digital signal, and outputs the digital image data generated by the video signal generator 40. In addition, when the driving circuit 50 generates the gate driving voltage of the amorphous silicon thin film transistor 7a, the apparatus further includes a data PCB 62 for supplying image data to the data line 3. Here, the gate driving IC 51 sequentially applies a gate driving voltage for switching the amorphous silicon thin film transistor 7a to a plurality of gate lines, and the data driving IC 61 transmits the amorphous silicon thin film transistor. A color signal is applied to each pixel on which 7a is operated.

In this case, the gate driving IC 51 and the data driving IC 61 include a switching element and a resistance element using single crystal silicon and are separately connected to the outside of the liquid crystal panel 20.

Therefore, the conventional liquid crystal display device can control the power applied to the plurality of pixel regions 8a formed in the liquid crystal panel 20 by using the plurality of amorphous silicon thin film transistors 7a.

However, in order to control the plurality of amorphous silicon thin film transistors 7a, a gate driver IC 51 and a data driver IC 61 in which a single crystal silicon switching element and a resistor are mounted outside the liquid crystal panel 20 are separately provided. There is a disadvantage that must be configured.

4 is a schematic configuration plan view of a conventional liquid crystal display using polycrystalline silicon, in which a pixel region and a polycrystalline silicon thin film transistor 7b defined by a gate line 1 and a data line 3 perpendicular to each other are formed. The gate line 1 is formed in a liquid crystal panel 20 arranged in a matrix form and a predetermined number of pixel regions 8a formed at an edge of the liquid crystal panel 20 and commonly connected to the gate lines 1. A gate driving IC 51 for supplying a gate driving voltage of the polycrystalline silicon thin film transistor 7b through the circuit and image data corresponding to one horizontal synchronous when the driving voltage is generated from the gate driving IC 51 in parallel And a data driver IC 61 for supplying the signal to the controller. Although not shown in the drawing, a horizontal / vertical synchronizing signal (H / V) of a video signal is received from the outside as well. Receives the generating a control signal for the cell drive the corresponding timing signal controller, and a silica is an analog video signal to the respective horizontal synchronization (AV) is configured to further include a video signal and outputting the converted into a digital signal.

Here, the gate driving IC 51 sequentially applies a gate driving voltage for switching the polycrystalline silicon thin film transistor 7b of the pixel region 8a to the plurality of gate lines 1 and the data driving circuit 63. ) Applies a color signal to each pixel region 8a in which the polycrystalline silicon thin film transistor 7b is operated. In this case, as shown in FIG. 5, the conventional polycrystalline silicon thin film transistor 7b is formed on the lower substrate 9. A buffer layer 9a is formed on the buffer layer, and an active layer 12 formed of polycrystalline silicon on the buffer layer 9a and having an ohmic contact layer 12a on both sides is formed in an island shape. An interlayer insulating film 11 is formed on the lower substrate 9 on which the gate insulating film 11 is formed, the gate electrode 2 is formed on the gate insulating film 11, and the gate electrode 2 is formed. 11a is formed, and the fire A top gated structure in which the source / drain electrodes 5a and 5b are formed by removing the interlayer insulating film 11a so that pure water is exposed to the region 12a, wherein the polycrystalline silicon thin film transistor 7b In operation, a channel is formed in the active layer 12 in the direction in which the gate electrode 2 is formed, that is, the upper side.

In this case, the polycrystalline silicon has a mobility of about 100 cm ² / Vs or more, and the switching element and the resistance element of the gate driver IC 51 and the data driver IC 61 formed at the edge of the liquid crystal panel 20 are the pixels. The same structure as that of the polycrystalline silicon thin film transistor 7b formed in the region 8a can be achieved.

Accordingly, another conventional liquid crystal display device includes a gate driving IC 51 and a polycrystalline silicon thin film transistor 7b having the same structure as that of the polycrystalline silicon thin film transistor 7b formed in the pixel region 8a in the liquid crystal panel 20. Since it can be manufactured in the data driving circuit 963, a separate manufacturing process according to the design of the gate driving IC 51 and the data driving IC 61 can be reduced, and power consumption can be reduced.

However, in forming the polycrystalline silicon thin film transistor 7b, an amorphous silicon layer is formed on a substrate, an excimer laser light is exposed to the amorphous silicon layer to crystallize the polycrystalline silicon layer, and ion implantation and activation processes are performed. As a result, the manufacturing process cost increases and the process technology is not yet established, resulting in poor uniformity and stability of the process.

As described above, the liquid crystal display of the prior art has the following problems.

First, when the amorphous silicon thin film transistor is used as a switching element for controlling the voltage applied to the pixel region formed in the liquid crystal panel, the conventional liquid crystal display device includes a driving circuit for controlling the amorphous silicon thin film transistor of the liquid crystal panel. Since a separate configuration is required on the outside, the manufacturing cost of the liquid crystal display increases.

Second, in the conventional liquid crystal display device, when polycrystalline silicon is used as a switching element for controlling a voltage applied to a pixel region formed in a liquid crystal panel, an amorphous silicon layer is formed on a substrate, and an excimer laser light is formed on the amorphous silicon layer. And the like are exposed to crystallization into a polycrystalline silicon layer, and ion implantation and activation processes are added, which leads to an increase in the manufacturing process cost, thereby decreasing productivity.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. A bottom gate type thin film transistor is formed in a pixel region using microcrystalline silicon having a grain size larger than amorphous silicon and smaller than polycrystalline silicon using an active layer, and a top in a circuit region. It is an object of the present invention to provide a liquid crystal display device capable of increasing productivity by forming a gate type thin film transistor.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a pixel portion in which a plurality of pixel regions defined by a plurality of gate lines and data lines perpendicular to each other are arranged in a matrix; A first gate electrode on a substrate, a first gate insulating film on the gate electrode, and a micro crystal on the first gate insulating film to control a data signal that is formed at an intersection portion of a gate line and a data line and is applied to the pixel region A plurality of pixel thin film transistors formed in a bottom gate type having an active layer using silicon and a switching element of a driving circuit for driving the pixel thin film transistors, and formed in a circuit portion of the edge of the pixel region on the substrate, On the two gate insulating film and the second gate insulating film It characterized in that it comprises a plurality of thin-film transistor circuit formed of a top-gate type having a second gate electrode.

Here, the first and second gate insulating films are preferably made of a silicon nitride film or a silicon oxide film.

 It is preferable to further include a transmitted light shield formed under the circuit thin film transistor.

Further, another feature of the present invention is a first gate electrode and a transmission light shield formed on the pixel portion and the circuit portion of the substrate, a first gate insulating film formed on the entire surface of the substrate including the first gate electrode and the transmission light shield, and An active layer formed of microcrystalline silicon on the first gate insulating film, a source / drain electrode formed on both sides of the active layer, a second gate insulating film formed on the substrate on which the source / drain electrode is formed, and the drain electrode; A pixel electrode and a bus line electrically connected to each other and formed in a pixel portion and a circuit portion on the second gate insulating film, and a second gate electrode formed simultaneously with the pixel electrode and the bus line and formed on the second gate insulating film above the active layer. It is a liquid crystal display device comprising a.

The second gate electrode may be electrically connected to the gate line of the circuit unit. The first gate electrode and the transmitted light shield may be made of a material having high light reflectivity or high light absorption.

In still another aspect, the present invention provides a method of forming a first gate electrode and a transmitted light shield on a pixel portion and a circuit portion on a substrate, and using a silicon nitride film or a silicon oxide film on the entire surface of the substrate on which the gate electrode is formed. Forming a gate insulating film, forming an active layer in island shape using micro crystalline silicon on the first gate insulating film, forming a source / drain electrode on both sides of the active layer, and forming the source / drain electrode. Forming a second gate insulating film on the entire surface of the substrate including the drain electrode, electrically connecting the drain electrode, and dividing the substrate into a pixel portion and a circuit portion to form a second gate insulating layer on each of the pixel portion and the circuit portion. A pixel electrode and a bus line, and at the same time as the pixel electrode, A liquid crystal display device manufacturing method comprising the step of forming a second gate electrode on a second gate insulating film.

Here, it is preferable that an output bus line is further formed in the circuit part simultaneously with the drain electrode.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

6 is a plan view schematically showing a liquid crystal display according to the present invention.

As shown in FIG. 6, the liquid crystal display of the present invention includes a plurality of pixel regions 108a defined by a plurality of gate lines 101 and data lines 103 perpendicular to each other on a lower substrate 109. The pixel portion 100 is formed in a matrix. The first gate electrode 102a is formed so as to protrude from the gate line 101 on the lower substrate 109 in the pixel region 108a. A first gate insulating layer 111a formed on the entire surface of the lower substrate 109 on which the first gate electrode 102a is formed, an active layer 112 formed of microcrystalline silicon on the first gate insulating layer 111a, Source / drain electrodes 105a and 105b formed on both sides of the active layer 112, a second gate insulating layer 111b formed on the entire surface of the lower substrate 109 on which the source / drain electrodes 105a and 105b are formed; Electrically connected to the drain electrode 105b. Wherein a pixel electrode 108 is formed on the second gate insulating film (111b).

In this case, the first gate electrode is formed on a portion where the gate line 101 and the data line 103 cross each other and is formed on the lower substrate 109 to control a data signal applied to the pixel electrode 108. A plurality of 102a, an active layer 112 formed on the first gate electrode 102a via a first gate insulating layer 111a, and a plurality of source / drain electrodes 105a and 105b on the active layer 112. There are four bottom gate type pixel thin film transistors 107a.

Although not shown, light leakage to the gate line 101, the data line 103, and the pixel thin film transistor 107a is disposed on the upper substrate facing the lower substrate 109 at a predetermined interval in the pixel region 108a. There is a black matrix for preventing, a color filter layer formed on the black matrix, a common electrode formed on the color filter layer, and a liquid crystal layer formed between the two substrates.

In this case, first and second alignment layers may be further formed on the common electrode and the pixel electrode 108 to align the liquid crystal layer between the two substrates. In contrast, the gate may be formed outside the pixel regions 108a. The transmission light shield 102 formed on the lower substrate 109 simultaneously with the line 101, the first gate insulating layer 111a formed on the lower substrate 109, and the first gate. An active layer 112 formed in an island shape using microcrystalline silicon on the insulating layer 111a, source / drain electrodes 105a and 105b formed on both sides of the active layer 112, and the source / drain electrodes 105a, The second gate insulating layer 111b formed on the entire surface of the lower substrate 109 having the 105b formed thereon, and the second bus line 108a formed on the second gate insulating layer 111b to be electrically connected to the drain electrode 105b. ) And the gate line 101 electrically There is a second gate electrode 102b connected to and formed on the second gate insulating layer 111b above the active layer 112.

In this case, a driving circuit formed in the circuit unit 200 at the edges of the pixel regions 108a may include a data driving circuit for outputting a data signal applied to the data line 103 and a gate control signal to the gate line 101. It consists of a gate driving circuit for outputting.

Although not shown, a timing for receiving a horizontal / vertical synchronization signal (H / V) of an image signal from an external source and generating a control signal for cell driving at a timing corresponding to each synchronization and outputting the control signal to the gate driving circuit and the data driving circuit. A control unit and an image signal generator for receiving an analog image signal (AV) carried in each horizontal synchronization, converting the digital signal into a digital signal, and outputting the digital signal are connected to the outside of the two substrates.

In this case, the driving circuit is a switching element for driving the pixel thin film transistor 107a and an active layer 112 formed on the transmitted light shield 102 and the first gate insulating layer 111a and both sides of the active layer 112. Top gate circuit thin film transistor 107b including a source / drain electrode 105a and 105b formed on the second gate electrode 102b formed on the active layer 112 via a second gate insulating layer 111b. There is.

Here, the first gate insulating film 111a and the second gate insulating film 111b are formed of a material such as a silicon nitride film or a silicon oxide film, and the pixel thin film transistor 107a and the circuit are controlled by adjusting the thickness of each insulating film. The performance of the thin film transistor 107b may be improved.

In particular, the active layer 112 is made of micro crystalline silicon having a grain size of about 10 to 100 nm larger in grain size than amorphous silicon and smaller in grain size than polycrystalline silicon.

That is, it can be seen that the mobility of the charge increases in proportion to the size of the grain.

7 is a cross-sectional view of forming microcrystalline silicon according to the present invention, wherein microcrystalline silicon having pillar-shaped crystal phases 114 is formed in the amorphous phase 113 as it rises from the surface of the substrate 115 on which the microcrystalline silicon is formed. .

Therefore, when the micro crystalline silicon is used as the active layer 112, it can be seen that the top gate type thin film transistor which can use the columnar crystal phase as a channel has an advantageous structure.

In this case, the charge mobility of the bottom gate type thin film transistor including the microcrystalline silicon as the active layer 112 is about 5 to 10 cm ² / Vs, and the charge mobility of the top gate type thin film transistor is 10 to 20 cm ² / Vs. To the extent, the charge mobility of the top gate thin film transistor is better.

Accordingly, in the liquid crystal display of the present invention, the top gate thin film transistor may be configured in the driving circuit, and the bottom gate type thin film transistor may be configured in the pixel region 108a to maximize the utilization of the switching element. The manufacturing method of the liquid crystal display device of the present invention configured as described above will be described with reference to the drawings.

8A to 8E are cross-sectional views of manufacturing a liquid crystal display device of the present invention.

First, as shown in FIG. 8A, a metal having excellent reflectivity or light absorption is formed on the entire surface of the lower substrate 109, and then, on the pixel portion 100 of the lower substrate 109 using photo printing and etching. The gate line 101 in FIG. 6 and the first gate electrode 102a protruding from the gate line 101 are formed, and the gate line 101 and the transmitted light shield 102 are formed in the circuit unit 200. .

In this case, the gate line 101 and the first gate electrode 102a are electrically connected, but the gate line 101 and the transmitted light shield 102 are disconnected.

Next, as shown in FIG. 8B, the first gate insulating layer 111a is formed by using a silicon nitride film or a silicon oxide film on the entire surface of the lower substrate 109 including the first gate electrode 102a and the transmitted light shield 102. The active layer 112 is formed using microcrystalline silicon in an island shape on the first gate insulating layer 111a on the gate electrode and the transmitted light shield 102.

In this case, the micro-crystalline silicon is H ₂ dilution deposition, LBL (Layer by Layer) deposition, SiF4 gas deposition, ECR-PECVD (Electron Cyclotron Resonance-Plasma Enhancement Chemical Vapor Deposition), VHF (Very High Frequence) deposition or HW- It may be formed using a Hot Wire-Chemical Vapor Deposition (CVD) method.

Subsequently, as shown in FIG. 8C, a metal having excellent conductivity is formed on the lower substrate 109 on which the active layer 112 is formed, and the source / side is formed on both sides of the active layer 112 using photo printing and etching. Drain electrodes 105a and 105b and data lines 103 are formed. Although not shown, impurities are implanted into the surface of the active layer 112 to reduce contact resistance with the source / drain electrodes 105a and 105b. An impurity region may be further formed between the active layer 112 and the source / drain electrodes 105a and 105b.

 In this case, the first bus line 108a may be formed in the circuit unit 200 at the same time as the drain electrode 105b.

In addition, as shown in FIG. 8D, the second gate insulating layer 111b is formed on the lower substrate 109 on which the source / drain electrodes 105a and 105b are formed by using a silicon nitride film or a silicon oxide film, and photo printing is performed. And removing the second gate insulating layer 111b to expose a predetermined portion of the drain electrode 105b and the gate line 101 of the circuit unit 200 by an etching method.

As shown in FIG. 8E, a transparent conductive metal such as ITO is formed on the entire surface of the lower substrate 109 on which the second gate insulating layer 111b is formed, and the pixel portion 100 is formed by photo printing and etching. Forming a pixel electrode 108 electrically connected to the drain electrode 105b at the second bus line, and a second bus line 108b electrically connected to the drain electrode 105b at the circuit unit 200, and an active layer 112. A second gate electrode 102b is formed on the second gate insulating layer 111b on the upper side of the second gate insulating layer 111b. In this case, the circuit part 200 may include the first bus line 108a or the second bus line 108b as necessary. It is not necessary to form.

Finally, although not shown, a first alignment layer is formed on the pixel electrode 108, a black matrix is formed on the upper substrate facing the lower substrate 109, and the black matrix is formed on the color filter. Forming a common electrode on the color filter, forming a second alignment layer on the common electrode, forming a spacer for maintaining a cell gap between the two substrates, and forming a seal on the edges of the two substrates. After the liquid crystal is injected, the liquid crystal is injected between the two substrates. The liquid crystal display device manufacturing method according to the present invention has a bottom gate type having a structure in which the microcrystalline silicon is the active layer 112 through one manufacturing process. The pixel thin film transistor 107a and the top gate circuit thin film transistor 107b may be simultaneously formed to maximize the performance of the thin film transistor.

 As described above, the liquid crystal display of the present invention and the manufacturing method thereof have the following effects.

The liquid crystal display of the present invention and a method of manufacturing the same are formed by simultaneously forming a bottom gate type pixel thin film transistor having a structure having a microcrystalline silicon as an active layer and a top gate type circuit thin film transistor through a single thin film transistor manufacturing process. Can maximize the performance.

Claims (8)

delete delete delete A first gate electrode and a transmitted light shield respectively formed in the pixel portion and the circuit portion of the substrate; A first gate insulating film formed on an entire surface of the substrate including the first gate electrode and a transmitted light shield; An active layer formed on the first gate insulating film using microcrystalline silicon, Source / drain electrodes formed on both sides of the active layer, a second gate insulating film formed on the substrate on which the source / drain electrodes are formed; A pixel electrode and a bus line electrically connected to the drain electrode and respectively formed in the pixel portion and the circuit portion on the second gate insulating layer; And a second gate electrode formed simultaneously with the pixel electrode and the bus line and formed on the second gate insulating layer above the active layer. The method of claim 4, wherein And the second gate electrode is electrically connected to a gate line of the circuit unit. The method of claim 4, wherein And the first gate electrode and the transmitted light shield are made of a material having high light reflectivity or light absorption. Forming a first gate electrode and a transmitted light shield on the pixel portion and the circuit portion on the substrate, respectively; Forming a first gate insulating film using a silicon nitride film or a silicon oxide film on an entire surface of the substrate on which the gate electrode is formed; forming a active layer in an island shape using micro crystalline silicon on the first gate insulating film; Forming a source / drain electrode on both sides of the active layer; Forming a second gate insulating film on the entire surface of the substrate including the source / drain electrodes; A pixel electrode and a bus line electrically connected to the drain electrode and formed on the second gate insulating film of each of the pixel portion and the circuit portion by dividing the substrate into a pixel portion and a circuit portion, and at the same time as the pixel electrode and above the active layer of the circuit portion. And forming a second gate electrode on the second gate insulating film. The method of claim 7, wherein And an output bus line is formed on the circuit part at the same time as the drain electrode.

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