KR100553840B1 - Method for manufacturing thin copper film for printed circuit board - Google Patents
Method for manufacturing thin copper film for printed circuit board Download PDFInfo
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- KR100553840B1 KR100553840B1 KR1020030034371A KR20030034371A KR100553840B1 KR 100553840 B1 KR100553840 B1 KR 100553840B1 KR 1020030034371 A KR1020030034371 A KR 1020030034371A KR 20030034371 A KR20030034371 A KR 20030034371A KR 100553840 B1 KR100553840 B1 KR 100553840B1
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- copper foil
- printed circuit
- copper
- circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D1/00—Electroforming
- C25D1/04—Wires; Strips; Foils
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/56—Electroplating: Baths therefor from solutions of alloys
- C25D3/58—Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of copper
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
- C25D5/611—Smooth layers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electroplating And Plating Baths Therefor (AREA)
- Electroplating Methods And Accessories (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
본 발명은 인쇄회로기판에 적층되어 각종 회로망을 형성하는 동박에 관한 것으로, 산성 전기분해욕에 있어 동박을 음극으로하고 한계전류밀도 부근에서 전기분해하여 동박의 피접착면 볼록부(11) 또는 평활면에 동전착물(12)로 된 조화처리층을 형성하는 인쇄회로기판용 동박의 제조 방법에 있어서, 전기분해욕 중에 분자량 2000이상의 무기폴리음이온을 더 첨가함으로서, 동박 피접착면의 접촉면적이 상대적으로 증대되어 절연기판과의 접착성 및 내열성이 향상될 뿐만 아니라, 동박과 수지기판의 접착강도가 항상 일정하게 유지되어 전기적 특성 및 내산성이 향상됨은 물론 동분의 떨어짐 현상이 최소화되게 한 것이다.The present invention relates to a copper foil laminated on a printed circuit board to form a variety of circuits, in an acidic electrolysis bath, the copper foil as a cathode and electrolyzed near the limit current density to smooth the convex portion 11 or smooth surface of the copper foil. In the manufacturing method of the copper foil for printed circuit boards which form the roughening process layer of the coin complex 12 on the surface, the contact area of the copper foil to-be-adhered surface is added by adding an inorganic polyanion more than molecular weight 2000 or more to an electrolysis bath. In addition, the adhesive strength and heat resistance of the insulating substrate are increased, and the adhesive strength of the copper foil and the resin substrate is constantly maintained so that the electrical properties and acid resistance are improved as well as the fall of copper is minimized.
동박, 볼록부, 동전착물, 무기폴리음이온Copper Foil, Convex, Coin Complex, Inorganic Polyanion
Description
도 1은 일반적인 기술에 따른 동박의 볼록부를 도시한 전자현미경 사진, 1 is an electron micrograph showing a convex portion of a copper foil according to a general technique,
도 2는 종래 기술에 따른 동박의 볼록부에 동전착물이 전착된 상태를 도시한 전자현미경 사진,2 is an electron micrograph showing a state in which the complex is electrodeposited on the convex portion of the copper foil according to the prior art,
도 3은 본 발명에 따른 동박의 볼록부에 동전착물이 전착된 상태를 도시한 전자현미경 사진이다3 is an electron micrograph showing a state in which the complex is electrodeposited on the convex portion of the copper foil according to the present invention.
* 도면 중 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
11 : 볼록부 12 : 동전착물11 convex portion 12: coin complex
본 발명은 인쇄회로기판에 적층되어 각종 회로망을 형성하는 동박에 관한 것으로, 특히 동박의 표면적을 증대하여 접착강도를 증대시킴은 물론 전기적 특성을 향상시킬 수 있도록 된 인쇄회로기판 용 동박의 제조 방법에 관한 것이다. The present invention relates to a copper foil laminated on a printed circuit board to form various circuits, and more particularly, to a method for manufacturing a copper foil for a printed circuit board which can increase the surface area of the copper foil to increase the adhesive strength as well as to improve the electrical properties. It is about.
일반적으로, 인쇄회로기판은, 전기장치나 전자통신장비 등의 정밀제어회로로 이용되는 전장품으로서, 합성수지 등과 같은 절연기판의 일면 또는 양면에 동박을 통해 회로망을 배선한 후 기판상에 IC 또는 전자부품 등을 배치하고 이들간을 전기적으로 배선하고 절연체로 코팅하여 제조된다.In general, a printed circuit board is an electronic device used for precision control circuits such as electric devices and electronic communication equipments. After wiring a network through copper foil on one or both sides of an insulating board such as a synthetic resin, an IC or an electronic component is mounted on a board. It is manufactured by arranging lamps, electrically wiring them, and coating them with an insulator.
또한, 인쇄회로기판을 다층으로 구성하려는 경우, 절연기판상에 고온고압하에서 동박을 적층하고 회로패턴을 스크린 인쇄하고, 이를 염화제2동 용액 등으로 에칭하여 회로망을 형성한 후, 동박의 표면을 조화처리층을 형성한 다음, 반도체장치 등의 소자를 탑재하여 구성한다. In addition, in the case where a printed circuit board is to be formed in a multilayer, copper foil is laminated on an insulating substrate under high temperature and high pressure, screen printed circuit patterns, and then etched with a copper chloride solution or the like to form a network, and then the surface of the copper foil is After the roughening layer is formed, elements such as semiconductor devices are mounted.
이때, 인쇄회로기판용 동박은, 그 피접착면에 다수개의 돌기상의 동전착물로 된 조화처리층을 형성하여 표면적을 최대한 증대시킴으로써, 예컨대 절연기판과 접착성능 즉, 고온가열, 습식처리, 용접, 약품처리 등의 과정에서도 충분한 접착 강도가 유지 되어야 하는 조건이 충족되어야 한다.At this time, the copper foil for a printed circuit board is formed on the surface to be bonded to form a roughened layer of a plurality of protrusions of the coin complex to increase the surface area as much as possible, for example, insulation substrate and adhesive performance, that is, high temperature heating, wet treatment, welding, In the process of chemical treatment, the conditions that sufficient adhesive strength should be maintained must be met.
따라서, 도 1과 도 2에서와 같이, 동박의 접착강도를 증대시키기 위한 수단으로, 동박에 산 모양의 볼록부(11)가 형성된 경우 볼록부(11)에 동전착물(12)을 전착하거나, 동박에 산 모양의 볼록부(11)가 없는 경우 동박의 평활면에 동전착물 (12)을 전착하여 조화처리 층을 형성하는 것이다.Therefore, as shown in FIGS. 1 and 2, as a means for increasing the adhesive strength of the copper foil, when the mountain-
그런데, 동전기분해욕에서, 볼록부(11)에 동전착물(12)로 된 조화처리층을 형성한 결과, 도 2에서와 같이, 볼록부(11)의 산과 골을 따라 넓은 범위에 걸쳐 동전착물(12)이 혼재된 상태로 전착되므로, 동박에서 수지기판과의 접착면이 감소되어 절연기판과의 접착성능이 저하되어 떨어질 우려가 있는 문제점이 있었다.However, in the electrokinetic decomposition bath, as a result of forming the roughened layer of the
한편, 동박의 볼록부(11)에 동전착물(12)을 형성하는 방법으로, 일본 특공 소(54-38053호)와 일본 특공 소(53-39327호)에서는, 전기분해 욕 중에 비소, 안티몬, 비스무스, 셀렌 등 주기표 6B족 원소를 포함하고 한계전류밀도 전후에서 전기분해한 기술이 제안된 바 있다. On the other hand, in the method of forming the
그런데, 전기분해 욕 중에 비소를 포함하는 경우, 전기분해 과정에서 동전착물 중에 비소가 일정량 포함되기 때문에 동박의 재생 및 그 밖의 처리 과정 또는 비소가 녹아 있는 에칭액을 처분하는 과정에서 비소로 인한 환경상 그리고 건강상 중대한 문제가 야기되는 단점이 있다. However, when arsenic is included in the electrolysis bath, since a certain amount of arsenic is contained in the coin complex in the electrolysis process, the environmental and health effects of arsenic during the regeneration and other processing of copper foil or the disposal of the etching solution in which arsenic is dissolved are used. There is a disadvantage that serious problems arise.
한편, 동박의 볼록부(11)에 동전착물(12)을 형성하는 방법으로, 일본 특공 소(56-411196호)의 벤조퀴놀린류를 미량 첨가한 욕을 사용하는 방법과, 일본 특공 소(62-56677호)의 몰리브덴이나 바나듐 또는 양자를 첨가한 욕을 사용하는 방법과, 일본 특개 평(6-169169호, 8-236930호)의 크롬, 텅스텐 또는 양자를 첨가한 욕을 사용하는 방법, 일본(특개 소 63017597호, 특개 소 58-164797호)의 펄스 도금하는 방법, 또는 바나듐, 아연, 철, 니켈, 코발트, 크롬 등을 포함시키는 것 등이 제안된 바 있다. On the other hand, as a method of forming the
그런데, 이들 방법들은 비소와 같은 독성원소를 포함하지 않아 환경상 및 건강상에 악영향을 끼치지 않는다는 장점은 있으나, 동박에 형성된 볼록부(11)의 산과 골에 전착물(12)이 혼재되어 전착되므로, 절연기판과의 접착강도가 저하되어 동전착물(12)이 이탈될 우려가 있었다.By the way, these methods do not contain toxic elements such as arsenic does not adversely affect the environment and health, but the
이에, 본 발명은 상기한 바와 같은 제 문제점을 해결하기 위하여 안출된 것으로서, 동박의 표면적을 증대하여 절연기판과의 접착강도를 향상시킴은 물론 인쇄회로기판의 전기적 특성을 향상시킬 수 있도록 된 인쇄회로기판용 동박의 제조 방법을 제공하는 데에 그 목적이 있다. Accordingly, the present invention has been made to solve the above problems, the printed circuit to increase the surface area of the copper foil to improve the adhesive strength with the insulating substrate as well as to improve the electrical characteristics of the printed circuit board. The objective is to provide the manufacturing method of the copper foil for board | substrates.
상기한 바와 같은 목적을 달성하기 위한 본 발명은, 산성 전기분해욕 중에 동박을 음극으로 하고 한계전류밀도 부근에서 전기분해하여 동박의 볼록부 또는 평활면에 동전착물로 된 조화처리층을 형성하는 인쇄회로기판용 동박의 제조 방법에 있어서, 전기분해욕의 도금이온 중에 텅스텐을 함유하는 분자량 2000 이상의 무기폴리음 이온을 더 첨가하거나 또는 전기분해욕의 도금이온 중에 선택된 텅스텐 원소와 인을 함유하는 분자량 2000 이상의 무기 폴리음이온을 더 첨가하거나 또는 전기분해욕의 도금이온 중에 선택된 텅스텐 원소와 규소를 함유하는 분자량 2000 이상의 무기 폴리음이온을 더 첨가한 것을 특징으로 한다.
The present invention for achieving the above object, the printing in which the copper foil as a cathode in an acidic electrolysis bath and electrolyzed near the limit current density to form a roughened layer of a coin complex on the convex portion or smooth surface of the copper foil. In the method for producing a copper foil for a circuit board, an inorganic polyanion ion having a molecular weight of 2000 or more containing tungsten is further added to the plating ion of the electrolysis bath, or a molecular weight 2000 containing tungsten element and phosphorus selected from the plating ion of the electrolysis bath. The above-mentioned inorganic polyanion is further added, or the inorganic polyanion having a molecular weight of 2000 or more containing tungsten element and silicon selected from the plating ions of the electrolysis bath is further added.
이하, 본 발명에 따른 실시 예들을 첨부된 예시도면을 참고로하여 상세하게 설명하면 다음과 같다. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 3은 본 발명에 따른 동박의 볼록부에 동전착물이 전착된 상태를 도시한 전자현미경 사진으로서, 산성전기분해욕 중에 동박을 음극으로 하고 한계전류밀도 부근에서 전기분해하여 동박의 볼록부(11) 또는 평활면에 동전착물(12)로 된 조화 처리층을 형성하는 인쇄회로기판용 동박의 제조 방법에 있어서, 전기분해욕의 도금이온 중에 텅스텐을 함유하는 분자량 2000 이상의 무기폴리음 이온을 더 첨가하거나 또는 전기분해욕의 도금이온 중에 선택된 텅스텐 원소와 인을 함유하는 분자량 2000 이상의 무기 폴리음이온을 더 첨가하거나 또는 전기분해욕의 도금이온 중에 선택된 텅스텐 원소와 규소를 함유하는 분자량 2000 이상의 무기 폴리음이온을 더 첨가한 것을 특징으로 한다.3 is an electron micrograph showing a state in which the complex is electrodeposited on the convex portion of the copper foil according to the present invention, wherein the copper foil is used as a cathode in an acidic electrolysis bath and electrolyzed near a limit current density to convex
먼저, 본 발명에 따른 산성전기분해욕 중에 포함되는 도금액 조성 및 도금 조건은 표 1과 같으므로 이에 대한 자세한 설명은 생략하기로 하고, 다만 도금용액 중에 첨가하던 비소를 대신하여 환경친화적인 분자량 2000 이상의 무기폴리음이온을 더 첨가한 것임을 첨언한다. First, the plating solution composition and plating conditions included in the acidic electrolysis bath according to the present invention are as shown in Table 1, and a detailed description thereof will be omitted, but instead of arsenic used in the plating solution, an environmentally friendly molecular weight of 2000 or more It is added that the inorganic polyanion was further added.
[표 1] 도금액 조성[Table 1] Plating Solution Composition
또한, 산성동전기분해욕 중에 무기폴리음이온을 더 첨가하여 조화 처리층을 형성한 결과, 도 3에서와 같이, 동박의 볼록부(11)에 동전착물(12)이 전착되는 과정에서 핵 발생이 억제됨은 물론 덴드라이트 조직의 발달이 억제되어 입자의 형태가 둥근 모양으로 형성되었다. In addition, as a result of further adding an inorganic polyanion in the acidic copper electrolysis bath to form a roughened layer, as shown in FIG. 3, nucleation is suppressed in the process of depositing the
또한, 무기폴리음이온의 공급원으로써, 파라 텅스텐산, 메타 텅스텐산12-인 텅스텐산, 혹은 12-몰리브덴 텅스텐산이나 이들의 나트륨염이나 암모늄염 등의 사용이 가능하다. 이때, 무기폴리음이온은 동전기분해욕 중의 도금이온중에 농도비로 0.001 ~ 5g/ℓ가 적당하고, 바람직하게는 0.01 ~ 2g/ℓ가 적당하다. In addition, as a source of the inorganic polyanion, it is possible to use paratungstic acid, metatungstic acid 12-phosphorous tungstic acid, or 12-molybdenum tungstic acid, sodium salts or ammonium salts thereof. At this time, the inorganic poly anion is suitably in a concentration ratio of 0.001 to 5 g / l, preferably 0.01 to 2 g / l, in the plating ion in the electrolytic decomposition bath.
물론, 본 발명은 동박의 외표면에 볼록부(11)가 형성된 것에 적용시킬 수도 있지만, 동박의 외표면에 볼록부(11)가 형성되지 않은 전기분해동박이나 압연동박 등에도 적용시킬 수 있음은 당연하다. Of course, the present invention can also be applied to the
이하, 본 발명에 따른 실시예와 비교예를 첨부된 예시도면을 참고로하여 상세하게 설명하면 다음과 같다. Hereinafter, with reference to the accompanying drawings, examples and comparative examples according to the present invention will be described in detail as follows.
[실시예 1] Example 1
황산동 5수염 100g/ℓ와 황산 200g/ℓ 및 메타 텅스텐산 나트륨 0.001 ~ 5g/ℓ를 포함한 30℃ 수용액을 전기분해욕으로 사용하여, 두께 35㎛ 전기 분해 동박의 피접착면에 전류밀도 20A/d㎡로 6초간 도금한 후, 동이온 50g/ℓ, 황산 100g/ℓ를 포함한 45℃ 전해액을 이용하고 전류밀도 20A/d㎡로 10초간 도금하였다. A current density of 20 A / d is applied to the adhered surface of a 35 µm thick electrolytic copper foil using a 30 ° C aqueous solution containing 100 g / l copper sulfate pentahydrate, 200 g / l sulfuric acid, and 0.001 to 5 g / l sodium metatungstate. After plating for 6 seconds at 2 m 2, plating was performed at a current density of 20 A / dm 2 for 10 seconds using a 45 ° C. electrolyte containing 50 g / l copper ions and 100 g / l sulfuric acid.
이어서, 실시예 1에 의해 얻어진 동박을 에폭시수지(미도시)에 가열 가압하여 동박적층판으로 제작한 다음, 동박과 수지의 접착강도를 UTM을 이용하여 측정함과 더불어 동분의 떨어짐 현상을 에칭 후 수지면을 광학현미경을 이용하여 관찰하였으며, 그 결과를 표 2에 나타내었다. Subsequently, the copper foil obtained in Example 1 was heated and pressurized to an epoxy resin (not shown) to produce a copper-clad laminate, and then the adhesive strength of the copper foil and the resin was measured using UTM, and the dropping of the copper powder was measured after etching. Was observed using an optical microscope, and the results are shown in Table 2.
이때, 동박과 수지의 접착강도를 10회에 걸쳐 측정한 결과, 그 평균값이 대략 2.25kgf/㎝ 정도로 매우 우수함을 알 수 있었으며, 동분의 떨어짐 현상이 없어 동전착물의 전착효율이 매우 향상됨을 알 수 있었다. At this time, as a result of measuring the adhesive strength of the copper foil and the resin ten times, the average value was found to be very good as about 2.25kgf / ㎝, there is no fall of copper powder, it can be seen that the electrodeposition efficiency of the complex is very improved. there was.
즉, 도 3에서와 같이, 동박의 볼록부(11)의 산부분에 집중적으로 균일한 크기의 동전착물(12)이 형성되므로, 에폭시수지(미도시)와의 접착면적이 도 2에 비해 크게 증대되어 접착성능이 향상됨을 추측할 수 있는 것이다.That is, as shown in Fig. 3, since the fused
또한, 산성 동전기분해욕 중에 메타 텅스텐산 나트륨이 0.001g/ℓ미만의 농도비로 첨가된 경우 접착강도의 증대에 따른 효과가 없었고, 에칭 후 동분 떨어짐 현상이 발생하였으며, 메타텅스텐산나트륨이 5.0g/ℓ이상의 농도비로 첨가된 조건에서는 접착강도의 증대 효과 이전에 경제적인 부담만이 증대됨을 알 수 있었다. In addition, when sodium metatungstate was added at a concentration ratio of less than 0.001 g / l in the acidic electrokinetic bath, there was no effect due to the increase in adhesive strength, copper powder dropped after etching, and sodium metatungstate 5.0g It was found that only the economic burden increased before the effect of increasing the adhesive strength under the conditions of the concentration ratio of / l or more.
[실시예 2]Example 2
황산동 5수염 100g/ℓ, 황산 200g/ℓ및 12-규소 텅스텐산 0.001 ~ 5g/ℓ를 포함한 30℃ 수용액을 전기 분해욕으로 사용하고, 두께 35㎛ 전기 분해 동박의 피접착면에 전류밀도 20A/d㎡로 6초간 도금한 후, 동이온 50g/ℓ, 황산 100g/ℓ를 포함한 45℃ 전해액을 이용하고, 20A/d㎡로 10초간 도금하였다.A 30 ° C aqueous solution containing 100 g / l copper sulfate pentahydrate, 200 g / l sulfuric acid, and 0.001 to 5 g / l 12-silicon tungstic acid was used as an electrolysis bath, and a current density of 20 A / After plating for 6 seconds at dm 2, plating was performed at 20 A / dm 2 for 10 seconds using a 45 ° C. electrolyte containing 50 g / l copper ions and 100 g / l sulfuric acid.
이어서, 실시예 2에 의해 얻어진 동박을 에폭시 수지에 가열 가압하여 동박적층판으로 제작한 다음, 동박과 수지(미도시)의 접착강도를 UTM을 이용하여 측정함과 더불어 동박의 에칭 후 수지면을 광학현미경을 이용하여 동분을 떨어짐 현상을 관찰하였으며, 그 결과를 표 2에 나타내었다. Subsequently, the copper foil obtained in Example 2 was heated and pressurized to an epoxy resin to produce a copper foil laminated plate, and then the adhesive strength of the copper foil and the resin (not shown) was measured using UTM, and the surface of the resin after etching the copper foil was measured by an optical microscope. Using copper was observed the fall off phenomenon, the results are shown in Table 2.
이때, 동박과 수지의 접착강도를 10회에 걸쳐 측정한 결과, 그 평균값이 대략 2.20kgf/cm 정도로 매우 우수함을 알 수 있었으며, 동분의 떨어짐 현상이 없어서 동전착물의 전착효율이 향상됨을 알 수 있었다. At this time, as a result of measuring the adhesive strength of the copper foil and the resin over 10 times, the average value was found to be very good as about 2.20kgf / cm, it was found that there is no falling of copper powder, the electrodeposition efficiency of the coin complex is improved. .
즉, 동박의 볼록부(11)의 산부분에 실시예 1과 비교하여 약간 작은 크기의 동전착물(12)이 균일하게 집중적으로 형성되므로, 에폭시수지(미도시)와의 접착면적이 도 2에 비해 크게 증대되어 수지기판과의 접착성능이 향상됨을 추측할 수 있는 것이다. That is, since the slightly larger sized
또한, 산성 동전기분해욕 중에 12-규소 텅스텐산이 0.001g/ℓ미만의 농도비로 첨가된 경우 접착강도의 증대에 따른 효과가 없었고, 에칭후의 동분 떨어짐 현상이 발생 하였으며, 12-규소 텅스텐산이 5.0g/ℓ이상의 농도비로 첨가된 조건에서는 접착강도의 증대효과 이전에 경제적인 부담만이 증대됨을 알 수 있었다. In addition, when 12-silicon tungstic acid was added at a concentration ratio of less than 0.001 g / l in the acidic electrokinetic bath, there was no effect of increasing the adhesive strength, and copper powder dropped after etching, and 5.0 g of 12-silic tungstic acid was generated. It was found that only the economic burden was increased before the effect of increasing the adhesive strength under the conditions of the concentration ratio of / l or more.
[비교예 1]Comparative Example 1
첨가물을 포함하지 않은 예로써 황산동 5수염 100g/ℓ, 황산 200g/ℓ를 포함한 30℃수용액을 전기 분해욕으로 사용하고, 두께 35㎛ 전기 분해 동박의 피접착면에 전류 밀도 20A/d㎡로 6초간 도금한 후, 동이온 50g/ℓ, 황산 100g/ℓ를 포함한 45℃ 전해액을 이용하고, 20A/d㎡로 10초간 도금하였다. As an example containing no additives, an aqueous solution of 30 ° C containing 100 g / l copper sulfate pentahydrate and 200 g / l sulfuric acid was used as an electrolysis bath, and the current density was 20 A / dm 2 at the adhered surface of the 35 µm thick electrolytic copper foil. After plating for a second, the plating was carried out at 20 A / dm 2 for 10 seconds using a 45 ° C. electrolyte containing 50 g / l of copper ions and 100 g / l of sulfuric acid.
이어서, 비교예 1에서 얻어진 동박을 에폭시수지에 가열 가압하여 동박적층판으로 제작한 다음, 동박과 수지의 접착강도를 UTM을 이용하여 측정함과 더불어 동분의 떨어짐을 에칭 후 수지면을 광학현미경을 이용하여 측정하였으며, 그 결과를 표 2에 나타내었다. Subsequently, the copper foil obtained in Comparative Example 1 was heated and pressurized to an epoxy resin to produce a copper-clad laminate, and then the adhesive strength of the copper foil and the resin was measured using UTM, and the drop of copper was etched after etching the resin surface using an optical microscope. It measured, and the result is shown in Table 2.
이때, 동박과 수지의 접착강도를 10회에 걸쳐 측정한 결과, 그 평균값이 대략 1.93kgf/cm 정도로 측정되어 실시예 1.2에 비하여 현저하게 저하되었음을 알 수 있었으며, 볼록부의 동전착물이 둥글게 되지 않고 침상 모양으로 형성되어 이로인해 동분의 떨어짐 현상이 발생되어 전착 효율이 저하됨을 알 수 있었다.At this time, as a result of measuring the adhesive strength of the copper foil and the resin 10 times, the average value was measured about 1.93kgf / cm was found to be significantly reduced compared to Example 1.2, the convex portion of the coin complex is not rounded It was found that the fall of the copper powder caused by the shape caused by this, the electrodeposition efficiency is reduced.
[비교예 2]Comparative Example 2
황산동 5수염 100g/ℓ, 황산 200g/ℓ 및 비산 3g/ℓ를 포함한 30℃수용액을 전기 분해욕으로 사용하고, 두께 35㎛ 전기 분해 동박의 피접착면에 전류 밀도 20A/d㎡로 6초간 도금한 후, 동이온 50g/ℓ, 황산 100g/ℓ를 포함한 45℃ 전해액을 이용하고, 20A/d㎡로 10초간 도금하였다. A 30 ° C aqueous solution containing 100 g / l copper sulfate pentahydrate, 200 g / l sulfuric acid, and 3 g / l arsenic acid was used as an electrolysis bath, and plated on the adhered surface of a 35 µm thick electrolytic copper foil with a current density of 20 A / dm 2 for 6 seconds. After that, plating was performed at 20 A / dm 2 for 10 seconds using a 45 ° C. electrolyte containing 50 g / l of copper ions and 100 g / l of sulfuric acid.
이어서, 비교예 2에서 동박을 에폭시수지에 가열 가압하여 동박적층판으로 제작한 다음, 동박과 수지의 접착강도를 UTM을 이용하여 측정함과 더불어 동분의 떨어짐을 에칭 후 수지면을 광학현미경을 이용하여 측정하였으며, 그 결과를 표 2에 나타내었다.Subsequently, in Comparative Example 2, the copper foil was heated and pressurized to an epoxy resin to prepare a copper-clad laminate, and then the adhesive strength of the copper foil and the resin was measured using UTM, and the fall of copper was measured using an optical microscope. The results are shown in Table 2.
이때, 동박과 수지의 접착강도를 10회에 걸쳐 측정한 결과, 그 평균값이 대략 2.21kgf/cm 정도로서 실시예 1.2와 비슷하였고 동분의 떨어짐 현상이 발생되지 않아 전착효율이 양호하였지만, 비소가 100ppm정도 포함되어 환경상 그리고 건강상 악역향을 끼침을 알 수 있었다. At this time, the adhesive strength of the copper foil and the resin was measured 10 times, and the average value was about 2.21kgf / cm, which is similar to Example 1.2, and copper powder did not occur, and electrodeposition efficiency was good, but arsenic was about 100 ppm. It was found to have adverse environmental and health effects.
따라서, 산성 전기분해욕 중에 분자량 2000 이상의 무기폴리음이온을 더 첨가하여 동전착물로 된 조화처리층을 형성하므로써, 동박의 피접착면에 전착되는 동전착물(12)이 도 3에서와 같이 입자가 둥근 형태로 형성되어 동박의 표면적이 상대적으로 증대되었음을 알 수 있었다. Therefore, by further adding an inorganic polyanion having a molecular weight of 2000 or more in the acidic electrolysis bath to form a roughened layer of coin complex, the
[표 2] 동박의 특성 측정 결과 [Table 2] Property measurement result of copper foil
이상에서 설명한 바와 같이 본 발명에 따른 인쇄회로기판용 동박의 제조 방법에 의하면, 동박의 피접착면에 둥근형태의 동전착물로 된 조화처리층이 형성되므로써, 동박 피접착면의 접촉면적이 상대적으로 증대되어 절연기판과의 접착성 및 내열성이 향상될 뿐만 아니라, 동박과 수지기판의 접착강도가 항상 일정하게 유지되어 전기적 특성 및 내산성이 향상됨은 물론 동분의 떨어짐 현상이 최소화되는 효과가 있는 것이다. As described above, according to the manufacturing method of the copper foil for printed circuit board according to the present invention, since the roughened layer of the round coin-formed body is formed on the to-be-bonded surface of the copper foil, the contact area of the to-be-bonded surface of copper foil is relatively In addition, the adhesive strength and heat resistance of the insulating substrate are increased, and the adhesive strength of the copper foil and the resin substrate is always kept constant, thereby improving electrical characteristics and acid resistance and minimizing the dropping of copper.
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JP (1) | JP2007501330A (en) |
KR (1) | KR100553840B1 (en) |
CN (1) | CN1795704A (en) |
WO (1) | WO2004107833A1 (en) |
Families Citing this family (7)
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KR20110126128A (en) * | 2009-03-27 | 2011-11-22 | 제이엑스 닛코 닛세키 킨조쿠 가부시키가이샤 | Copper foil for printed wiring board and method for producing same |
US20130189538A1 (en) * | 2010-09-24 | 2013-07-25 | Jx Nippon Mining & Metals Corporation | Method of manufacturing copper foil for printed wiring board, and copper foil printed wiring board |
CN102548202B (en) * | 2010-12-08 | 2014-09-03 | 金居开发铜箔股份有限公司 | Roughly-processed copper foil and manufacture method thereof |
EP2660359A4 (en) * | 2011-07-29 | 2015-08-05 | Furukawa Electric Co Ltd | Electrolytic copper alloy foil, method for producing same, electrolytic solution used for production of same, negative electrode collector for secondary batteries using same, secondary battery, and electrode of secondary battery |
WO2013065699A1 (en) * | 2011-10-31 | 2013-05-10 | 古河電気工業株式会社 | High strength, high heat-resistance electrolytic copper foil, and manufacturing method for same |
JP5406905B2 (en) * | 2011-11-16 | 2014-02-05 | ナン ヤ プラスティクス コーポレーション | A method for producing a copper foil for a printed circuit board comprising a fine granular surface that has high peel strength and is environmentally friendly. |
WO2014119583A1 (en) * | 2013-01-29 | 2014-08-07 | 古河電気工業株式会社 | Electrolytic copper foil, battery current collector comprising said electrolytic copper foil, electrode obtained using said current collector for secondary battery, and secondary battery obtained using said electrode |
Family Cites Families (10)
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KR840001643B1 (en) * | 1981-04-03 | 1984-10-12 | 후루가와 서킷트 호일 가부시끼 가이샤 | Copper foil for a printed circuit |
US4387006A (en) * | 1981-07-08 | 1983-06-07 | Fukuda Metal Foil & Powder Co., Ltd. | Method of treating the surface of the copper foil used in printed wire boards |
KR930007925B1 (en) * | 1991-09-16 | 1993-08-21 | 덕산금속 주식회사 | Copper or copper alloy and surface treatment method for plating the same |
JPH07138794A (en) * | 1993-11-10 | 1995-05-30 | Japan Energy Corp | Copper foil having zinc-silica multiple coating film and its production |
JP3238278B2 (en) * | 1994-04-12 | 2001-12-10 | 株式会社日鉱マテリアルズ | Manufacturing method of electrolytic copper foil |
JP3329572B2 (en) * | 1994-04-15 | 2002-09-30 | 福田金属箔粉工業株式会社 | Copper foil for printed circuit and surface treatment method thereof |
US6497806B1 (en) * | 2000-04-25 | 2002-12-24 | Nippon Denkai, Ltd. | Method of producing a roughening-treated copper foil |
GB2361713B (en) * | 2000-04-14 | 2003-09-24 | Fukuda Metal Foil Powder | Method for surface treatment of copper foil |
JP3709142B2 (en) * | 2001-01-19 | 2005-10-19 | 福田金属箔粉工業株式会社 | Copper foil for printed wiring board and method for producing the same |
KR100389061B1 (en) * | 2002-11-14 | 2003-06-25 | 일진소재산업주식회사 | Electrolytic copper foil and process producing the same |
-
2003
- 2003-05-29 KR KR1020030034371A patent/KR100553840B1/en active IP Right Grant
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2004
- 2004-04-16 CN CNA2004800145772A patent/CN1795704A/en active Pending
- 2004-04-16 WO PCT/KR2004/000883 patent/WO2004107833A1/en active Application Filing
- 2004-04-16 JP JP2006532035A patent/JP2007501330A/en active Pending
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WO2004107833A1 (en) | 2004-12-09 |
JP2007501330A (en) | 2007-01-25 |
KR20040102768A (en) | 2004-12-08 |
CN1795704A (en) | 2006-06-28 |
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