KR100553831B1 - Temperature-sensing and providing circuit in semiconductor memory device - Google Patents

Abstract

A temperature sensing output circuit of a semiconductor memory device is posted. The temperature sensing output circuit of the present invention has a built-in output control fuse for controlling whether or not to output information about the internal temperature of the semiconductor memory device to the external system by its own cutting. In addition, a transmission control fuse for controlling whether or not to provide internal temperature information to an internal circuit such as a self refresh controller is also built in. The control fuses can be cut from the outside. Therefore, the temperature sensing output circuit of the present invention can be used in an external system for floating some or all of the output pads and an external system for receiving and using temperature information without providing a separate control signal. In addition, the temperature sensing output circuit of the present invention can also be used for products of which the number of temperature information used internally is different. Therefore, according to the temperature sensing output circuit of the present invention, an effect of remarkably reducing the manufacturing cost of a semiconductor memory device occurs.

Temperature, sensing, fuse, general purpose, manufacturing cost

Description

Temperature-sensing output circuit of semiconductor memory device {Temperature-Sensing and Providing Circuit in Semiconductor Memory Device}             

In order to more fully understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1 is a view showing conventional temperature sensing output circuits.

2 is a diagram illustrating a temperature sensing output circuit of a semiconductor memory device according to an exemplary embodiment of the present invention.

3A and 3B are diagrams specifically illustrating the first and second output control signal generators of FIG. 2, and FIG. 3C is a diagram specifically illustrating the transmission control signal generators of FIG. 2.

FIG. 4 is a diagram for describing a voltage change of the main signal of FIG. 3A in the power-up mode.

Explanation of symbols on the main parts of the drawings

110: temperature detection unit 120: transmission control unit

130: first output unit 140: second output unit

150: first output control signal generator

160: second output control signal generator

170: transmission control signal generator

PADA: first output pad PADB: second output pad

TEM45: first temperature detection signal TEM75: second temperature detection signal

CON1: first output control signal CON2: second output control signal

/ CONT: Transmission control signal

The present invention relates to a semiconductor memory device, and more particularly, to a temperature sensing output circuit of a semiconductor memory device that senses an internal temperature of a semiconductor memory device and provides information about the internal temperature to the outside.

The operating characteristics of the semiconductor devices embedded in the semiconductor memory device depend on temperature. In order to properly compensate for the difference in characteristics according to the temperature of the semiconductor elements, a temperature sensing output circuit is embedded in the semiconductor memory device. The temperature sensing output circuit senses the internal temperature and provides the internal circuits or the external system with information about the sensed internal temperature. A typical example of such internal circuits is a self refresh controller, and a typical example of an external system is a memory cell controller. Self-refresh controller is a circuit that controls the refresh cycle of the built-in memory cell. The memory cell controller may be configured to control auto refresh by receiving information of the sensed internal temperature through an output pad of the semiconductor memory device.

1A to 1E, conventional temperature sensing output circuits are shown, showing that various types of temperature sensing output circuits are used depending on the specifications of external systems or internal circuits being interfaced. In the temperature sensing output circuit of FIG. 1A, the temperature sensing unit 11 senses a high and low temperature of the internal temperature based on one reference temperature, for example, 45 ° C., and outputs the temperature sensing signal TEM45 to the self-refresh controller ( 80) and output pad (PADA). In the temperature sensing output circuit shown in FIG. The detection signal TEM75 is provided to the self refresh controller 80 and the output pads PADA and PADB.

According to the temperature sensing output circuit of FIG. 1C, one temperature sensing signal TEM45 provided from the temperature sensing unit 31 is provided to the self refresh controller 80. The output pad PADA receives or floats the temperature sensing signal TEM45 under the control of the test control signal TMRS. Two temperature sensing signals TEM45 and TEM75 provided by the temperature sensing units 41 and 51 of FIGS. 1D and 1E are provided to the self refresh controller 80. The output pad PADA or the output pad PADB receives or floats the temperature sensing signals TEM45 and TEM75 under the control of the test control signal TMRS.

However, in the temperature sensing output circuits of FIGS. 1A and 1B, a signal including information on an internal temperature is always output to an output pad. Therefore, the temperature sensing output circuit of Figs. 1A and 1B is not applicable to a product that floats all or part of the output pads. In addition, in the temperature sensing output circuit of FIGS. 1C to 1E, a separate control signal such as a test control signal TMRS should be provided. Therefore, the temperature sensing output circuit of FIGS. 1C to 1E cannot be applied in a product or an operation mode in which a separate control signal is not provided.

Therefore, the conventional temperature sensing output circuits shown in Figs. 1A to 1E can be applied only to a specific product, and there is a limit to the general application of various products. That is, even in a semiconductor memory device having the same specification, different temperature sensing output circuits should be built in according to the external system to be interfaced. This increases the number of products produced for semiconductor memory devices of the same specification, resulting in a problem of increasing manufacturing costs due to an increase in mask cost and the like.

SUMMARY OF THE INVENTION An object of the present invention is to improve the problems of the prior art, and is widely used in an external system that floats some or all of the output pads and an external system that receives and uses temperature information without providing a separate control signal. The present invention provides a temperature sensing output circuit of a semiconductor memory device that can reduce manufacturing costs.

One aspect of the present invention for achieving the above technical problem relates to a temperature sensing output circuit of a semiconductor memory device. According to an aspect of the present invention, a temperature sensing output circuit includes a temperature sensing unit, an output pad, an output unit, and an output control signal generator. The temperature sensing unit senses an internal temperature of the semiconductor memory device and generates a temperature sensing signal indicating that the internal temperature of the semiconductor memory device reaches a predetermined reference temperature. The output pad may output temperature information inside the semiconductor memory device included in the temperature sensing signal to the outside. The output unit transmits the temperature information to the output pad, and blocks transmission to the output pad in response to activation of a predetermined output control signal. The output control signal generator includes an output control fuse capable of cutting or connecting by a predetermined energy. And the activation of the output control signal is controlled by cutting or connecting the output control fuse.

Preferably, the output control signal generator comprises the output control fuse, output control terminal, pull-down transistor, pull-up transistor and latch means. The pull-down transistor is formed between a predetermined pull-down voltage and the output control terminal, and pulls down the voltage of the output control terminal toward the pull-down voltage. The pull-up transistor is formed between a predetermined pull-up voltage and the output control terminal. The pull-up transistor pulls up the voltage of the output control terminal toward the pull-up voltage, and the pull-up of the output control terminal is blocked by cutting the output control fuse. The latch means latches the logic state of the output control terminal being pulled down, and generates the output control signal that is activated in response to the logic state of the output control terminal being latched.

Another aspect of the present invention for achieving the above technical problem relates to a temperature sensing output circuit of a semiconductor memory device. According to another aspect of the present invention, a temperature sensing output circuit includes a temperature sensing unit, a transmission control unit, and a transmission control signal generator. The transfer control unit provides temperature information inside the semiconductor memory device included in the temperature sensing signal to a predetermined self refresh controller and the output pad, and blocks the provision of the temperature information in response to a predetermined transfer control signal. The self refresh controller controls a self refresh cycle of the semiconductor memory device in response to the temperature detection signal. The transmission control signal generator includes a transmission control fuse which can be cut or connected by a predetermined energy, and the activity of the transmission control signal is controlled by cutting or connecting the transmission control fuse.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings. In understanding the drawings, it should be noted that like parts are intended to be represented by the same reference numerals as much as possible.

Hereinafter, the temperature sensing output circuit of the present invention will be described in detail with reference to the accompanying drawings.

2 is a diagram illustrating a temperature sensing output circuit of a semiconductor memory device according to an exemplary embodiment of the present invention. In FIG. 2, the temperature sensing unit 110, the transmission control unit 120, the first and second output units 130 and 140, the first and second output control signal generators 150 and 160, and the transmission control signal generation The unit 170 and the first and second output pads PADA and PADB are shown.

The temperature sensing unit 110 senses an internal temperature of the semiconductor memory device and generates first and second temperature sensing signals TEM45 and TEM75. The first temperature detection signal TEM45 represents information on the height of the internal temperature of the semiconductor memory device on the basis of the first reference temperature (45 ° C in this embodiment). For example, when the internal temperature of the semiconductor memory device increases to reach 45 ° C., the logic state of the first temperature detection signal TEM45 transitions to “H (high)”. When the internal temperature of the semiconductor memory device decreases to reach 45 ° C., the first temperature detection signal TEM45 transitions back to logic “L (low)”. Therefore, when the logic state of the first temperature detection signal TEM45 is "H", it means that the internal temperature of the semiconductor memory device is higher than 45 ° C, and the logic state of the first temperature detection signal TEM45 is "L". ", It means that the internal temperature of the semiconductor memory device is lower than 45 ℃.

In the same manner, the second temperature detection signal TEM75 indicates information on the height of the internal temperature of the semiconductor memory device based on the second reference temperature (75 ° C in this embodiment).

Since the implementation of the temperature sensing unit 110 is obvious to those skilled in the art, a detailed description thereof will be omitted herein.

The first temperature detection signal TEM45 is provided to the self refresh controller 80 that is embedded in the semiconductor memory device. Then, the refresh cycle of the semiconductor memory device is adjusted according to the height of the internal temperature of the semiconductor memory device with respect to 45 ° C. In addition, the first temperature detection signal TEM45 is also provided to the first output unit 130.

The first output unit 130 is controlled by the first output control signal CON1 provided by the first output signal generator 150. When the first output control signal CON1 is a logic "L", the first output unit 130 is enabled, so that the information on the internal temperature of the semiconductor memory device included in the first temperature detection signal TEM45. Is provided to the first output pad (PADA). In the present embodiment, when the first output control signal CON1 is the logic "L", the signal of the output terminal OUT1 of the first output unit 130 transmitted to the first output pad PADA is the above. The first temperature detection signal TEM45 has an inverted logic state.

On the other hand, in a state in which the first output control signal CON1 is activated with a logic "H", the output terminal OUT1 of the first output unit 130 connected to the first output pad PADA is connected to the first output control signal CON1. 1 Float regardless of the logic state of the temperature detection signal TEM45. Specifically, in the state where the first output control signal CON1 is activated with logic "H", the output signal N132 of the OR gate 131 is logic "H", and the logical product NAN. The output signal N134 of the gate 133 is a logic "L". Accordingly, the two transistors 135 and 137 that pull up and pull down the signal of the output terminal OUT1 of the first output unit 130 are both turned off.

The first output pad PADA is floated.

3A is a circuit diagram illustrating in detail the first output signal generator 150 of FIG. 2. Referring to FIG. 3A, the first output signal generator 150 includes an output control fuse FUSE1, an output control terminal N154, a pull-down transistor 151, a pull-up transistor 153, and a latch means 155. do.

In FIG. 3A, the output control fuse FUSE1 is a cutting fuse cut by energy such as a laser beam. Therefore, the output control fuse FUSE1 can be cut even after the wiring process in manufacturing the semiconductor memory device is completed.

In the pull-down transistor 151, a source / drain terminal is connected to the pull-down voltage (ground voltage VSS in this embodiment) and the output control terminal N154, and an inverted signal of the power voltage VCC is applied to the gate terminal. NMOS transistors. The pull-up transistor 153 has a source / drain terminal connected to an output control terminal N154 through a pull-up voltage (in this embodiment, the power supply voltage VCC) and the output control fuse FUSE1. A PMOS transistor to which an inverted signal of the power supply voltage VCC is applied. The latch means 155 latches the logic state "L" of the output control terminal N154 at the beginning of the power-up mode. In the present specification, the power-up mode is an operation mode for supplying a power supply voltage VCC by powering up a semiconductor memory device including the temperature sensing output circuit of the present invention.

FIG. 4 is a diagram illustrating a voltage change of the main signal of FIG. 3A in the power-up mode, and illustrates the case where the output control fuse FUSE1 is connected. In this case, the voltage of the output control terminal N154 in the initial stage of the power-up mode (section T1 in FIG. 4) is pulled down and held toward the ground voltage VSS by the pull-down transistor 151. In the T1 section, the pull-up transistor 153 is completely turned off. Thereafter, when the power supply voltage VCC rises to reach the late stage of the power-up mode (T2 section in FIG. 4), the pull-down transistor 151 is turned off and the pull-up transistor 153 is turned on. Therefore, the voltage of the output control terminal N154 is pulled up toward the power supply voltage VCC. Therefore, the logic state of the first output control signal CON1, which is the output signal of the first output control signal generator 150, is "L".

On the other hand, when the output control fuse FUSE1 is cut by a laser beam or the like, the connection of the output control terminal N154 and the pull-up transistor 153 is cut off, so that the pull-up of the output control terminal N154 is performed. Is blocked. The signal of the output control terminal N154 is latched by " L " by the latch means 155 irrespective of the supply of the power supply voltage VCC. Accordingly, the first output control signal CON1 maintains an activated state of "H".

As a result, while the power supply voltage VCC reaches the target voltage (VDD in FIG. 4), the logic state of the first output control signal CON1 is determined by cutting off the output control fuse FUSE1. do. Therefore, whether the output unit 130 (see FIG. 2) is enabled or not is also determined by whether the output control fuse FUSE1 is cut.

That is, when the output control fuse FUSE1 is connected, the signal of the output terminal OUT1 of the first output unit 130 transmitted to the first output pad PADA is the first temperature sensing signal ( TEM45) inverted logic state. On the other hand, when the output control fuse FUSE1 is cut, the output terminal OUT1 of the first output unit 130 connected to the first output pad PADA is the first temperature sensing signal TEM45. It is plotted regardless of the logic state of.

As described above, in the temperature information output circuit of the present invention, the output of the output pads PADA and PADB or the output of the internal temperature information is controlled by cutting the output control fuse FUSE1. Therefore, the semiconductor memory device to which the temperature information output circuit of the present invention is applied may be used in an external system for floating the output pad PADA and an external system for receiving and using temperature information without providing a separate control signal. Can be. Therefore, the cost of manufacturing a mask for a temperature information output circuit built in each conventional product can be significantly reduced.

Referring back to FIG. 2, the second temperature detection signal TEM75 provided by the temperature sensing unit 110 is provided to the transmission control unit 120. The transmission control unit 120 is controlled by the transmission control signal (/ CONT) provided from the transmission control signal generator 170, or not.

First, when the transmission control signal / CONT is a logic "H", the operation of the transmission control unit 120 is described. In this case, the transfer controller 120 is enabled to provide the self-refresh controller 80 with information about the internal temperature of the semiconductor memory device included in the second temperature detection signal TEM75. The self refresh controller 80 appropriately controls the refresh cycle of the semiconductor memory device on the basis of the height of the internal temperature of the semiconductor memory device with respect to 75 ° C. In this case, the information included in the second temperature detection signal TEM75 is also provided to the second output unit 140. The output terminal OUT2 of the second output unit 140 is connected to the second output pad PADB.

The configuration and operation of the second output unit 140 is almost the same as the first output unit 130. The configuration and operation of the second output control signal generator 160 are also substantially the same as the first output control signal generator 150 of FIG. 3A, as shown in FIG. 3B.

That is, when the output control fuse FUSE2 of FIG. 3B is connected, the second output unit 140 is included in the second temperature sensing signal TEM45 on the second output pad PADB. Provides information about the internal temperature of the device. On the other hand, when the output control fuse FUSE2 is cut, the output terminal OUT2 of the second output unit 140 connected to the second output pad PADB is the second temperature sensing signal TEM75. It is plotted regardless of the logic state of.

Since the configuration and other operational effects of the second output unit 140 and the second output control signal generator 160 are obvious to those skilled in the art, detailed description thereof will be omitted herein.

On the other hand, when the transmission control signal / CONT is activated with a logic "L", the transmission control unit 120 is disabled. Therefore, the information on the internal temperature of the semiconductor memory device included in the second temperature detection signal TEM75 is blocked from being provided to the self refresh controller 80.

3C is a circuit diagram illustrating in detail the transmission control signal generator 170 of FIG. 2. The configuration and effect of the transmission control signal generator 170 shown in FIG. 3C are substantially the same as the first output control signal generator 150 shown in FIG. 3A. However, the latch means 155 of the output control signal generator 150 of FIG. 3A inverts the logic state of the signal of the output control terminal N154 to be latched and provides it as the first output control signal CON1. The only difference is that the latch means 175 of the transmission control signal generator 170 non-inverts the logic state of the signal of the transmission control terminal N754 to be latched and provides the transmission control signal / CONT.

That is, the logic state of the transmission control signal / CONT when the power supply voltage VCC reaches the target voltage (VDD in Fig. 4) is similar to that of the first output control signal CON1. Preferably, it is determined by cutting of the transmission control fuse (FUSET). In addition, whether the transmission control unit 120 is enabled or not is also determined by whether the transmission control fuse (FUSET) is cut.

In other words, when the transfer control fuse FUSET is connected, information about the internal temperature of the semiconductor memory device included in the second temperature detection signal TEM75 is provided to the self refresh controller 80. On the other hand, when the transfer control fuse FUSET is cut off, the information on the internal temperature of the semiconductor memory device included in the second temperature detection signal TEM75 is blocked from being provided to the self-refresh controller 80. .

A semiconductor memory device to which a temperature information output circuit according to an embodiment of the present invention is applied includes a product for setting two reference temperatures of 45 degrees Celsius and 75 degrees Celsius separately in the self-refresh controller 80, and only 45 degrees Celsius. It can be used for products that are set to. Therefore, according to the temperature information output circuit of the present invention, the cost required for manufacturing the mask MASK for each product is remarkably reduced.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. For example, in the present specification, an example in which the output control fuse and the transmission control fuse are implemented as a cutting fuse cut by an external laser beam has been described. However, it is apparent to those skilled in the art that the technical features of the present invention can be implemented as an example in which a connection fuse connected by external energy such as a laser beam is used as an output control fuse and a transmission control fuse. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the temperature sensing output circuit of the present invention as described above, whether or not to enable the output unit for outputting information on the internal temperature of the semiconductor memory device to the external system is controlled by whether or not the output control fuse. Further, by cutting off the transmission control fuse, it is controlled whether or not to provide internal temperature information used in an internal circuit such as a self-refresh controller. Therefore, the temperature sensing output circuit of the present invention can be generalized to an external system for floating some or all of the output pads and an external system for receiving and using temperature information without providing a separate control signal. In addition, even in a product having a different number of sensed temperature information, the temperature sensing output circuit of the present invention can be generalized. Therefore, according to the temperature sensing output circuit of the present invention, the effect of reducing the manufacturing cost of the semiconductor memory device occurs.

Claims (5)

In a semiconductor memory device, A temperature sensing unit configured to sense an internal temperature of the semiconductor memory device and generate a temperature sensing signal indicating that an internal temperature of the semiconductor memory device reaches a predetermined reference temperature; An output pad configured to output temperature information inside the semiconductor memory device included in the temperature sensing signal to the outside; An output unit configured to transmit the temperature information to the output pad, and to block transmission to the output pad in response to activation of a predetermined output control signal; And A control signal generating unit including an output control fuse capable of cutting or connecting by a predetermined energy, wherein the output control signal generator for controlling the activity of the output control signal by cutting or connecting the output control fuse And a temperature sensing output circuit of the semiconductor memory device. The method of claim 1, wherein the output control signal generation unit The output control fuse; A predetermined output control terminal; A pull-down transistor formed between a predetermined pull-down voltage and the output control terminal, the pull-down transistor configured to pull down the voltage of the output control terminal toward the pull-down voltage; A pull-up transistor formed between a predetermined pull-up voltage and the output control terminal, wherein the pull-up voltage pulls up the voltage of the output control terminal toward the pull-up voltage, and the pull-up of the output control terminal is blocked by cutting the output control fuse; transistor; And And latching means for latching a logic state of the output control terminal being pulled down and generating the output control signal that is activated in response to the logic state of the output control terminal being latched. . In a semiconductor memory device, A temperature sensing unit configured to sense an internal temperature of the semiconductor memory device and generate a temperature sensing signal indicating that an internal temperature of the semiconductor memory device reaches a predetermined reference temperature; The self-refresh controller is a transfer control unit which provides temperature information inside the semiconductor memory device included in the temperature sensing signal to a predetermined self-refresh controller and blocks the provision of the temperature information in response to a predetermined transfer control signal. The transfer control unit controlling a self refresh period of the semiconductor memory device in response to the temperature sensing signal; And A control signal generation unit including a transmission control fuse capable of cutting or connecting by a predetermined energy, wherein the transmission control signal generation unit in which activity of the transmission control signal is controlled by cutting or connecting the transmission control fuse. And a temperature sensing output circuit of the semiconductor memory device. The method of claim 3, wherein An output pad configured to output temperature information inside the semiconductor memory device provided from the transmission control unit to the outside; An output unit configured to transmit the temperature information to the output pad, and to stop transmission to the output pad in response to activation of a predetermined output control signal; And A control signal generating unit including an output control fuse capable of cutting or connecting by a predetermined energy, wherein the output control signal generator for controlling the activity of the output control signal by cutting or connecting the output control fuse And a temperature sensing output circuit of the semiconductor memory device. The method of claim 3 or 4, wherein the transmission control signal generation unit The transmission control fuse; A predetermined transmission control terminal; A pull-down transistor formed between a predetermined pull-down voltage and the transmission control terminal, the pull-down transistor configured to pull down the voltage of the transmission control terminal toward the pull-down voltage; A pull-up transistor formed between a predetermined pull-up voltage and the transmission control terminal, wherein the pull-up voltage pulls up the voltage of the transmission control terminal toward the pull-up voltage, and the pull-up of the transmission control terminal is blocked by cutting the transmission control fuse; transistor; And And latching means for latching a logic state of the transfer control terminal being pulled down and generating the transfer control signal that is activated in response to the logic state of the transfer control terminal being latched. .

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