KR100553762B1 - Plasma display panel - Google Patents

Abstract

The present invention aims to stabilize the voltage of a plasma display panel.

In order to achieve the above object, the present invention provides a converter for outputting an input power source to a DC power source transformed at a predetermined transformer ratio by PWM control, a first capacitor for smoothing the DC power source at the output terminal of the converter, and both ends of the first capacitor. A power supply having a reference signal generator for detecting a voltage of the signal and outputting a reference signal for PWM control to the converter; And a driving unit including a driving circuit for driving the panel and a second capacitor connected to an input terminal of the driving circuit, wherein the reference signal generating unit

The present invention provides a plasma display panel characterized by further detecting a voltage across the second capacitor and outputting a reference signal for PWM control to the converter.

Description

Plasma display panel {Plasma display panel}

1 is a view showing the structure of a conventional three-electrode surface discharge plasma display panel.

FIG. 2 shows a typical driving apparatus of the plasma display panel shown in FIG. 1.

FIG. 3 illustrates a conventional address-display separation driving method for Y electrode lines as an example of the plasma display panel driving method of FIG. 1.

FIG. 4 is a timing diagram for explaining an example of a drive signal of the panel shown in FIG. 1.

5 is a diagram illustrating a power flow of a conventional plasma display panel.

6 is a view showing a power flow of the plasma display panel of the present invention.

7 is a block diagram schematically illustrating a plasma display panel of the present invention.

Explanation of symbols on the main parts of the drawings

501 ... Converter

503.Reference signal generator

505 ... Drive circuit

507.Driver

500 ... power supply

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel in which a voltage is stabilized.

1 is a view showing the structure of a conventional three-electrode surface discharge plasma display panel.

Referring to FIG. 1, between the front and rear glass substrates 100 and 106 of a conventional surface discharge plasma display panel 1, the address electrode lines A ₁ ,. A ₂ , ..., A _m ), Dielectric layers 102 and 110, Y electrode lines Y ₁ , ..., Y _n , X electrode lines X ₁ , ..., X _n , fluorescent layer 112, barrier rib 114, and As a protective layer, the magnesium monoxide (MgO) layer 104 is provided, for example.

Address electrode lines A ₁ , A ₂ , ..., A _m ) is formed in a predetermined pattern on the front side of the rear glass substrate 106. The lower dielectric layer 110 includes the address electrode lines A ₁ ,. A ₂ , ..., A _m ) is applied to the front. In front of the lower dielectric layer 110, barrier ribs 114 may include address electrode lines A ₁ ,. A ₂ , ..., A _m ) is formed in a direction parallel to. The partition walls 114 function to partition a predetermined area of each display cell and to prevent optical interference between each display cell. The fluorescent layer 112 is formed between the partition walls 114.

The X electrode lines X ₁ ,..., X _n and the Y electrode lines Y ₁ , ..., Y _n are the address electrode lines A ₁ ,. A ₂ , ..., A _m ) is formed in a predetermined pattern on the back of the front glass substrate 100 to be orthogonal to each other. Each intersection sets a corresponding display cell. Each X electrode line (X ₁ , ..., X _n ) and each Y electrode line (Y ₁ , ..., Y _n ) are transparent electrode lines (X _na ) made of a transparent conductive material such as indium tin oxide (ITO). , Y _na ) and metal electrode lines X _nb and Y _nb for increasing conductivity may be formed. The front dielectric layer 102 is formed by applying the entire surface to the rear of the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ ,..., Y _n ). A protective layer 104 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying a front surface to the back of the front dielectric layer 102. The plasma forming gas is sealed in the discharge space 108.

A driving scheme generally applied to such a plasma display panel is a method in which initialization, address, and display holding steps are sequentially performed in a unit sub-field. In the initialization step, the state of charge of the display cells to be driven becomes uniform. In the address step, the charge state of display cells to be selected and the charge state of display cells not to be selected are set. In the display holding step, the charge state of the display cells to be selected is set. In the display holding step, display discharge is performed in the display cells to be selected. At this time, a plasma is formed from the plasma forming gas of the display cells performing display discharge, and the fluorescent layer 112 of the display cells is excited by ultraviolet radiation from the plasma to generate light.

2 illustrates a general driving device of the plasma display panel of FIG. 1.

Referring to the drawings, a typical driving apparatus of the plasma display panel 1 includes an image processor 200, a controller 202, an address driver 206, an X driver 208, and a Y driver. The image processing unit 200 converts an external analog image signal into a digital signal to convert an internal image signal, for example, 8 bits of red (R), green (G), and blue (B) image data, a clock signal, vertical and Generate horizontal sync signals. The address driver 206 processes the address signal SA among the driving control signals SA, SY, and SX from the controller 202 to generate a display data signal, and generates the display data signal into the address electrode lines. To apply. The X driver 208 processes the X driving control signal SX among the driving control signals SA, SY, and SX from the controller 202 and applies the X driving control signal SX to the X electrode lines. The Y driving unit 204 processes the Y driving control signal SY among the driving control signals SA, SY, and SX from the control unit 202 and applies it to the Y electrode lines.

As a driving method of the plasma display panel 1 having the above-described structure, an address-display separation driving method mainly used is disclosed in US Pat. No. 5,541,618.

FIG. 3 is a view illustrating a conventional address-display separation driving method for Y electrode lines as an example of the plasma display panel driving method of FIG. 1.

Referring to the drawings, a unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Further, each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8, and a sustain discharge section S1, ..., S8. .

In each address section A1, ..., A8, a display data signal is applied to the address electrode lines and scan pulses corresponding to each of the Y electrode lines Y1, ..., Yn are sequentially applied.

In each sustain discharge section S1, ..., S8, pulses for display discharge alternately in the Y electrode lines Y1, ..., Yn and the X electrode lines X1, ..., Xn. Is applied to cause display discharge in discharge cells in which wall charges are formed in the address periods A1, ..., A8.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge sections S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield is kept different at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128 in turn. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be addressed and sustained and discharged during the subfield 1 period, the subfield 3 period, and the subfield 8 period.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. In addition, the number of sustain discharges allocated to each subfield can be varied in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34. In addition, the number of subfields forming one frame can be variously modified according to design specifications.

FIG. 4 is a timing diagram illustrating an example of a driving signal of the panel shown in FIG. 1. The address electrode A and the sustain electrode in one subfield SF in the ADS (Address Display Separation) driving method of the AC PDP are shown in FIG. X) and drive signals applied to the scan electrodes Y1 to Yn. Referring to FIG. 4, one subfield SF includes a reset period PR, an address period PA, and a sustain discharge period PS.

The reset period PR applies a reset pulse to all of the scan lines of all groups and forcibly performs a write discharge, thereby initializing the wall charge states of all cells. The reset period PR is carried out before entering the address period PA, which is carried out over the entire screen, thus making it possible to create a fairly even and evenly distributed wall charge arrangement. The cells initialized by the reset period PR have similar wall charge conditions inside the cells. The address period PA is performed after the reset period PR is performed. At this time, in the address period PA, the bias voltage Ve is applied to the sustain electrode X, and the scan electrodes Y1 to Yn and the address electrodes A1 to Am are simultaneously turned on at the cell positions to be displayed. Select the cell. After the address period PA is performed, the sustain pulse Vs is alternately applied to the sustain electrodes X and the scan electrodes Y1 to Yn to perform the sustain discharge period PS. During the sustain discharge period PS, a low level voltage VG is applied to the address electrodes A1-Am. In PDP, the brightness is adjusted by the number of sustain discharge pulses. If the number of sustain discharge pulses in one subfield or one TV field is large, the luminance increases.

Plasma display panel is a device that implements a display using discharge. Due to the screen discharge state due to the output voltage is very high compared to other displays, and when the discharge is generated, a high peak current occurs because the load form is a capacitor. Therefore, the stabilization and ripple characteristics of the output voltage under excessive load are very important.

5 is a diagram illustrating a power flow of a conventional plasma display panel.

The conventional power supply device 500 includes a converter 501, a reference signal generator 503, and a capacitor C ′ 1. When the input power Vi is input to the converter 501, the converter 501 outputs the DC power Vo according to the transformer ratio of the transformer by PWM control. The output DC power Vo is smoothed through the capacitor C'1, and the voltage across the capacitor C'1 is detected and input to the reference signal generator 501. The reference signal generator 501 outputs a reference signal S'r for PWM control to the converter through comparison with a reference voltage. Power supplied from the power supply device 500 is applied to the driving unit 507 including the driving circuit 505 and the capacitor C ′ 2, and the driving unit 507 drives the panel 1.

 The conventional plasma display panel detects the output voltage V'c1 across the capacitor C'1 in the power supply device 500 to stabilize the output voltage, and then the reference signal in the reference signal generator 503 The DC power Vo output from the converter 501 is stabilized by S'r. However, due to the fact that the control of the peak current is not performed in the driving unit 505, the capacitors C'1 and C'2 having high capacities are used for the output terminal of the power supply 500 and the input terminal of the driving unit 505. To handle instantaneous power. The use of such high-capacity capacitors C'1 and C'2 has a problem of cost increase, and is also a problem with regard to stabilization of the voltage input to the driving unit.

An object of the present invention is to provide a plasma display panel stabilized voltage, in order to solve the above problems.

In order to achieve the above object, the present invention provides a converter for outputting an input power source to a DC power source transformed at a predetermined transformer ratio by PWM control, a first capacitor for smoothing the DC power source at an output terminal of the converter, A power supply having a reference signal generator for detecting a voltage across the capacitor and outputting a reference signal for PWM control to the converter; And a driving unit including a driving circuit for driving the panel and a second capacitor connected to an input terminal of the driving circuit, wherein the reference signal generator further detects a voltage across the second capacitor and controls the PWM to the converter. It provides a plasma display panel, characterized in that for outputting a reference signal for.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

6 is a view showing a power flow of the plasma display panel of the present invention.

The plasma display panel of the present invention is simply composed of a power supply device 600, a driver 607 and the panel (1).

The power supply device 600 includes a converter 601 for outputting an input power Vi to a DC power voltage Vo converted to a predetermined transformer ratio, and a first capacitor for smoothing the DC power Vo at an output terminal of the converter 601. And a reference signal generator 603 which detects the voltage across the first capacitor C1 and outputs the reference signal Sr to the converter 601. FIG. The driver 607 includes a driving circuit 605 for driving the panel 1 and a second capacitor C2 connected to an input terminal of the driving circuit 605. The present invention detects the voltage Vc1 across the first capacitor and the voltage Vc2 across the second capacitor and controls the converter 601 through the reference signal generator 603 to output the power supply device 600. It is characterized by stabilizing the power source and the power source input to the driving unit.

The converter 601 receives the input power source Vi, converts the voltage to a predetermined voltage ratio by PWM control, and outputs the DC power Vo. The input power Vi may be an AC power source, a rectified power source in which the AC power source is rectified, or a power factor corrected power source in order to prevent power loss after the AC power source is rectified. The input power Vi is input to the converter 601 and is input to the transformer by PWM control performed by the reference signal Sr generated from the reference signal generator 603 to be transformed according to the turns ratio of the transformer to convert the converter 601. Output DC power (Vo) as the output power of). The output DC power Vo is output to various power supplies supplied to the plasma display panel, and typically, there is a sustain discharge voltage supplied for performing sustain discharge and an address voltage supplied for address discharge.

The first capacitor C1 is provided at the output terminal of the power supply device 600 and functions to smooth the DC power Vo which is the output power of the converter 601. The first capacitor C1 removes a high ripple component caused by the high voltage DC power output through the converter 601, and alleviates the peak current generated when the plasma display panel is discharged. The higher the capacitance of the first capacitor C1, the better the ripple component is removed and the more the peak current is relaxed.

The reference signal generator 603 detects the voltage across the first capacitor C1, the output terminal of the power supply device 600, and the voltage across the second capacitor C2 of the driver 607, and compares the voltage with the reference voltage. By amplifying the error, the amplified error signal is compared with the sawtooth wave to generate a reference signal Sr in the form of a pulse, thereby performing PWM control. The converter 601 outputs a stabilized DC power supply Vo by PWM control.

The second capacitor C2 is provided at the input terminal of the driving circuit 605 and functions to smooth the power input to the driving unit 607. The high ripple component caused by the high voltage DC power input through the driver 607 and the peak current generated when the plasma display panel is discharged are alleviated. The higher the capacitance of the second capacitor C2, the better the ripple component is removed and the more the peak current is mitigated.

The driving circuit 605 receives stable power from the power output from the power supply device 600 through the second capacitor C2 located at the input terminal of the driving circuit 605 and outputs a driving signal for driving the panel.

 Conventionally, there was a problem such as a voltage drop and an increase in the ripple component until the power output from the output terminal of the power supply is input to the driving unit. However, in the present invention, the voltage Vc1 across the first capacitor located at the output terminal of the converter 600. In addition to detecting the voltage of the second capacitor located at the input terminal of the driving unit (Vc2), the reference voltage generator 603 compares the reference voltage with the reference voltage and outputs the reference signal (Sr), The converter 601 outputs a DC power supply Vo controlled and controlled by the reference signal Sr. Accordingly, the DC power output through the converter 601 has a smaller ripple component than the conventional one, and thus the capacitance of the first capacitor C1 and the second capacitor C2 of the plasma display panel of the present invention is reduced. Capacity can be reduced compared to the conventional implementation.

7 is a block diagram schematically illustrating a plasma display panel of the present invention.

The voltage stabilized plasma display panel according to an embodiment of the present invention receives an external image signal and outputs the internal image signal through an image processing and an address image, a sustain electrode, and a scan electrode. A logic control unit 202 for outputting a driving control signal for driving the controller, a driving unit 607 for receiving a driving control signal to control the power supplied from the power supply device, and outputting a driving signal; The panel 1, the image processor 200, the logic controller 202, and a power supply device 600 for supplying power for operating the driver 607 are included.

According to the present invention as described above, the following effects can be obtained.                     

First, since the DC voltage is output by compensating the detected voltage at the input of the driving unit in the power supply, the stabilized DC power is output from the power supply.

Second, since the stabilized DC power is output from the power supply device, it is possible to reduce the capacity of the high-capacitance capacitor used for the output terminal of the power supply and the input terminal of the driving unit, and the parts can be simplified and the cost can be reduced by reducing the capacitor capacity. .

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (1)

A converter for outputting an input power source to a DC power source transformed at a predetermined transformer ratio by PWM control, a first capacitor for smoothing the DC power source at the output terminal of the converter, a voltage across the first capacitor, and detecting the voltage across the converter A power supply having a reference signal generator for outputting a reference signal for PWM control; And 10. A plasma display panel comprising a driving unit for driving a panel, and a driving unit having a second capacitor connected to an input terminal of the driving circuit. And detecting a voltage across the second capacitor to output a reference signal for PWM control to the converter.

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