KR100542212B1 - Driving method of plasma display panel and apparatus thereof - Google Patents

Abstract

The present invention relates to a method and apparatus for driving a plasma display panel for reducing power consumption of the plasma display panel. The present invention determines a portion of a plurality of address electrode driving boards and a plurality of scan electrode driving boards to which an image signal input on a screen of a plasma display panel divided by the driving boards is applied. In this case, an address voltage is applied to a portion of the partitioned portion to which actual data is applied using an address power recovery circuit included in an address electrode driving board, and in the case of a portion to which no actual data is applied, the address is subjected to hard switching. Apply voltage. As a result, it is possible to prevent a heat generation problem caused by many switching operations during the operation of the address power recovery circuit and to reduce power consumption.

PDP, Address Power Recovery Circuit (AERC), Driver Board

Description

Driving method of plasma display panel and apparatus therefor {DRIVING METHOD OF PLASMA DISPLAY PANEL AND APPARATUS THEREOF}

1 is a schematic partial perspective view of a typical plasma display panel.

2 is an electrode array diagram of a general plasma display panel.

3 is a driving waveform diagram of a plasma display panel according to the prior art.

4 is a diagram schematically illustrating a structure of a plasma display panel used in a method of driving a plasma display panel according to an embodiment of the present invention.

5 is a diagram illustrating a screen in which a plasma display panel is divided on a driving board as shown in FIG.

6 is a diagram illustrating a driving apparatus of a plasma display panel according to an exemplary embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for driving a plasma display panel (PDP), and more particularly, to a method and apparatus for driving a plasma display panel for reducing power consumption of the plasma display panel.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. First, a structure of a general plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partial perspective view of a plasma display panel, and FIG. 2 shows an electrode arrangement diagram of the plasma display panel.

As shown in FIG. 1, the plasma display panel includes two glass substrates 1 and 6 facing each other apart. On the glass substrate 1, the scan electrode 4 and the sustain electrode 5 are formed in pairs and in parallel, and the scan electrode 4 and the sustain electrode 5 are covered with the dielectric layer 2 and the protective film 3. have. A plurality of address electrodes 8 are formed on the glass substrate 6, and the address electrodes 8 are covered with the insulator layer 7. The address electrode 8 and the partition 9 are formed on the insulator layer 7 between the address electrodes 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both sides of the partition wall 9. The glass substrates 1 and 6 are disposed to face each other with the discharge space 11 therebetween so that the scan electrode 4, the address electrode 8, the sustain electrode 5, and the address electrode 8 are orthogonal to each other. The discharge space 11 at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.

As shown in FIG. 2, the electrode of the plasma display panel has a matrix structure of n × m. In the column direction, address electrodes A ₁ -A _m are arranged, and in the row direction, n rows of scan electrodes Y ₁ -Y _n and sustain electrodes X ₁ -X _n are arranged in pairs.

In the method of driving the plasma display panel, each subfield (which explains waveforms in one subfield for convenience) generally consists of a reset period, an address period, a sustain period, and an erase period.

The reset period is a period for initializing the state of each cell in order to perform an addressing operation smoothly on the cell, and the address period (or scan period, write period) is a cell that is turned on by selecting a cell that is turned on and a cell that is not turned on. This is a period during which the wall charges are accumulated in the addressed cells). The sustain period is a period in which discharge for actually displaying an image is performed on the addressed cell, and the erase period is a period in which the wall discharge of the cell is reduced to end the sustain discharge.

3 is a view showing a driving method of a conventional plasma display panel.

As shown in Fig. 3, all of the discharge cells are discharged by the ramp voltage rising in the reset period so that a large amount of negative charges are accumulated on the scan electrode Y and a large amount of positive charges are stored on the address electrode A. .

Next, a ramp voltage falling on the scan electrode Y is applied to the discharge cell to lower the potential to the ground level while maintaining the wall charge structure. At this time, the wall charges formed in the discharge cells are erased by the rising lamp voltage. In other words, the wall charges accumulated in the discharge cells are erased again.

In the address (or scan) period, a positive voltage Va is applied to the address electrode A, and a ground level voltage GND is applied to the scan electrode Y as a low level to perform address discharge. Then, the actual image is displayed by applying the sustain voltage Vs to the address electrode A and the sustain electrode X alternately to the cells selected in the address period.

At this time, in the address (or scan) period, when the ground level voltage GND is applied to the scan electrode Y sequentially from the first scan electrode Y1 to the nth scan electrode Yn, the address electrode A is applied to the address electrode A. FIG. The cell to be selected is selected by applying a positive voltage Va. Here, the waveform applied to the address electrode A is a waveform applied to the address electrode shown in FIG. 3 when the power consumption is suppressed using the address energy recovery circuit (hereinafter referred to as 'AERC'). Like an enlarged waveform, it has an LC resonant waveform in a rising period and a falling period.

However, in the conventional address period, when the address energy recovery circuit AERC uses the waveform applied to the address electrode, the waveform applied to all the address electrodes A corresponding to all the data applied on the plasma display panel is recovered. By using the circuit AERC, power consumption is suppressed. In this case, the power consumption may be reduced by using the address energy recovery circuit AERC, but the switching elements of the address energy recovery circuit AERC are operated to produce a waveform applied to the address electrode in the address period as shown in FIG. There is a problem that generates a lot of heat due to the switching loss.

The technical problem to be solved by the present invention is to solve the above problems of the prior art by selectively applying the use of an address retrieval circuit used to apply an address voltage to an address electrode in an address period in accordance with data of an input video signal. SUMMARY OF THE INVENTION An object of the present invention is to provide a method and apparatus for driving a plasma display panel which reduces power consumption and simultaneously reduces switching losses.

A driving method of a plasma display panel according to a feature of the present invention for achieving the above object is

A plurality of first and second driving boards respectively driving the plurality of first and second electrodes respectively formed on the first substrate, and a plurality of intersecting the first and second electrodes and formed on the second substrate; In the method of driving a plasma display panel comprising a plurality of third driving board for driving a third electrode,

(a) dividing an area where an input image signal is displayed among a plurality of areas divided by the plurality of first driving boards and the plurality of third driving boards on a screen of the plasma display panel;

(b) determining an area in which actual data is concentrated among the plurality of areas from the input image signal; And

(c) applying an address voltage to the third electrode using an energy recovery circuit included in the third driving board only in a region where the actual data determined in step (b) is concentrated. In this case, in the method of driving the plasma display panel, an address voltage is applied to the third electrode using a hard switching circuit included in the third driving board in a region where the actual data determined in step (b) is not concentrated. It further comprises a step.

A driving apparatus of a plasma display panel according to another aspect of the present invention is

A plurality of first and second driving boards respectively driving the plurality of first and second electrodes respectively formed on the first substrate, and a plurality of intersecting the first and second electrodes and formed on the second substrate; In the driving apparatus of the plasma display panel including a plurality of third driving board for driving the third electrode,

An area detecting unit detecting an area where an input image signal is displayed on a plurality of areas on the screen of the plasma display panel divided by the plurality of first driving boards and the plurality of third driving boards;

A data conversion comparison unit configured to compare the amount of change in data of the plurality of areas in which the input image signal sensed by the area detection unit is displayed and to transmit a signal regarding whether to use an address energy recovery circuit included in the plurality of third driving boards; ;

 An address energy recovery circuit controller which receives a signal on whether the address energy recovery circuit is used from the data conversion comparison unit and generates and transmits a control signal corresponding thereto;

And an address driver for applying an address voltage to an address electrode of the plasma display panel in response to a control signal transmitted from the address power recovery circuit controller. At this time, the data conversion comparison unit is characterized in that for transmitting a signal that the address energy recovery circuit will be used in the region with a large amount of data change.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

Now, a method and a device for driving a plasma display panel according to an embodiment of the present invention will be described in detail with reference to the drawings.

4 is a diagram schematically illustrating a structure of a plasma display panel used in a method of driving a plasma display panel according to an embodiment of the present invention.

As shown in FIG. 4, the structure of the plasma display panel includes first, second, third and fourth address electrodes A, driving boards 100, 120, 140, and 160, and first and second scan electrodes Y. Driving boards 200 and 220, sustain electrode X driving board 300, and plasma panel 400. The plasma panel 400 includes a plurality of address electrodes A1-Am arranged in the column direction, and a plurality of scan electrodes Y1-Yn and sustain electrodes X1-Xn arranged in a zigzag pattern in the row direction. Include.

The first and second scan electrode Y driving boards 200 and 220 are divided into two scan electrode driving boards 200 and 220 for faster address operation when the scan electrodes Y are sequentially scanned. dual) is used to perform a scan operation. That is, the first and second scan electrode Y driving boards 200 and 220 simultaneously operate when the scan voltage is applied to the scan electrode Y in the address period, thereby performing a faster scan operation of the large plasma display panel. Be sure to

The sustain electrode driving board 300 is a driving board for applying a voltage corresponding to the sustain electrode X in the driving period of the plasma display panel.

The first, second, third, and fourth address electrode A driving boards 100, 120, 140, and 160 include an address power recovery circuit AERC and a hard switching circuit, and the address in the address period. The driving board is for applying an address voltage Va when a scan voltage is applied to the scan electrode Y to select a cell to be displayed among many cells on the plasma panel 400 to the electrode A. FIG. At this time, the address electrode A driving board is divided into four parts as shown in FIG. 4, which is one of the address electrode A driving boards 100, 120, 140, and 160 among the data of the input image signal. It is not intended to use address power recovery (AERC) or to apply the address voltage directly through a hard swithig circuit. That is, each of the address electrodes A driving boards 100, 120, 140, and 160 operates independently in the address period in applying the address voltage Va.

 When each driving board is operated in the driving board structure as shown in FIG. 4, the screen of the plasma display panel is divided into four parts (①, ②, ③, ④) as shown in FIG. Can be. At this time, the data of one frame image signal input is analyzed to determine where the data is applied from among the quadrant (①, ②, ③, ④) screens. Then, it is determined where the actual data of the input video signal is concentrated among the data included in the quadrant screens ①, ②, ③ and ④. In this case, the actual data refers to a portion where the variation of the input image signal data is severe on the plasma panel 400. At this time, in the address electrode driving board portion corresponding to the portion where the actual data is concentrated, the address power recovery circuit AERC is operated while being scanned by the first and second scan electrode driving boards 200 and 220 so that the address voltage ( Va) is applied, and the address voltage Va is directly applied through a hard switching circuit without operating the address power recovery circuit AERC in a portion where data does not change.

For example, a description will be given of the case where the actual data is concentrated in the parts 1 and 4 of FIG. 5 in the data of the input video signal, and there is almost no change in the parts 2 and 3. In this case, when the first and second scan electrode driving boards 200 and 220 simultaneously apply the scan voltage in the address period, the first and fourth address electrode driving boards 100 and 160 may perform the address power recovery circuit AERC. ) Can be applied to the address voltage Va to prevent power consumption. In addition, the second and third address electrode driving boards 120 and 140 are hard switching when the first and second scan electrode driving boards 200 and 220 simultaneously apply the scan voltage in the address period. By applying the address voltage Va directly through the circuit, unnecessary switching operation caused by using the address power recovery circuit can be prevented.

By doing so, by preventing unnecessary operation of the address power recovery circuit AERC, it is possible to solve the heat generation problem by preventing many switching operations of the switching elements generated when the address power recovery circuit is used.

Here, since the address power recovery circuit (AERC) and the hard switching circuit (hard switching) can be easily implemented by those skilled in the art of the present invention, the following specific address power recovery circuit (AERC) and hard The structure and operation of the switching circuit will be omitted.

In the above, only the case where the address electrode A driving board is divided into four and the scan electrode Y driving board is divided into two are described. However, the driving board is divided into more driving boards (smaller driving boards) and operated independently. In this case, the input video signal data may be determined in the same manner as described above to determine whether the address voltage Va is applied using the address power recovery circuit AERC among the address driving boards, thereby solving the heat generation problem of the switching element.

Hereinafter, a specific plasma display panel driving apparatus for realizing a method for driving a plasma display panel according to the embodiment of the present invention described above will be described.

6 is a block diagram schematically illustrating an apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 6, the apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention includes an image signal processor 500, a gamma correction and error diffusion unit 510, a subfield generator 520, and a memory controller 530. Area detection unit 540, data change comparison unit 550, frame memory unit 560, AERC control unit 570, address driver 50, sustain / scan pulse drive control unit 590, sustain / scan pulse drive unit And 600.

The image signal processor 500 digitizes an image signal input from the outside to generate digital image data.

The gamma correction and error diffusion unit 510 receives the digital image data output from the image signal processing unit, corrects the gamma value according to the characteristics of the PDP, and performs a diffusion process on the surrounding pixels to output the display error. That is, the error diffusion unit diffuses the low-order bits to the surrounding pixels in accordance with the gamma-corrected data (generally 12 bits) to fit the bits (generally 8 bits) displayed on the plasma display panel, thereby improving low gray scale expressive power.

The subfield generator 520 receives the image data output from the gamma correction and error diffusion unit 510 and generates subfield data corresponding to the image data.

The memory controller 530 divides the subfield data transmitted from the subfield generator 440 into each subfield for all subfields of one frame, generates address data for each subfield, and provides the address data to the address driver 580. do.

The area detector 540 detects a portion of the area shown in FIG. 5 from the image data output from the gamma correction and error diffusion unit 510. That is, among the image data of one frame, a portion displayed in the region shown in FIG. 5 is detected among the pixels on the screen of the plasma display panel. In this case, the area detecting unit 540 stores the area shown in FIG. 5 in advance, and when there are more drive boards than those shown in FIG. 4, the area detection unit 540 stores the area corresponding thereto in advance.

The data change comparator 550 compares the actual data, that is, the amount of data change, with the data displayed in each area based on the information about the display area of the input image signal detected by the area detector 540. According to the amount of change, an AERC ON / OFF signal for each region is transmitted to the AERC controller 570 for each region. If the data is severely changed in each region, an AERC ON signal is transmitted using the address energy recovery circuit. If the data is not severely changed, the AERC OFF signal is transmitted. In this case, the data change comparison unit 550 uses a frame memory unit 560 that stores image data of a frame that is previously input before the currently input frame in order to compare the amount of data change. The frame memory unit 560 previously stores a video signal that is input before the currently input frame.

The AERC controller 570 receives the address energy recovery circuit use signal AERC ON / OFF signal from the data change comparison unit 550 and applies the address voltage Va by using the address recovery circuit AERC for each region. Or a control signal for applying the address voltage Va to the address driver 580 using a hard switching circuit.

The address driver 580 may correspond to address data output from the memory controller 580 and a control signal for using an address recovery circuit AERC transmitted from the AERC controller 570. Address data is applied to (A1, A2, ... Am). In this case, the address driver 580 includes the first, second, third, and fourth address (A) electrode driving boards 100, 120, 140, and 160 as shown in FIG. 4. Each of the address driving boards 100, 120, 140, and 160 corresponds to an address voltage according to a control signal of whether an address recovery circuit AERC is used for each area to be transmitted and address data information transmitted from the memory controller 530. Va is applied to the address electrodes A1, A2, ... Am.

The sustain / scan pulse drive control unit 590 generates the number of sustain pulses corresponding to the subfield arrangement (which is determined according to the load ratio detected by the APC unit although not shown in FIG. 6) to the pseudo-scan pulse driver 490. Output

The sustain / scan pulse driver 600 generates sustain pulses and scan pulses based on the subfield array structure output from the sustain / scan pulse drive controller 590 to scan electrodes X1, X2,. Xn) and sustain electrodes Y1, Y2, ..., Yn.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

 As described above, according to the present invention, it is possible to determine whether to use the address power recovery circuit among the address driving boards by determining the data of the input image signal, thereby independently driving the address driving boards, thereby avoiding the heat generation problem caused by many switching operations. You can stop it. As a result, power consumption of the plasma display panel may be reduced.

Claims (10)

A plurality of first and second driving boards respectively driving the plurality of first and second electrodes respectively formed on the first substrate, and a plurality of intersecting the first and second electrodes and formed on the second substrate; In the method of driving a plasma display panel comprising a plurality of third driving board for driving a third electrode, (a) dividing an area where an input image signal is displayed among a plurality of areas divided by the plurality of first driving boards and the plurality of third driving boards on a screen of the plasma display panel; (b) determining an area in which actual data is concentrated among the plurality of areas from the input image signal; And (c) applying an address voltage to the third electrode using an energy recovery circuit included in the third driving board only in a region where the actual data determined in step (b) is concentrated. Driving method. The method of claim 1, And applying an address voltage to the third electrode using a hard switching circuit included in the third driving board in a region where the actual data determined in step (b) is not concentrated. Way. The method according to claim 1 or 2, And in the step (b), the actual data is data having a large variation in the input image signal. The method according to claim 1 or 2, And wherein the plurality of regions comprises four regions when the first driving board and the third driving board are two, respectively. A plurality of first and second driving boards respectively driving the plurality of first and second electrodes respectively formed on the first substrate, and a plurality of intersecting the first and second electrodes and formed on the second substrate; In the driving apparatus of the plasma display panel including a plurality of third driving board for driving the third electrode, An area detecting unit detecting an area where an input image signal is displayed on a plurality of areas on the screen of the plasma display panel divided by the plurality of first driving boards and the plurality of third driving boards; A data conversion comparison unit configured to compare the amount of change in data of the plurality of areas in which the input image signal sensed by the area detection unit is displayed and to transmit a signal regarding whether to use an address energy recovery circuit included in the plurality of third driving boards; ;  An address energy recovery circuit controller which receives a signal on whether the address energy recovery circuit is transmitted from the data conversion comparison unit and generates and transmits a control signal corresponding thereto; And an address driver for applying an address voltage to an address electrode of the plasma display panel in response to a control signal transmitted from the address power recovery circuit controller. The method of claim 5, And the data conversion comparison unit transmits a signal that an address energy recovery circuit is to be used in a region where the amount of data change is large. The method of claim 5, And the data conversion comparator transmits a signal that an address recovery circuit will not be used in a region where the amount of data change is small. The method according to any one of claims 5 to 7, And a change amount of data compared by the data change comparison unit is determined by comparing the input image signal with an input image signal of a previous frame of the input image signal. The method of claim 5, Wherein the address driver applies an address voltage using an address energy recovery circuit only to an address electrode of the plasma display panel corresponding to a region where the amount of change of data is determined by the data change comparator. Driving device. The method of claim 5, And the address driver includes the plurality of third driving boards.

Images