KR100515344B1 - Plasma display panel and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel and a method of driving the same, and includes a main reset pulse having a waveform rising from a first voltage to a second voltage and then falling from a third voltage to a fourth voltage in a reset period. And selectively applying the auxiliary reset pulse to the plurality of subfields, applying a fifth voltage to the address period of the subfield to which the main reset pulse is applied to the second electrode, and the address of the subfield to which the auxiliary reset pulse is applied. The sixth voltage is applied in the period, and the fifth voltage is smaller than the sixth voltage. By doing so, it is possible to suppress the narrowing of the operating margin caused by applying the selective reset technique and to solve the low discharge problem. In addition, in order to solve the low discharge problem, the overdischarge problem, which is a side effect of increasing the bias voltage of the common electrode, may be solved.

Description

Plasma display panel and driving method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP), and more particularly to a method of driving a sustain electrode of a plasma display panel.

A plasma display panel is a flat display device that displays characters or images by using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. First, a structure of a general plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partial perspective view of a plasma display panel, and FIG. 2 shows an electrode arrangement diagram of the plasma display panel.

As shown in Fig. 1, the plasma display panel includes two glass substrates 1 and 6 facing each other apart. On the glass substrate 1, the scan electrode 4 and the sustain electrode 5 are formed in pairs and in parallel, and the scan electrode 4 and the sustain electrode 5 are covered with the dielectric layer 2 and the protective film 3. have. A plurality of address electrodes 8 are formed on the glass substrate 6, and the address electrodes 8 are covered with the insulator layer 7. The address electrode 8 and the partition 9 are formed on the insulator layer 7 between the address electrodes 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both sides of the partition wall 9. The glass substrates 1 and 6 are disposed to face each other with the discharge space 11 therebetween so that the scan electrode 4, the address electrode 8, the sustain electrode 5, and the address electrode 8 are orthogonal to each other. The discharge space 11 at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.

As shown in FIG. 2, the electrode of the plasma display panel has a matrix structure of n × m. In the column direction, address electrodes A ₁ -A _m are arranged, and in the row direction, n rows of scan electrodes Y ₁ -Y _n and sustain electrodes X ₁ -X _n are arranged in pairs.

In order to drive the plasma display panel, one TV field is composed of a plurality of subfields, and each subfield includes a reset period, an address period, and a discharge sustain period.

In order for a plasma display panel to perform as a color display, it is necessary to implement halftones. Currently, a halftone implementation method of dividing one TV field into a plurality of subfields and controlling the time division is used. have.

3 is a half gray scale implementation method of an AC plasma display panel that is generally applied.

FIG. 3 illustrates a 6-bit gray scale implementation method, in which one TV field is divided into six subfields, and each subfield is divided into an address period and a display discharge sustain period.

4A to 4C are diagrams showing examples of drive waveforms applied to actually drive the plasma display panel.

4A to 4C, the number of subfields constituting a frame may be several according to a design, but only some of the subfields are shown. For the convenience of description, only three subfields will be described. do.

In the first subfield shown in FIGS. 4A to 4C, a rising ramp reset is performed on the scan electrode to accumulate wall charges over the entire panel, and then the rising ramp reset pulse is applied to the second and third subfields. Only the polling lamp reset is applied without applying it.

At this time, the potential of the common electrode may be higher, equal to, or lower than that of the sustain discharge voltage as shown in FIGS. 4A to 4C. The same level as the sustain discharge voltage may be applied to simplify the circuit and reduce the unit cost. The potential must be adjusted to suit the characteristics of the panel.

 The mixing of the main reset and the auxiliary reset is to minimize the amount of light generated from the rising ramp reset to improve the contrast ratio of the plasma display panel. However, it should be noted that the selective reset method as described above improves the contrast ratio at the expense of some margin of discharge.

In the case of high uniformity of the panel and a large common operating margin, the number of Rising Ramp Reset Pulses may be smaller. However, additional measures are needed to ensure operating margins while minimizing the sacrifice of contrast ratio on the circuit.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display panel and a driving method thereof for securing an operating margin while interlocking a potential of a common electrode in an address period with a selective reset.

The plasma display panel according to one aspect of the present invention for solving the above problems,

A plasma display panel which displays data by generating image data input from outside into a plurality of subfields.

A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode;

The image signal is input to generate and output a scan electrode driving signal, a sustain electrode driving signal, and an address electrode driving signal, and have a waveform of rising and falling from the first voltage to the second voltage during the reset period of all subfields. A control unit for selectively applying a main reset pulse and an auxiliary reset pulse having a waveform falling from the third voltage to the fourth voltage;

An address data driver for applying a voltage corresponding to the address electrode driving signal to the address electrode;

A sustain electrode driver for applying a voltage corresponding to the sustain electrode driving signal to the sustain electrode;

A scan electrode driver for applying a voltage corresponding to the scan electrode driving signal to a scan electrode;

The controller applies a fifth voltage to a sustain electrode in an address period of a subfield to which the main reset pulse is applied, applies a sixth voltage to an address period of a subfield to which the auxiliary reset pulse is applied, and applies the fifth voltage. Is smaller than the sixth voltage.

The driving method of the plasma display panel according to another aspect of the present invention for achieving the technical problem,

A plurality of first electrodes and second electrodes formed on the first substrate, and a plurality of third electrodes formed on the second substrate and crossing the first and second electrodes, respectively; A discharge cell is formed by the second electrode and the third electrode, and in the reset period of all the subfields, a main reset pulse having a waveform rising from the first voltage to the second voltage and then falling, and the fourth voltage at the third voltage. A driving method of a plasma display panel for selectively applying an auxiliary reset pulse having a waveform that descends to

The fifth voltage is applied to the address period of the subfield to which the main reset pulse is applied to the second electrode, the sixth voltage is applied to the address period of the subfield to which the auxiliary reset pulse is applied, and the fifth voltage is equal to the fifth voltage. It is characterized by less than 6 voltage.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

5 is a configuration diagram of a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 5, the plasma display panel according to the embodiment of the present invention may include a plasma panel 100, a controller 200, an address electrode driver 300, and a scan electrode driver (hereinafter referred to as a “Y electrode driver”) ( 400, a sustain electrode driver (hereinafter referred to as an 'X electrode driver') 500.

The plasma panel 100 includes a plurality of address electrodes A1-Am arranged in the column direction, a plurality of sustain electrodes (hereinafter referred to as 'X electrodes') (X1-Xn) and scan electrodes arranged in the row direction. (Hereinafter referred to as 'Y electrode') (Y1-Yn). The X electrodes X1-Xn are formed corresponding to the respective Y electrodes Y1-Yn, and generally have one end connected in common to each other. The plasma panel 100 includes a glass substrate (not shown) on which the X and Y electrodes X1-Xn and Y1-Yn are arranged, and a glass substrate (not shown) on which the address electrodes A1-Am are arranged. . The two glass substrates are disposed to face each other with the discharge space therebetween so that the Y electrodes Y1-Yn and the address electrodes A1-Am and the X electrodes X1-Xn and the address electrodes A1-Am are orthogonal to each other. At this time, the discharge space at the intersection of the address electrodes A1-Am and the X and Y electrodes X1-Xn and Y1-Yn forms a discharge cell.

The controller 200 receives an image signal, performs gamma correction, generates subfield data, outputs the address electrode driving signal, and generates and outputs the X electrode driving signal and the Y electrode driving signal. In particular, the control unit 200 in the reset period of the entire sub-field, the main reset pulse having a waveform rising from the first voltage to the second voltage and falling, and the auxiliary reset pulse having a waveform falling from the third voltage to the fourth voltage. Is applied selectively, a fifth voltage is applied to the sustain electrode in the address period of the subfield to which the main reset pulse is applied, and a sixth voltage is applied to the address period of the subfield to which the auxiliary reset pulse is applied, The fifth voltage is smaller than the sixth voltage.

The address electrode driver 300 receives an address electrode driving signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am.

The X electrode driver 500 receives an X electrode driving signal from the controller 200 and applies a driving voltage to the X electrodes X1 to Xn.

The Y electrode driver 400 receives the Y electrode driving signal from the controller 200 and applies a driving voltage to the Y electrodes Y1-Yn.

Next, the operation of the plasma display panel according to the embodiment of the present invention having such a configuration will be described in detail.

First, the controller 200 receives an externally input image signal, corrects a gamma value according to the characteristics of the plasma display panel, generates the corrected image signal into N subfields, and generates an X electrode driving signal for each subfield, A Y electrode drive control signal and an address electrode drive signal are output.

At this time, the control unit 200 in the reset period of the entire sub-field, the main reset pulse having a waveform rising and falling after the first voltage to the second voltage and the auxiliary reset having a waveform falling from the third voltage to the fourth voltage. Selectively applying a pulse, applying a fifth voltage to a sustain electrode in an address period of a subfield to which the main reset pulse is applied, and applying a sixth voltage to an address period of a subfield to which the auxiliary reset pulse is applied, The fifth voltage generates the X electrode driving signal to be smaller than the sixth voltage.

The waveform applied to the X electrode at this time is shown in FIG.

Referring to FIG. 6, the address interval potential of the common electrode in the second and third subfields in which the auxiliary reset is performed is set higher than the address interval potential of the common electrode in the first subfield in which the main reset is performed.

This is to increase the potential of the common electrode in the subfield in which only the auxiliary reset is performed to improve the contrast ratio so that more electrons generated in the address operation are accumulated on the common electrode.

In this case, the potential of the common electrode in the address period can be increased even in the subfield in which the main reset is performed. In this case, there is no problem of low discharge, but there is a high possibility of a problem of over discharge.

7 shows another example of driving the X electrode driving signal differently.

In FIG. 7, the basic concept is not different from that shown in FIG. 6, but is an example of the present invention applied to the driving waveform in which the potential of the common electrode in the falling ramp period is set lower than that in the address period. The potential of the common electrode is set high.

Then, the address electrode driver 300 receives an address electrode driving signal and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am.

The X electrode driver 500 receives the X electrode driving signal to apply a driving voltage to the X electrodes X1 to Xn, and the Y electrode driving unit 400 receives the Y electrode driving signal to receive the Y electrode Y1 to Yn. Is applied to the driving voltage.

Then, data is displayed on the plasma panel 100.

6 shows a circuit for generating a driving waveform applied to the X electrode shown in FIG.

Referring to FIG. 8, the Xbias-1 voltage is shown to be the same as the sustain discharge voltage, Vs voltage, for cost reduction and circuit simplification in hardware implementation, and Xbias-1 and Xbias to optimize the discharge state of the panel. The −2 voltage may consist of a power supply separate from the sustain discharge voltage.

Here, Xbias-1 voltage is output when Xs, Xp on and Xb are off, and Xbias-2 voltage is output when Xs, Xp off and Xb is on.

As such, adjusting the on / off time of the switch as needed will yield the desired output.

In addition, Xr and Xf are related to a power recovery circuit, and detailed description is abbreviate | omitted.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the exemplary embodiment of the present invention, the potential of the common electrode applied to the address period is differently applied at the time of the main reset and the auxiliary reset, thereby suppressing the narrowing of the operation margin resulting from applying the selective reset technique, and thus low discharge. You can solve the problem. In addition, in order to solve the low discharge problem, the overdischarge problem, which is a side effect of increasing the bias voltage of the common electrode, may be solved.

1 is a schematic partial perspective view of a typical plasma display panel.

2 is an electrode array diagram of a general plasma display panel.

FIG. 3 is a diagram illustrating a half gray scale implementation method of an AC plasma display panel that is generally applied.

4A to 4C illustrate driving waveforms of a conventional plasma display panel.

5 is a configuration diagram of a plasma display panel according to an exemplary embodiment of the present invention.

6 and 7 illustrate driving waveforms of the plasma display panel according to the exemplary embodiment of the present invention.

8 is a diagram illustrating an example of a circuit for applying a voltage to the sustaining electrodes of FIGS. 6 and 7.

Claims (7)

A plasma display panel which displays data by generating image data input from outside into a plurality of subfields. A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode; Receiving the image signal and generating and outputting a scan electrode driving signal, a sustain electrode driving signal, and an address electrode driving signal, and during a reset period, a main reset pulse having a waveform rising from a first voltage to a second voltage and then falling; A controller selectively applying an auxiliary reset pulse having a waveform falling from the third voltage to the fourth voltage to the plurality of subfields; An address data driver for applying a voltage corresponding to the address electrode driving signal to the address electrode; A sustain electrode driver for applying a voltage corresponding to the sustain electrode driving signal to the sustain electrode; A scan electrode driver for applying a voltage corresponding to the scan electrode driving signal to a scan electrode; The controller applies a fifth voltage to a sustain electrode in an address period of a subfield to which the main reset pulse is applied, applies a sixth voltage to an address period of a subfield to which the auxiliary reset pulse is applied, and applies the fifth voltage. Is smaller than the sixth voltage. The method of claim 1, And the control unit applies the fifth voltage during a reset period of the subfield to which the auxiliary reset pulse is applied. The method of claim 1, And the control unit applies the sixth voltage to a reset period of a subfield to which the auxiliary reset pulse is applied. A plurality of first electrodes and second electrodes formed on the first substrate, and a plurality of third electrodes formed on the second substrate and crossing the first and second electrodes, respectively; A discharge cell is formed by the second electrode and the third electrode, and in the reset period, a main reset pulse having a waveform rising from the first voltage to the second voltage and then falling, and a waveform falling from the third voltage to the fourth voltage. A driving method of a plasma display panel for selectively applying an auxiliary reset pulse having a plurality of subfields to The fifth voltage is applied to the address period of the subfield to which the main reset pulse is applied to the second electrode, the sixth voltage is applied to the address period of the subfield to which the auxiliary reset pulse is applied, and the fifth voltage is equal to the fifth voltage. A method of driving a plasma display panel, characterized in that less than 6 voltages. The method of claim 4, wherein Wherein the first electrode is a scan electrode, the second electrode is a sustain electrode, and the third electrode is an address electrode. The method according to claim 5 or 6, And the control unit applies the fifth voltage during a reset period of the subfield to which the auxiliary reset pulse is applied. The method according to claim 5 or 6, And the control unit applies the sixth voltage in a reset period of a subfield to which the auxiliary reset pulse is applied.