KR100529078B1 - A plasma display panel a driving method thereof - Google Patents

Abstract

The present invention relates to a plasma display panel and a driving method thereof. According to the present invention, when driving a plasma display panel including a scan electrode, a sustain electrode, and an address electrode driven by a driving circuit, gate resistance values of a plurality of switching elements arranged in parallel in the driving circuit are increased from the middle to both ends. Apply to eliminate current imbalance caused by skin effects. By doing so, it is possible to reduce heat generation and product defects.

Description

A plasma display panel and a driving method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel and a driving method thereof for minimizing an imbalance of current generated by a skin effect of the plasma panel.

A plasma display panel is a flat display device that displays characters or images by using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display panel is classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC-type PDP, since the electrode is exposed to the discharge space as it is, the current flows in the discharge space while voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made for this purpose. On the other hand, in the AC type PDP, the electrode covers the dielectric layer, so the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

1 is a partial perspective view of an AC plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first substrate 1 and the second substrate 6 may be arranged with the discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. It is arranged toward. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

2 shows an electrode arrangement diagram of a plasma display panel.

As shown in Fig. 2, the PDP electrode has a matrix structure of m x n. Specifically, the address electrodes A1 to Am are arranged in the column direction, and the scan electrodes Y1 to n rows in the row direction. Yn) and sustain electrodes X1 to Xn are arranged in a zigzag. Hereinafter, the scanning electrode will be referred to as "Y electrode" and the sustain electrode as "X electrode". The discharge cell 12 shown in FIG. 2 corresponds to the discharge cell 12 shown in FIG.

According to a general driving method of the PDP, one frame is divided into a plurality of subfields, and each subfield includes a reset section, an address section, and a sustain section.

The reset section (initialization section) serves to erase the wall charge state of the previous sustain discharge and to set up the wall charge in order to stably perform the next address discharge. That is, the reset section serves to create an optimal wall charge state for the address operation in the subsequent address section.

The address section selects the cells that are turned on and the cells that are not turned on in the panel to accumulate wall charges in the cells that are turned on (addressed cells), and the sustain section performs discharge for actually displaying an image on the addressed cells. do.

Since a large discharge current flows in the driving circuit unit for driving the plasma display panel, a plurality of switching elements are arranged in parallel so as to distribute the current and heat. However, parasitic components of the PCB patterns connected to each switching element cannot be the same.

In particular, due to the influence of the skin effect that is more dominant than the parasitic component, the current load of the device disposed outside is inevitably greater than that of the device disposed in the middle. The skin effect phenomenon is more affected as the switching frequency increases, such as a plasma display panel.

3 is a diagram showing a current distribution flowing through the pattern of the driving circuit unit.

As shown in FIG. 3, the strength of the current tends to increase as it is located outside.

4 is a current waveform passing through eight parallelly arranged switching elements as an example of this skin effect.

Referring to Fig. 4, it can be seen that the skin effect causes a larger current to flow in both elements than in the center.

As described above, there is a problem in that currents of the switching elements arranged in parallel in the driving circuit part are biased by the skin effect.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve a conventional problem, and to provide a plasma panel and a driving method thereof that solve an unbalance of current between switching elements caused by a skin effect.

A plasma display panel according to an aspect of the present invention for achieving the above object,

A method of driving a plasma display panel including a scan electrode driven by a driving circuit and a first space defined by a sustain electrode, the method comprising:

A reset step of erasing the wall charge state of the previous sustain discharge and setting up the wall charge to stably perform the next address discharge;

An addressing step of selecting an on-cell and a non-on-cell from the panel to accumulate wall charges on the on-cell (addressed cell);

A sustaining step of performing a discharge for actually displaying an image on the addressed cell,

The gate resistance of the switching elements arranged in parallel in the driving circuit may be applied in a larger direction from the middle to the outside.

Here, the wall charge refers to a charge formed in the wall of the discharge cell (for example, the dielectric layer) close to each electrode and accumulated in the electrode. Such wall charges are not actually in contact with the electrodes themselves, but here wall charges are described as "formed", "accumulated" or "stacked" on the electrodes. In addition, the wall voltage refers to a potential difference formed on the wall of the discharge cell by the wall charge.

According to another aspect of the present invention for achieving the above object,

A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode;

A controller configured to receive an image signal and generate and output a sustain electrode driving signal, a scan electrode driving signal, and an address electrode driving signal;

An address electrode driver for applying a voltage to the address electrode of the plasma panel according to an address driving signal output from the controller;

A sustain electrode driver for applying a sustain voltage to the sustain electrode according to a sustain electrode driving signal of the controller;

And a scan electrode driver configured to apply a scan voltage to the scan electrode according to the scan electrode driving signal of the controller, and to apply a gate resistance value of the switching elements arranged in parallel in an internal circuit from the middle to the outside.

Next, the present invention will be described with reference to the accompanying drawings so that the present invention may be easily implemented by those skilled in the art as follows.

5 is a configuration diagram of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 5, a plasma display panel according to an exemplary embodiment of the present invention may include a plasma panel 100, a controller 200, an address electrode driver 300, and a scan electrode driver (hereinafter referred to as a “Y electrode driver”) ( 400, a sustain electrode driver (hereinafter referred to as an 'X electrode driver') 500.

The plasma panel 100 includes a plurality of address electrodes A1-Am arranged in the column direction, a plurality of sustain electrodes (hereinafter referred to as 'X electrodes') (X1-Xn) and scan electrodes arranged in the row direction. (Hereinafter referred to as 'Y electrode') (Y1-Yn). The X electrodes X1-Xn are formed corresponding to the respective Y electrodes Y1-Yn, and generally have one end connected in common to each other. The plasma panel 100 includes a glass substrate (not shown) on which the X and Y electrodes X1-Xn and Y1-Yn are arranged, and a glass substrate (not shown) on which the address electrodes A1-Am are arranged. . The two glass substrates are disposed to face each other with the discharge space therebetween so that the Y electrodes Y1-Yn and the address electrodes A1-Am and the X electrodes X1-Xn and the address electrodes A1-Am are orthogonal to each other. At this time, the discharge space at the intersection of the address electrodes A1-Am and the X and Y electrodes X1-Xn and Y1-Yn forms a discharge cell.

The controller 200 receives an image signal and outputs an address driving signal, an X electrode driving signal, and a Y electrode driving signal. The controller 200 divides and drives one frame into a plurality of subfields, and each subfield includes a reset period, an addressing period, and a sustain period.

The address electrode driver 300 receives an address electrode driving signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am and disposed in parallel in an internal circuit. The greater the gate resistance of the switching element is applied from the middle to the outside.

The X electrode driver 500 receives an X electrode driving signal from the control unit 200 and applies a driving voltage to the X electrodes X1 to Xn. The X electrode driver 500 receives a gate resistance value of a switching element arranged in parallel in an internal circuit. Smaller towards the side.

The Y electrode driver 400 receives the Y electrode driving signal from the controller 200 and applies a driving voltage to the Y electrodes Y1-Yn, and the gate resistance of the switching elements arranged in parallel in the internal circuit is moved from the middle to the outside. It's getting bigger.

Then, the operation of the plasma panel and its driving method according to the embodiment of the present invention having such a configuration will be described in detail.

First, an external video signal is input to the controller 200.

Then, the controller 200 corrects the gamma value according to the characteristics of the plasma display panel, generates the corrected image signal into N subfields, and controls the X electrode driving signal and the Y electrode driving for each subfield. Signal and address electrode drive signal are output.

Then, the address driver 300 receives an address electrode driving signal and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am.

The X electrode driver 500 receives the X electrode driving signal to apply a driving voltage to the X electrodes X1 to Xn, and the Y electrode driving unit 400 receives the Y electrode driving signal to receive the Y electrode Y1 to Yn. Is applied to the driving voltage.

Then, the screen corresponding to the image signal is displayed on the plasma panel 100.

Here, the address electrode driver 300, the scan electrode driver 400, and the sustain electrode driver 500 include a plurality of switches SA1 to SAn, SX1 to SXn, and SY1 to SYN, and turn on / off these switches. The address voltage, the Y electrode driving voltage, and the X electrode driving voltage are applied by turning off, and the resistance value connected to such a switch is applied as it goes from the middle to the outside.

In this case, the outer switch tends to flow a lot of current due to the skin effect, but flows less because the resistance value is large.

The smaller the resistance value, the more current flows. Therefore, if the resistance value is accurately adjusted by experiment, similar current can flow through all the switches.

6 is a diagram showing the results of a simulation of an embodiment of the present invention.

Referring to Fig. 6, this simulation shows the current waveform flowing through each element when the gate resistance values of the three parallel switching elements on the discharge path are different.

The timing at which the FET is turned on is slightly different depending on the resistance value of the gate of each switch. Therefore, if the resistance value in the center with less current burden is set smaller and both resistance values are set relatively large, each FET The amount of current flowing through it becomes a similar level. As a result, the current balance is balanced so that the bias is reduced to one side, thereby reducing the cause of failure of the plasma display panel.

In this embodiment of the present invention, the resistance values are differently applied to all the driving units, but may be selectively applied as necessary.

The present invention is not limited to the above embodiments, but may be modified and improved by those skilled in the art within the spirit and scope of the invention as defined in the claims.

As described above, in the exemplary embodiment of the present invention, the yield value can be improved by reducing the defects caused by the burnout of the device that is continuously subjected to a large current burden by varying the resistance value connected to the switching element of the driving circuit of the plasma display panel. Can be. In addition, the heat generated with it can be evenly distributed to prevent the heat from being concentrated in one place.

1 is a partial perspective view of an AC plasma display panel.

2 shows an electrode arrangement of a plasma display panel.

3 is a diagram showing a current distribution flowing through a pattern of a driving circuit section.

4 is a current waveform passing through eight parallelly arranged switching elements as an example showing a skin effect.

5 is a configuration diagram of a plasma display panel according to an exemplary embodiment of the present invention.

6 is a diagram showing the results of a simulation of an embodiment of the present invention.

Claims (7)

A method of driving a plasma display panel including a scan electrode, a sustain electrode, and an address electrode driven by a driving circuit, A reset step of erasing the wall charge state of the previous sustain discharge and setting up the wall charge to stably perform the next address discharge; An addressing step of selecting an on-cell and a non-on-cell from the panel to accumulate wall charges on the on-cell (addressed cell); A sustaining step of performing a discharge for actually displaying an image on the addressed cell, And applying a gate resistance value of the switching elements arranged in parallel in the driving circuit from the middle to the outside. The method of claim 1, The driving circuit includes a scan electrode driver, a sustain electrode driver, and an address electrode driver for applying a voltage to the scan electrode, the sustain electrode, and the address electrode, respectively, and each driver includes a plurality of switches SA1 to SAn and SX1. ~ SXn, SY1 ~ SYN), the switch is turned on / off to apply the corresponding address voltage, the Y electrode driving voltage, and the X electrode driving voltage, and the resistance value connected to the switch increases from the middle to the outside. And a plasma display panel driving method. A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode; A controller configured to receive an image signal and generate and output a sustain electrode driving signal, a scan electrode driving signal, and an address electrode driving signal; An address electrode driver for applying a voltage to the address electrode of the plasma panel according to an address driving signal output from the controller; A sustain electrode driver for applying a sustain voltage to the sustain electrode according to a sustain electrode driving signal of the controller; And a scan electrode driver configured to apply a scan voltage to the scan electrode according to the scan electrode driving signal of the controller, and apply a gate resistance value of the switching elements arranged in parallel in an internal circuit from the middle to the outside. The method of claim 3, And the address electrode driver applies a gate resistance value of the switching elements arranged in parallel in an internal circuit from the middle to the outside. The method according to claim 3 or 4, And the sustain electrode driver is configured to apply the gate resistance of the switching elements arranged in parallel in the internal circuit from the middle to the outside. A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode; A controller configured to receive an image signal and generate and output a sustain electrode driving signal, a scan electrode driving signal, and an address electrode driving signal; An address electrode driver for applying a voltage to the address electrode of the plasma panel according to an address driving signal output from the controller; A sustain electrode driver for applying a sustain voltage to the sustain electrode according to the sustain electrode driving signal of the controller, and applying a gate resistance value of the switching elements arranged in parallel in an internal circuit from the middle to the outside; And a scan electrode driver for applying a scan voltage to the scan electrode according to the scan electrode driving signal of the controller. A plasma panel including a plurality of address electrodes, a plurality of scan electrodes, and a sustain electrode; A controller configured to receive an image signal and generate and output a sustain electrode driving signal, a scan electrode driving signal, and an address electrode driving signal; An address electrode driver configured to apply a voltage to the address electrode of the plasma panel according to an address driving signal output from the controller, and to apply a gate resistance value of a switching element arranged in parallel in an internal circuit from the middle to the outside; A sustain electrode driver for applying a sustain voltage to the sustain electrode according to a sustain electrode driving signal of the controller; And a scan electrode driver for applying a scan voltage to the scan electrode according to the scan electrode driving signal of the controller.