KR100524480B1 - Tape Carrier Package - Google Patents
Tape Carrier Package Download PDFInfo
- Publication number
- KR100524480B1 KR100524480B1 KR10-1998-0030539A KR19980030539A KR100524480B1 KR 100524480 B1 KR100524480 B1 KR 100524480B1 KR 19980030539 A KR19980030539 A KR 19980030539A KR 100524480 B1 KR100524480 B1 KR 100524480B1
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- South Korea
- Prior art keywords
- coating resin
- semiconductor chip
- slot
- conductive patterns
- tape carrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
본 발명의 테이프캐리어패키지(tape carrier package)는 반도체칩 안착용 슬롯(slot)에 근접한, 코팅수지가 코팅되는 영역의 베이스필름에 코팅수지 고정용 관통홀들이 형성되어 코팅수지가 반도체칩과 도전패턴의 전기적 연결 부분을 보호하도록 반도체칩 안착용 슬롯에 코팅됨과 아울러 코팅수지 고정용 관통홀들에 채워지도록 구성된다.In the tape carrier package of the present invention, through-holes for fixing the coating resin are formed in the base film in the area where the coating resin is coated, close to the slot for the semiconductor chip mounting, so that the coating resin is the semiconductor chip and the conductive pattern. In order to protect the electrical connection portion of the semiconductor chip seating slot is configured to be filled in the through-holes for fixing the coating resin.
따라서, 본 발명은 외부충격이 반도체칩이나 코팅수지에 가해지더라도 코팅수지의 들뜸이나 도전패턴들의 균열 또는 반도체칩과 도전패턴들의 전기적 접속 불량을 방지할 수 있다. 그 결과 제품의 신뢰성이 향상된다.Therefore, the present invention can prevent the lifting of the coating resin, the cracking of the conductive patterns, or the poor electrical connection between the semiconductor chip and the conductive patterns even when an external impact is applied to the semiconductor chip or the coating resin. As a result, product reliability is improved.
Description
본 고안은 테이프캐리어패키지(tape carrier package)에 관한 것으로, 더욱 상세하게는 반도체칩과 도전패턴들과의 접합부를 보호하는 코팅수지의 본딩력을 강화시키기 위해 관통홀을 베이스필름에 형성하여 외부충격에 의한 손상을 방지하도록 한 테이프캐리어패키지에 관한 것이다.The present invention relates to a tape carrier package, and more particularly to the external impact by forming a through hole in the base film to enhance the bonding strength of the coating resin to protect the junction between the semiconductor chip and the conductive patterns. It relates to a tape carrier package to prevent damage caused by.
일반적으로 알려진 바와 같이, 전자기기와 정보기기와 같은 시스템의 다기능화에 맞추어 반도체칩의 다기능화에 대한 요구가 증가하고 있다. 이러한 요구를 충족시키기 위해 입, 출력핀이 다핀화되고 이와 아울러 반도체칩의 크기도 증가한다. 이에 따라 반도체칩을 실장하는 패키지는 실장면적의 최소화를 위해 경박단소화되고 그중에 하나가 테이프캐리어패키지이다.As is generally known, there is an increasing demand for the multifunction of semiconductor chips in accordance with the multifunction of systems such as electronic devices and information devices. To meet these demands, the input and output pins are multiplied and the size of the semiconductor chip increases. Accordingly, a package for mounting a semiconductor chip is light and thin in order to minimize the mounting area, and one of them is a tape carrier package.
종래의 테이프캐리어패키지는 도 1과 도 2에 도시된 바와 같이, 연성기판(10)용 반도체칩 안착용 슬롯(12)으로 연장 진입하도록 베이스필름(11)의 하면에 도전패턴들(13)이 형성되고, 도전패턴들(13)의 보호를 위해 보호막인 솔더 레지스트(15)가 베이스필름(11)의 하면에 형성된다. 반도체칩(1)이 슬롯(12) 내에 위치하도록 반도체칩(1)의 본딩패드들(도시 안됨)은 범프(3)에 의해 슬롯(12) 내의 도전패턴들(13)의 일측단에 전기적으로 연결되고, 반도체칩(1)과 도전패턴들(13)의 전기적 연결부분을 보호하기 위해 코팅수지(20)가 슬롯(12) 내에 코팅되도록 구성된다. 여기서, 연성기판(10)의 양측 장변 가장자리를 따라 이송용 슬롯들(16)이 일정 간격을 두고 형성된다.As shown in FIGS. 1 and 2, the conventional tape carrier package has conductive patterns 13 formed on the bottom surface of the base film 11 so as to extend into the semiconductor chip seating slot 12 for the flexible substrate 10. The solder resist 15, which is a protective film, is formed on the bottom surface of the base film 11 to protect the conductive patterns 13. Bonding pads (not shown) of the semiconductor chip 1 are electrically connected to one end of the conductive patterns 13 in the slot 12 by the bumps 3 so that the semiconductor chip 1 is located in the slot 12. The coating resin 20 is coated in the slot 12 to protect the electrical connection between the semiconductor chip 1 and the conductive patterns 13. Here, the transfer slots 16 are formed at regular intervals along the long side edges of both sides of the flexible substrate 10.
이와 같이 구성되는 종래의 테이프캐리어패키지의 경우, 제한된 공간에 다핀의 반도체칩을 실장하기 때문에 반도체칩(1)의 범프들(3) 및 도전패턴들(13)의 미세 피치가 급속도로 이루어진다. 미세 피치의 테이프캐리어패키지에서는 도전패턴들(13)의 균열이나, 반도체칩(1)과 도전패턴들(13)과의 접합불량이 쉽게 발생하는데, 반도체칩(1)과 도전패턴들(13)과의 접합부를 보호하기 위해 코팅수지(20)가 사용됨으로써 제품의 신뢰성이 어느 정도 확보되어 왔다.In the case of the conventional tape carrier package configured as described above, since the semiconductor chip of the multi-pin is mounted in a limited space, the fine pitches of the bumps 3 and the conductive patterns 13 of the semiconductor chip 1 are rapidly formed. In the tape carrier package having a fine pitch, cracks in the conductive patterns 13 and poor bonding between the semiconductor chip 1 and the conductive patterns 13 easily occur. The semiconductor chip 1 and the conductive patterns 13 may be formed. Since the coating resin 20 is used to protect the joint portion with, the reliability of the product has been secured to some extent.
그런데, 종래에는 코팅수지(20)가 반도체칩(1)의 범프들(3)과 도전패턴들(13)에 접촉함은 물론 슬롯(12)에 근접한 연성기판(10)의 영역에도 코팅된다. 이때, 베이스필름(11)의 표면은 매끄럽기 때문에 코팅수지(20)는 다른 부분에 비하여 베이스필름(11)에 대해 상대적으로 약한 접착력을 나타낸다.However, in the related art, the coating resin 20 is not only in contact with the bumps 3 and the conductive patterns 13 of the semiconductor chip 1 but also coated in the region of the flexible substrate 10 adjacent to the slot 12. At this time, since the surface of the base film 11 is smooth, the coating resin 20 exhibits relatively weak adhesion to the base film 11 compared to other portions.
이로 말미암아, 반도체칩(1) 또는 코팅수지(20)에 직접 외부 충격이 가해질 경우, 반도체칩(1)의 범프들(3)과 도전패턴들(13)에 그대로 직접 전달되므로 도전패턴들(13)의 균열이나 범프들(3)과 도전패턴들(13)의 접속이 끊어지는 접속불량이 발생하기 쉽다.As a result, when an external impact is directly applied to the semiconductor chip 1 or the coating resin 20, the conductive patterns 13 are directly transmitted to the bumps 3 and the conductive patterns 13 of the semiconductor chip 1 as they are. ) Cracks or poor connection between the bumps 3 and the conductive patterns 13 are likely to occur.
또한, 종래의 테이프캐리어패키지를 인쇄회로기판(도시 안됨)에 본딩시킬 때 본딩용 헤드(도시 안됨)의 가압에 의한 외부충격으로 인해 코팅수지(20)의 들뜸이 발생하기 쉽다. 그 결과, 제품 품질에 치명적인 불량이 발생할 가능성이 높다.In addition, when the conventional tape carrier package is bonded to a printed circuit board (not shown), the coating resin 20 is likely to be lifted due to the external impact caused by the pressure of the bonding head (not shown). As a result, there is a high possibility of a fatal defect in product quality.
따라서, 본 발명의 목적은 코팅수지의 부착력을 강화시켜 코팅수지의 들뜸을 방지하도록 한 것이다.Therefore, an object of the present invention is to prevent the lifting of the coating resin by strengthening the adhesion of the coating resin.
본 발명의 다른 목적은 코팅수지의 부착력을 강화시켜 도전패턴들의 균열을 방지하도록 한 것이다.Another object of the present invention is to strengthen the adhesion of the coating resin to prevent cracking of the conductive patterns.
본 발명의 또 다른 목적은 코팅수지의 접착력을 강화시켜 반도체칩의 범프들과 도전패턴들과의 접속 불량을 방지하도록 한 것이다.Another object of the present invention is to enhance the adhesive force of the coating resin to prevent a bad connection between the bumps and the conductive patterns of the semiconductor chip.
본 발명의 다른 목적은 다음의 상세한 설명 및 첨부된 도면에 의해 보다 명확해질 것이다.Other objects of the present invention will become more apparent from the following detailed description and the accompanying drawings.
이와 같은 목적을 달성하기 위한 본 발명은 연성기판의 반도체칩 안착용 슬롯의 정해진 영역에 코팅수지 고정용 관통홀들이 형성되고 관통홀들이 코팅수지로 채워진다.In order to achieve the above object, the present invention provides a through hole for fixing a coating resin in a predetermined region of a slot for mounting a semiconductor chip of a flexible substrate, and the through holes are filled with a coating resin.
상기 반도체칩 안착용 슬롯은 예를 들어 직사각형으로 형성되고, 코팅수지 고정용 관통홀은 반도체칩 안착용 슬롯의 각 모서리에 위치한다.The semiconductor chip seating slot is formed in a rectangular shape, for example, and the through hole for fixing the coating resin is located at each corner of the slot for seating the semiconductor chip.
따라서, 연성기판의 베이스필름에 대한 코팅수지의 부착력이 증가하므로 외부충격을 받더라도 코팅수지의 들뜸이나 도전패턴들의 균열, 또는 반도체칩의 범프들과 도전패턴들과 접속불량이 방지됨으로써 제품의 신뢰성이 향상된다.Therefore, the adhesion of the coating resin to the base film of the flexible substrate is increased, thereby preventing the lifting of the coating resin, cracking of the conductive patterns, or poor connection with the bumps and conductive patterns of the semiconductor chip, even when subjected to external impact. Is improved.
이하, 본 발명에 의한 테이프캐리어패키지를 첨부된 도면을 참조하여 상세히 설명하기로 한다. 종래의 부분과 동일한 부분에는 동일한 부호를 부여한다.Hereinafter, a tape carrier package according to the present invention will be described in detail with reference to the accompanying drawings. The same code | symbol is attached | subjected to the part same as a conventional part.
도 3과 도 4를 참조하면, 본 발명의 테이프캐리어패키지는 코팅수지 고정용 관통홀들(16)이 코팅수지(16)가 코팅되는 영역의 연성기판(10)을 수직 관통하도록 형성된 것을 제외하면, 종래의 테이프캐리어패키지와 동일한 구조로 이루어져 있다. 관통홀들(16)은 반도체칩 안착용 직사각형 슬롯(12)의 각 모서리 근처에 위치하며 코팅수지(20)로 채워진다.3 and 4, except that the tape carrier package of the present invention is formed such that the through-holes 16 for fixing the coating resin are vertically penetrated through the flexible substrate 10 in the area where the coating resin 16 is coated. It is made of the same structure as a conventional tape carrier package. The through holes 16 are located near each corner of the rectangular slot 12 for seating the semiconductor chip and are filled with the coating resin 20.
이와 같이 구성되는 본 발명의 테이프캐리어패키지에서는 코팅수지(20)가 반도체칩 안착용 슬롯(12)은 물론 슬롯(12)에 이웃한 연성기판(10)의 영역 상에도 코팅되고, 코팅수지 고정용 관통홀들(16)에도 코팅수지(20)가 채워진다.In the tape carrier package of the present invention configured as described above, the coating resin 20 is coated not only on the semiconductor chip seating slot 12 but also on an area of the flexible substrate 10 adjacent to the slot 12, and for fixing the coating resin. The coating resin 20 is also filled in the through holes 16.
이때, 베이스필름(11)의 표면이 매끄럽더라도 연성기판(10)을 관통하는 관통홀(16)에 코팅수지(20)가 채워지므로 코팅수지(20)는 다른 부분에 비하여 베이스필름(11)에 대해 결코 약한 접착력을 갖지 않는다.At this time, even if the surface of the base film 11 is smooth, the coating resin 20 is filled in the through-hole 16 penetrating through the flexible substrate 10, so that the coating resin 20 has a base film 11 compared to other portions. Never has a weak adhesion to.
그러므로, 반도체칩(1) 또는 코팅수지(20)에 외부충격이 가해지는 경우, 외부충격이 반도체칩(1)의 범프들(3)이나 도전패턴들(13)에 직접 전달되지 않는다. 따라서, 도전패턴들(13)의 균열 또는 도전패턴들(13)과 범프들(3)과의 접속불량이 발생하지 않는다. 특히, 테이프캐리어패키지를 인쇄회로기판에 실장할 때 본딩 헤드에 의한 외부충격이 있더라도 코팅수지(20)의 들뜸이 방지된다. 그 결과 제품의 신뢰성이 향상된다.Therefore, when an external shock is applied to the semiconductor chip 1 or the coating resin 20, the external shock is not directly transmitted to the bumps 3 or the conductive patterns 13 of the semiconductor chip 1. Accordingly, cracks in the conductive patterns 13 or poor connection between the conductive patterns 13 and the bumps 3 do not occur. In particular, when the tape carrier package is mounted on the printed circuit board, even if there is an external impact by the bonding head, the lifting of the coating resin 20 is prevented. As a result, product reliability is improved.
이상에서 살펴본 바와 같이, 본 발명에 의한 테이프캐리어패키지는 반도체칩 안착용 슬롯에 근접한, 코팅수지가 코팅되는 영역의 연성기판에 코팅수지 고정용 관통홀들이 형성되어 코팅수지가 반도체칩과 도전패턴의 전기적 연결부분을 보호하도록 반도체칩 안착용 슬롯에 코팅됨과 아울러 코팅수지 고정용 관통홀들에 채워지도록 구성된다.As described above, the tape carrier package according to the present invention is formed with through holes for fixing the coating resin in the flexible substrate in the region where the coating resin is coated, close to the slot for the semiconductor chip mounting, so that the coating resin is formed of the semiconductor chip and the conductive pattern. It is configured to be filled in the semiconductor resin seating slot to protect the electrical connection portion and filled in the through-holes for fixing the coating resin.
따라서, 본 발명은 외부충격이 반도체칩이나 코팅수지에 가해지더라도 코팅수지의 들뜸이나 도전패턴들의 균열 또는 반도체칩과 도전패턴들의 전기적 접속 불량을 방지되므로 제품의 신뢰성이 향상된다.Therefore, the present invention improves the reliability of the product, even if the external impact is applied to the semiconductor chip or the coating resin, since the lifting of the coating resin, the cracking of the conductive patterns, or the poor electrical connection between the semiconductor chip and the conductive patterns are prevented.
한편, 본 발명은 당 분야에 통상의 지식을 가진 자에게 있어서 도면과 상세한 설명에 기재된 특정한 예에 한정되지 아니하고 다양한 변형의 가능함은 자명한 사실이다. 본 발명의 다양한 변형은 본 발명의 사상과 관점을 벗어나지 않는 범위 내에서 개별적으로 이해되지 아니하며 첨부된 특허청구의 범위에 속하는 것으로 간주하여야 할 것이다.On the other hand, the present invention is apparent to those skilled in the art that various modifications are possible without being limited to the specific examples described in the drawings and detailed description. Various modifications of the present invention are not to be understood individually within the scope without departing from the spirit and perspective of the present invention and should be regarded as falling within the scope of the appended claims.
도 1은 종래 기술에 의한 테이프캐리어패키지를 나타낸 평면사시도.1 is a plan perspective view showing a tape carrier package according to the prior art.
도 2는 도 1의 Ⅰ-Ⅰ선을 따라 절단한 단면도.FIG. 2 is a cross-sectional view taken along the line II of FIG. 1. FIG.
도 3은 본 발명에 의한 테이프캐리어패키지를 나타낸 평면사시도.Figure 3 is a perspective view showing a tape carrier package according to the present invention.
도 4는 도 3의 Ⅲ-Ⅲ 선을 따라 절단한 단면도.4 is a cross-sectional view taken along the line III-III of FIG. 3.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for main parts of the drawings>
1: 반도체칩 3: 범프(bump) 11: 베이스필름 12: 반도체칩 안착용 슬롯 13: 도전패턴 14: 이송용 슬롯 15: 솔더 레지스트 16: 코팅수지 고정용 관통홀 20: 코팅수지 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 3: Bump 11: Base film 12: Slot for mounting a semiconductor chip 13: Conductive pattern 14: Transfer slot 15: Solder resist 16: Coating resin fixing hole 20: Coating resin
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-1998-0030539A KR100524480B1 (en) | 1998-07-29 | 1998-07-29 | Tape Carrier Package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-1998-0030539A KR100524480B1 (en) | 1998-07-29 | 1998-07-29 | Tape Carrier Package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20000009886A KR20000009886A (en) | 2000-02-15 |
| KR100524480B1 true KR100524480B1 (en) | 2005-12-30 |
Family
ID=19545554
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-1998-0030539A KR100524480B1 (en) | 1998-07-29 | 1998-07-29 | Tape Carrier Package |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100524480B1 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0685111A (en) * | 1992-09-07 | 1994-03-25 | Hitachi Ltd | Tape carrier type semiconductor device and its assembly method |
| JPH06163619A (en) * | 1992-11-27 | 1994-06-10 | Hitachi Ltd | Semiconductor device and tranfer mold die used for its manufacture |
| KR970003228U (en) * | 1995-06-30 | 1997-01-24 | 현대전자산업주식회사 | Semiconductor device |
| JPH0964092A (en) * | 1995-08-30 | 1997-03-07 | Sharp Corp | Mounting structure of device |
-
1998
- 1998-07-29 KR KR10-1998-0030539A patent/KR100524480B1/en active IP Right Grant
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0685111A (en) * | 1992-09-07 | 1994-03-25 | Hitachi Ltd | Tape carrier type semiconductor device and its assembly method |
| JPH06163619A (en) * | 1992-11-27 | 1994-06-10 | Hitachi Ltd | Semiconductor device and tranfer mold die used for its manufacture |
| KR970003228U (en) * | 1995-06-30 | 1997-01-24 | 현대전자산업주식회사 | Semiconductor device |
| JPH0964092A (en) * | 1995-08-30 | 1997-03-07 | Sharp Corp | Mounting structure of device |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20000009886A (en) | 2000-02-15 |
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