KR100518868B1 - Image sensor and manufacturing method - Google Patents
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- KR100518868B1 KR100518868B1 KR10-1998-0030958A KR19980030958A KR100518868B1 KR 100518868 B1 KR100518868 B1 KR 100518868B1 KR 19980030958 A KR19980030958 A KR 19980030958A KR 100518868 B1 KR100518868 B1 KR 100518868B1
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- 206010034972 Photosensitivity reaction Diseases 0.000 abstract 1
- 230000036211 photosensitivity Effects 0.000 abstract 1
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
Abstract
본 발명은 핀드 포토다이오드의 피닝층에서 단파장의 빛이 흡수되어 단파장에 대한 이미지 구현이 저하되는 것을 방지하여, 단파장에 대한 광감도가 증대된 이미지센서 및 그 제조방법을 제공하고자 하는 것으로, 이를 위한 본 발명의 이미지센서는, 제1도전형의 반도체층; 상기 반도체층의 일부영역 상부에 형성된 게이트 전극; 상기 게이트전극의 에지에 근접한 상기 반도체층 내부에 형성된 제2도전형의 제1확산영역; 상기 반도체층의 표면 하부에서 상기 제1확산영역 상에 형성된 제1도전형의 제2확산영역; 상기 게이트전극의 측벽과 상기 제2확산영역의 일부영역상에 형성된 스페이서; 및 상기 스페이서에 의해 오픈된 부위의 상기 제2확산영역에 형성된 리세스부를 포함하여 이루어진다.The present invention is to provide an image sensor and a method of manufacturing the same to increase the photosensitivity of the short wavelength by preventing the light of the short wavelength is absorbed in the pinning layer of the pinned photodiode to reduce the implementation of the image for the short wavelength. The image sensor of the invention comprises: a semiconductor layer of a first conductivity type; A gate electrode formed over a portion of the semiconductor layer; A first diffusion region of a second conductivity type formed in the semiconductor layer proximate an edge of the gate electrode; A second diffusion region of a first conductivity type formed on the first diffusion region below the surface of the semiconductor layer; A spacer formed on a sidewall of the gate electrode and a partial region of the second diffusion region; And a recess formed in the second diffusion region of the portion opened by the spacer.
Description
본 발명은 이미지센서(image sensor) 및 그 제조방법에 관한 것으로, 특히 단파장에 대한 광감도가 증대된 이미지센서 및 그 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor and a method of manufacturing the same, and more particularly, to an image sensor having an increased sensitivity to short wavelengths and a method of manufacturing the same.
일반적으로, 이미지센서라 함은 광학적 이미지(optical image)를 전기 신호로 변환시키는 반도체소자로써, 크게 CCD(charge coupled device) 이미지센서와 CMOS 이미지센서로 구분된다. CCD 이미지센서는 광전하가 캐패시터에 저장되고 이송되는 소자인 반면에, CMOS 이미지센서는 제어회로 및 신호처리회로를 주변회로로 사용하는 CMOS 기술을 이용하여 화소수만큼 MOS트랜지스터를 만들고 이것을 이용하여 차례차례 출력(output)을 검출하는 스위칭 방식을 채용하고 있다.In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and is generally classified into a charge coupled device (CCD) image sensor and a CMOS image sensor. The CCD image sensor is a device in which photocharges are stored and transported in a capacitor, whereas the CMOS image sensor uses a CMOS technology that uses a control circuit and a signal processing circuit as a peripheral circuit to make MOS transistors as many as the number of pixels and uses them in turn. The switching method which detects the output in turn is employ | adopted.
도1은 종래의 CMOS 또는 CCD 이미지센서 일부 구조를 나타내는 단면도로서, 이미지센서를 구성하는 여러 요소 중에서, 핀드 포토다이오드(PPD : Pinned Photodiode)와 트랜스퍼게이트(Tx) 및 플로팅확산(8)만이 도시되어 있다.1 is a cross-sectional view showing a structure of a conventional CMOS or CCD image sensor. Among the various elements constituting the image sensor, only a pinned photodiode (PPD), a transfer gate (Tx), and a floating diffusion 8 are shown. have.
도1을 참조하면, 핀드 포토다이오드(PPD)는 P0확산영역(6), N-확산영역(7) 및 P-에피층(2)에 의해 P/N/P 접합을 가지며 N-확산영역(7)은 공핍시 완전공핍되게 된다. 도핑농도는 P0확산영역(6)이 N-확산영역(7)보다 크고, N-확산영역(7)이 P-에피층(2) 보다 크다. 따라서, 도면에 도시된 바와 같이 완전공핍시 공핍영역은 P-에피층(2) 깊숙히 형성되게 된다. 공핍영역이 깊어야만 광전하를 보다 많아 모아서 플로팅확산(8)으로 전달할 수 있다. 피닝층(Pinning layer)인 P0확산영역(6)은 공핍시 P-에피층(2)과 서로 등전위를 가져야 하기 때문에, P0확산영역(6)과 P-에피층(2)이 전기적으로 충분히 연결되도록, N-확산영역(7)은 그 일부영역이 필드산화막(FOX)(3)으로부터 이격되어 있다. 트랜스퍼게이트(Tx)는 핀드 포토다이오드에 모아진 광전하를 플로팅확산(8)으로 스위칭 전달하여주는 역할을 하는 것으로, 게이트산화막(4)을 개재하여 P-에피층(2) 상에 형성된 게이트전극(5)을 포함한다. P-에피층(2)은 P+기판(1) 상에 저농도로 에피택셜 성장된 층이다.Referring to FIG. 1, the pinned photodiode PPD has a P / N / P junction by a P 0 diffusion region 6, an N − diffusion region 7, and a P-epi layer 2 and an N − diffusion region. (7) becomes complete depletion at depletion. P 0 is the doping concentration region 6 the N - diffusion region is greater than 7, N - diffusion region 7 is larger than the P- epi layer (2). Therefore, as shown in the figure, the depletion region at the time of complete depletion is to be formed deep in the P-epitaxial layer 2. Only when the depletion region is deep, more photocharges can be collected and transferred to the floating diffusion (8). Since the P 0 diffusion region 6, which is a pinning layer, must have an equipotential with the P- epi layer 2 at the time of depletion, the P 0 diffusion region 6 and the P- epi layer 2 are electrically In order to be sufficiently connected, the partial region of the N − diffusion region 7 is spaced apart from the field oxide film (FOX) 3. The transfer gate Tx serves to switch and transfer the photocharges collected in the pinned photodiode to the floating diffusion 8, and includes a gate electrode formed on the P-epi layer 2 via the gate oxide film 4. 5) includes. The P-epitaxial layer 2 is a layer epitaxially grown on the P + substrate 1 at low concentration.
한편, 피닝층(Pinning layer)인 P0확산영역(6)이 두꺼워질수록, 단파장의 청색 빛이 P0확산영역(6)에 흡수되어 청색에 대한 감도가 떨어지기 때문에 P0확산영역(6) 형성시 약 30 keV이하의 낮은 에너지를 사용하여 약 0.15 ㎛ 이하의 얕은 접합(shallow junction)을 갖도록 하는 방법을 사용하고 있다.Meanwhile, the thicker the P 0 diffusion region 6, which is a pinning layer, is absorbed by the P 0 diffusion region 6 and the sensitivity to blue is lowered, so that the P 0 diffusion region 6 is reduced. At the time of formation, the low energy of about 30 keV or less is used to have a shallow junction of about 0.15 μm or less.
그럼에도 불구하고, 상기 P0확산영역(6) 형성 이후의 여러 열공정을 거치는 동안 P0확산영역(6)이 이온주입시에 비하여 더 확산되어 접합 깊이가 깊어짐에 따라, 결국에는 단파장의 청색 빛이 P0확산영역(6)에 흡수되어 청색을 구현하기가 어렵게 되는 문제점이 여전히 상존하였다.Nevertheless, the P P zero region 6 moves through the various thermal process after the zero region 6 is formed is more diffuse than that at the time of ion implantation in accordance with the junction depth polarization, the end of the short wavelength blue light The problem of being absorbed in the P 0 diffusion region 6 and making it difficult to implement blue color still remained.
본 발명은 목적은 핀드 포토다이오드의 피닝층에서 단파장의 빛이 흡수되어 단파장에 대한 이미지 구현이 저하되는 것을 방지하여, 단파장에 대한 광감도가 증대된 이미지센서 및 그 제조방법을 제공하는데 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide an image sensor and a method of manufacturing the same, wherein the light of the short wavelength is absorbed in the pinning layer of the pinned photodiode to prevent the image implementation of the short wavelength from being degraded.
또한 본 발명의 다른 목적은 단파장에 대한 광감도를 증대시키기 위한 이미지센서의 핀드 포토다이오드를 제공하는데 있다.Another object of the present invention is to provide a pinned photodiode of an image sensor for increasing light sensitivity for short wavelengths.
상기 목적을 달성하기 위한 본 발명의 핀드 포토다이오드는, 제1도전형의 반도체층; 상기 반도체층의 표면 하부에 형성되되, 자신의 일부 표면이 소정깊이 식각된 리세스부를 갖는 제1도전형의 제1확산영역; 및 상기 제1확산영역 하부의 상기 반도체층 내에 형성된 제2도전형의 제2확산영역을 포함하여 이루어진다. The pinned photodiode of the present invention for achieving the above object, the first conductive semiconductor layer; A first diffusion region of a first conductivity type formed under the surface of the semiconductor layer and having a recessed portion whose surface is etched a predetermined depth; And a second diffusion region of a second conductivity type formed in the semiconductor layer under the first diffusion region.
또한, 본 발명의 이미지센서는, 제1도전형의 반도체층; 상기 반도체층의 일부영역 상부에 형성된 게이트 전극; 상기 게이트전극의 에지에 근접한 상기 반도체층 내부에 형성된 제2도전형의 제1확산영역; 상기 반도체층의 표면 하부에서 상기 제1확산영역 상에 형성된 제1도전형의 제2확산영역; 상기 게이트전극의 측벽과 상기 제2확산영역의 일부영역상에 형성된 스페이서; 및 상기 스페이서에 의해 오픈된 부위의 상기 제2확산영역에 형성된 리세스부를 포함하여 이루어진다.In addition, the image sensor of the present invention, the first conductive semiconductor layer; A gate electrode formed over a portion of the semiconductor layer; A first diffusion region of a second conductivity type formed in the semiconductor layer proximate an edge of the gate electrode; A second diffusion region of a first conductivity type formed on the first diffusion region below the surface of the semiconductor layer; A spacer formed on a sidewall of the gate electrode and a partial region of the second diffusion region; And a recess formed in the second diffusion region of the portion opened by the spacer.
또한, 본 발명의 이미지센서 제조방법은, 제1도전형의 반도체층을 준비하는 제1단계; 상기 반도체층의 일부영역 상부에 게이트 전극을 형성하는 제2단계; 상기 게이트전극의 에지에 근접한 상기 반도체층 내부에 제2도전형의 제1확산영역을 형성하는 제3단계; 상기 반도체층의 표면 하부에서 상기 제1확산영역 상에 제1도전형의 제2확산영역을 형성하는 제4단계; 상기 게이트전극의 측벽과 상기 제2확산영역의 일부영역 상에 절연막스페이서를 형성하는 제5단계; 및 상기 스페이서에 의해 오픈된 부위의 상기 제2확산영역 일부두께를 식각하여 리세스부를 형성하는 제6단계를 포함하여 이루어진다. In addition, the image sensor manufacturing method of the present invention, the first step of preparing a semiconductor layer of the first conductivity type; Forming a gate electrode on a portion of the semiconductor layer; A third step of forming a first diffusion region of a second conductivity type in the semiconductor layer adjacent to an edge of the gate electrode; Forming a second diffusion region of a first conductivity type on the first diffusion region below the surface of the semiconductor layer; Forming an insulating film spacer on sidewalls of the gate electrode and a partial region of the second diffusion region; And a sixth step of forming a recess by etching the partial thickness of the second diffusion region of the portion opened by the spacer.
바람직하게, 상기 제5단계는, 상기 제4단계가 완료된 기판 전면에 절연막을 형성하는 단계; 및 상기 절연막을 비등방성 전면식각하여 상기 절연막 스페이서를 형성하는 단계를 포함하여 이루어지며, 상기 리세스부는 상기 비등방성 전면식각시 과도식각하여 형성한다. 그리고, 바람직하게, 상기 과도식각시 발생된 폴리머를 제거하기 위하여 NF3 + Ar 또는 CF4 + O2 플라즈마 처리를 실시하거나 HF + NH4F 또는 NH4OH + H2O2 화학용액 처리를 실시할 수 있다.Preferably, the fifth step may include forming an insulating film on the entire surface of the substrate on which the fourth step is completed; And anisotropically etching the insulating film to form the insulating film spacer, and the recess portion is formed by over-etching the anisotropic whole etching. In addition, preferably, NF 3 + Ar or CF 4 + O 2 plasma treatment or HF + NH 4 F or NH 4 OH + H 2 O 2 chemical solution treatment is performed in order to remove the polymer generated during the excessive etching. can do.
또한, 본 발명의 핀드 포토다이오드 또는 이미지센서 또는 이미지센서 제조방법에서, 바람직하게 상기 제1확산영역과 상기 반도체층이 공핍시 서로 등전위를 갖도록, 상기 제2확산영역은 자신의 에지 일부가 오픈되어 있고, 상기 오픈된 부위를 통해 상기 제1확산영역의 일부가 상기 반도체층 상에 직접 형성된다. 또한, 바람직하게 상기 반도체층은 제1도전형의 반도체기판 상에 저농도로 에피택셜 성장된 층을 사용한다. 바람직하게 상기 제1확산영역은 약 0.15㎛의 깊이를 가지며, 상기 리세스부는 200～1,000Å의 깊이를 갖는다.In addition, in the method of manufacturing a pinned photodiode or an image sensor or an image sensor of the present invention, the second diffusion region may have a portion of its edge open so that the first diffusion region and the semiconductor layer have an equipotential with each other when they deplete. A portion of the first diffusion region is directly formed on the semiconductor layer through the open portion. In addition, the semiconductor layer preferably uses a layer epitaxially grown on the first conductive semiconductor substrate at low concentration. Preferably, the first diffusion region has a depth of about 0.15㎛, the recess portion has a depth of 200 ~ 1,000Å.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명하기로 한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.
도2는 본 발명의 일실시예에 따른 이미지센서의 구조를 나타내는 단면도로서, 도2를 참조하면, 본 발명의 일실시예에 따른 이미지센서는, 핀드 포토다이오드(PPD)와, 트랜스퍼게이트(Tx)를 포함하는데, 트랜스퍼게이트(Tx)는 P-에피층(P-epi)(202) 상에 게이트산화막(203)을 개재하여 형성된 게이트전극(204)을 포함하고, 게이트전극(204) 측벽에는 절연막스페이서(205)가 형성되어 있다. 핀드 포토다이오드(PPD)는 게이트전극(205)에 근접한 P-에피층(202) 내에 적층된 P0확산영역(206)과 N-확산영역(207)에 의해 형성되는데, 주목할 점은 피닝층인 P0확산영역(206)이 본래 P-에피층(202)의 표면으로부터 식각되어 형성된 리세스(recess)부(200)를 갖는다는 것이다. 이 리세스부(200)에 의해 본 발명의 핀드 포토다이오드(PPD)는 피닝층(Pinning layer)에서 단파장의 빛이 흡수되어 단파장에 대한 이미지 구현이 저하되는 것을 방지하여, 단파장에 대한 광감도가 증대시키게 된다.FIG. 2 is a cross-sectional view illustrating a structure of an image sensor according to an embodiment of the present invention. Referring to FIG. 2, an image sensor according to an embodiment of the present invention includes a pinned photodiode (PPD) and a transfer gate (Tx). The transfer gate (Tx) includes a gate electrode 204 formed on the P-epi layer (P-epi) 202 via a gate oxide film 203, and on the sidewall of the gate electrode 204 An insulating film spacer 205 is formed. The pinned photodiode (PPD) is formed by the P 0 diffusion region 206 and the N − diffusion region 207 stacked in the P-epi layer 202 proximate to the gate electrode 205. Note that the pinned layer is a pinning layer. The P 0 diffusion region 206 originally has a recess 200 formed by etching from the surface of the P-epi layer 202. The recessed portion 200 prevents the pinned photodiode (PPD) of the present invention from absorbing light of a short wavelength in the pinning layer and degrading an image of the short wavelength, thereby increasing light sensitivity of the short wavelength. Let's go.
한편, P0확산영역(206)은 공핍시 P-에피층(202)과 서로 등전위를 가져야 하기 때문에, P0확산영역(206)과 P-에피층(202)이 전기적으로 충분히 연결되도록, N-확산영역(207)은 그 일부영역이 필드산화막(FOX)(208)으로부터 이격되어 있다. P-에피층(202)은 P+기판(P+-sub.)(201) 상에 저농도로 에피택셜 성장된 층이다.On the other hand, since the P 0 diffusion region 206 should have an equipotential with the P- epi layer 202 at the time of depletion, the P 0 diffusion region 206 and the P- epi layer 202 are sufficiently electrically connected to each other. A partial region of the diffusion region 207 is spaced apart from the field oxide film (FOX) 208. The P-epitaxial layer 202 is a layer epitaxially grown on the P + substrate (P + -sub.) 201.
도3a 내지 도3e는 본 발명의 일실시예에 따른 이미지센서 제조 방법을 나타내는 공정 단면도이다.3A to 3E are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the present invention.
먼저, 도3a와 같이 붕소(boron)와 같은 P형 불순물을 함유하여 약 10 ～ 50 Ω/ 의 면저항을 갖는 P-에피층(12)이 형성된 P+기판(11)을 준비한 다음, P-에피층(12) 상에 국부적선택산화법(LOCOS; Local Oxidation of Silicon) 또는 트렌치 격리법(Trench Isolation)을 이용하여 필드산화막(13)을 형성한다. 이어서, 게이트산화막(14) 및 게이트전극(15)을 형성하고, P형 불순물의 선택적 이온주입에 의해 약 0.15 ㎛ 이하의 얕은 깊이을 갖는 P0확산영역(16)을 형성한 다음, P형 불순물의 선택적 이온주입에 의해 N-확산영역(18)을 형성한다. 여기서, N-확산영역(18)은 그 일부영역이 필드산화막(13)으로부터 약 0.1 ～ 0.3 ㎛ 정도 이격되도록 형성한다. 그리고, 게이트전극(15)은 트랜스퍼게이트의 게이트전극으로써 도핑된 폴리실리콘막, 금속실리사이드막 및 난반사방지막을 차례로 적층시켜 형성할 수 있다.First, as shown in FIG. 3A, a P + substrate 11 having a P- epi layer 12 having a sheet resistance of about 10 to 50 Ω / containing P-type impurities such as boron is prepared, and then P-epi. The field oxide layer 13 is formed on the layer 12 using LOCOS (Local Oxidation of Silicon) or Trench Isolation. Subsequently, the gate oxide film 14 and the gate electrode 15 are formed, and a P 0 diffusion region 16 having a shallow depth of about 0.15 μm or less is formed by selective ion implantation of the P-type impurity. Selective ion implantation forms an N − diffusion region 18. Here, the N − diffusion region 18 is formed such that a partial region thereof is spaced apart from the field oxide film 13 by about 0.1 to 0.3 μm. The gate electrode 15 may be formed by sequentially stacking a doped polysilicon film, a metal silicide film, and an antireflection film as a gate electrode of the transfer gate.
이어서, 도3b와 같이 전체 구조의 상부에 약 1,500 ～ 2,500 Å의 두께를 갖는 스페이서용 절연막(19)을 증착한다. 상기 스페이서용 절연막(19)은 화학기상증착법에 의한 산화막 또는 질화막을 사용할 수 있다.Subsequently, as shown in FIG. 3B, an insulating film 19 for spacers having a thickness of about 1,500 to 2,500 mm 3 is deposited on the entire structure. The spacer insulating film 19 may use an oxide film or a nitride film by chemical vapor deposition.
이어서, 도3c에 도시된 바와 같이, 상기 스페이서용 절연막(19)을 비등방성 전면식각하되 과도식각하여 게이트전극(15)의 측벽에 절연막스페이서(20)를 형성하되, 과도식각에 의해 노출된 P0확산영역(16)이 약 200 ～ 1,000 Å 정도 식각되도록 하여 리세스부(200)를 형성한다. 물론 플로팅확산이 형성될 영역의 P-에피층(12) 표면도 동시에 식각되어 진다. 이때, 상기 비등방성 과도식각시 발생하는 하이드로카본(-CHx) 성분을 함유한 폴리머가 P0확산영역(16)을 포함한 전체의 표면에 흡착되어 이후의 열공정시 탄화됨으로써, 빛을 흡수하는 흑체(black body)의 역할을 하게 되어, 이는 결국 흰색의 구현이 어렵게 할 수 있으므로, 이와 같은 문제점을 효과적으로 방지하기 위하여 비등방성 과도식각한 후에, NF3 + Ar 또는 CF4 + O2 플라즈마를 추가로 처리하거나, HF + NH4F 또는 NH4OH + H2O2 화학용액 처리를 실시할 수도 있다.Subsequently, as shown in FIG. 3C, the spacer insulating film 19 is anisotropically etched and overetched to form the insulating film spacer 20 on the sidewall of the gate electrode 15. 0, the diffusion region 16 formed by the recess portion 200 so that the etching for about 200 ~ 1,000 Å. Of course, the surface of the P-epi layer 12 in the area where the floating diffusion is to be formed is also etched at the same time. At this time, the polymer containing the hydrocarbon (-CH x ) component generated during the anisotropic transient etching is adsorbed on the entire surface including the P 0 diffusion region 16 and carbonized during the subsequent thermal process, thereby absorbing light (black body), which in turn can make the implementation of white difficult, so after anisotropic overetching to effectively prevent this problem, additional NF 3 + Ar or CF 4 + O 2 plasma Treatment or HF + NH 4 F or NH 4 OH + H 2 O 2 chemical solution treatment.
이어서, 도3d에 도시된 바와 같이, 포토다이오드 영역 및 게이트 전극(15)의 일측을 포함한 특정 부위에 감광막 패턴(21)을 형성하고, 노출된 게이트전극(15)의 타측벽에 형성된 절연막스페이서(20)를 제거하되, 상기 절연막스페이서(20)가 산화막일 경우에는 HF 용액으로, 질화막일 경우에는 인산 용액으로 제거한 다음, N형 불순물을 이온주입하여 N+플로팅확산(22)을 형성한다.Subsequently, as shown in FIG. 3D, the photoresist pattern 21 is formed on a specific portion including the photodiode region and one side of the gate electrode 15, and an insulating film spacer formed on the other side wall of the exposed gate electrode 15 ( 20), but the insulating spacer 20 is removed with an HF solution in the case of an oxide film and a phosphoric acid solution in the case of a nitride film, and then ion implanted with N-type impurities to form N + floating diffusion 22.
마지막으로, 도3e에 도시된 바와 같이, 상기 감광막 패턴(21)을 제거함으로써, P형 불순물의 이온주입시에 비하여 더욱 얇아진 P0확산영역(16)을 갖는 포토다이오우드를 형성한다.Finally, to form a photo diode, having an ion further thinned P 0 diffusion region 16 than at the time of injection by removing the photoresist pattern (21), P type impurity as shown in Figure 3e.
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
본 발명은 얕은 피닝층을 갖고 있으므로, 단파장인 청색광에 대한 광감도를 증대시키므로써 이미지센서의 해상도를 향상케 한다.Since the present invention has a shallow pinning layer, the resolution of the image sensor can be improved by increasing the light sensitivity of the short wavelength blue light.
도1은 종래의 CMOS 또는 CCD 이미지센서 일부 구조를 나타내는 단면도.1 is a cross-sectional view showing a structure of a conventional CMOS or CCD image sensor.
도2는 본 발명의 일실시예에 따른 이미지센서의 구조를 나타내는 단면도.Figure 2 is a cross-sectional view showing the structure of an image sensor according to an embodiment of the present invention.
도3a 내지 도3e는 본 발명의 일실시예에 따른 이미지센서 제조 방법을 나타내는 공정 단면도.3A to 3E are cross-sectional views illustrating a method of manufacturing an image sensor according to an embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
PPD : 핀드 포토다이오드 Tx : 트랜스퍼게이트PPD: Pinned Photodiode Tx: Transfergate
201 : P+기판 202 : P-에피층201: P + substrate 202: P- epi layer
203 : 게이트산화막 204 : 게이트전극203: gate oxide film 204: gate electrode
205 : 절연막스페이서 206 : P0확산영역205: insulating film spacer 206: P 0 diffusion region
207 : N-확산영역 200 : 리세스(recess)부207 N - diffusion region 200 recess portion
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| KR19990061335A (en) * | 1997-12-31 | 1999-07-26 | 윤종용 | Charge-coupled solid-state imaging device and method of manufacturing the same |
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| JPS63168048A (en) * | 1986-12-27 | 1988-07-12 | Toshiba Corp | Solid-stage image sensing device and manufacture thereof |
| JPH01168059A (en) * | 1987-12-24 | 1989-07-03 | Fuji Photo Film Co Ltd | Solid state image sensor |
| JPH065827A (en) * | 1992-06-22 | 1994-01-14 | Sharp Corp | Solid state image pickup device and its manufacture |
| KR960002644A (en) * | 1994-06-20 | 1996-01-26 | 김주용 | Method of forming interlayer insulating film of semiconductor device |
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