KR100516053B1 - Flat panel liquid crystal display and manufacturing method thereof - Google Patents

Abstract

A gate line is formed on the substrate in a horizontal direction, a part of which is a gate electrode, and a common electrode line separated around the gate line is formed in the vertical direction. A plurality of common electrodes extend vertically to both sides of the common electrode line, and an insulating film is formed thereon through which contact holes exposing the common electrode line are formed. An amorphous silicon layer is formed on the gate electrode on the insulating film, and data lines are formed in the vertical direction. The source electrode and the drain electrode overlap both edges of the amorphous silicon layer around the gate electrode, and a doped amorphous silicon layer is formed between the source and drain electrode and the amorphous silicon layer. The pixel electrode line extending from the drain electrode overlaps the common electrode line, and a plurality of pixel electrodes extending from the pixel electrode line to both sides are formed in the horizontal direction. In addition, an end portion of the common electrode line separated around the data line and a connection pattern overlapping the data line are connected to the common electrode line through the contact hole.

Description

Flat panel liquid crystal display and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-plane switching mode liquid crystal display device and a manufacturing method thereof, and more particularly, to a liquid crystal display device having a structure preventing vertical crosstalk and a method of manufacturing the same.

The liquid crystal display is divided into a twisted nematic liquid crystal display and a planar driving liquid crystal display. In the twisted nematic method, a thin film transistor, a pixel electrode, a gate line, and a data line are formed on a transparent substrate of one of two substrates facing each other, and a common electrode is formed on the other transparent substrate, thereby being perpendicular to the substrate. As a liquid crystal display device in which an electric field is formed, there is an advantage in that the driving voltage is relatively low, but there is a disadvantage in that the viewing angle is narrow. In contrast, in the planar driving method, the viewing angle is widened because the pixel electrode and the common electrode are simultaneously formed in one transparent substrate to form an electric field parallel to the substrate.

Next, a planar driving liquid crystal display according to the related art will be described with reference to the accompanying drawings.

FIG. 1 is a layout view of a thin film transistor substrate of a planar driving type liquid crystal display according to the related art, FIG. 2 is a cross-sectional view taken along line II-II ′ of FIG. 1, that is, a thin film transistor, and FIG. 3 is III of FIG. 1. A cross-sectional view of the -III 'line.

As shown in FIG. 1, the gate line 200 is formed in the horizontal direction on the transparent substrate 100, and the first common electrode line 301 is formed in parallel with the gate line 200. A plurality of common electrodes 310 extends vertically from the first common electrode line 301, and an end of the common electrode 310 is connected to the second common electrode line 302. The gate insulating layer 400 covers the gate line 200, the first and second common electrode lines 301 and 302, and the common electrode 310, and a portion of the gate line 200, that is, the gate, is disposed on the gate insulating layer 400. An amorphous silicon layer 500 is formed on the electrode 201, and a portion where the gate line 200 extends partially overlaps the amorphous silicon layer 500 to form a source electrode 710. In addition, the drain electrode 720 is formed on the opposite side of the source electrode 710 around the gate electrode 201 so as to overlap the amorphous silicon layer 500. Doped amorphous silicon layers 610 and 620 are formed between the source and drain electrodes 710 and 720 and the amorphous silicon layer 500 to improve contact characteristics. The drain electrode 720 extends along the first common electrode line 301 to form the pixel electrode line 800, from which the pixel electrode 810 extends in parallel with the data line 700 and the common electrode 310. . In this case, the pixel electrode 810 is formed in the shape of a comb between the common electrode 310.

The thin film transistor substrate 100 is assembled to face an opposing substrate on which a black matrix (not shown) is formed. The black matrix corresponds to a pixel-pixel boundary, that is, a position of the data line 700. Liquid crystal molecules LC are injected between the two substrates, and the liquid crystal molecules LC are arranged by a horizontal electric field generated between the pixel electrode 810 and the common electrode 310.

Let's look at the signal applied to such a liquid crystal display device.

A voltage having a constant value is always supplied to the common electrode 310, and a voltage that is continuously changed with a frame is applied to the data line 700. That is, when a thin film transistor of one pixel is open, an image voltage is applied to the pixel electrode 810. When the thin film transistor is closed, a signal applied to the pixel electrode 810 is maintained until the thin film transistor is opened again. Different image voltages for operating the next pixel electrodes are continuously applied to the 700.

In the state where the thin film transistor is closed, an unintended electric field is generated between the data line 700 and the adjacent pixel electrode 810, which is applied to the data line 700 and the voltage being applied to the pixel electrode 810. This is because the voltages to be different are different, and the change in the signal of the data line 700 also affects the signal of the adjacent common electrode 310. At this time, the electric field generated between the data line 700 and the pixel electrode 810 and the common electrode 310 adjacent to each other increases as the voltage difference between the data line 700 and the pixel electrode 810 increases. The larger the area facing 310 and the closer the gap is, the larger the area becomes.

In such a structure in which the data line 700 and the common electrode 310 are formed side by side, a potential difference sufficient to twist the liquid crystal molecules LC is generated, so that the data line 700, the common electrode 310, and the pixel electrode ( An abnormal arrangement of the liquid crystal molecules LC appears between 810, and when an abnormal arrangement of the liquid crystal molecules LC occurs, light leaks even when the pixel is turned off. Since the abnormal arrangement of the liquid crystal molecules LC is displayed all the pixels along the data line 700, vertical crosstalk occurs in which white lines are formed on a screen in a normally black state.

In addition, since the common electrode lines 301 and 302 are adjacent to each other along the gate line 200, the occurrence rate of disconnection between the gate line 200 and the common electrode lines 301 and 302 is high.

An object of the present invention is to reduce the vertical alignment of the liquid crystal molecules to reduce the vertical crosstalk phenomenon on the screen.

In the liquid crystal display according to the present invention for solving this problem, the gate line and the data line are insulated from each other and cross each other, and a plurality of common electrodes and a plurality of pixel electrodes are formed to be perpendicular to the data line.

In this case, the common electrode line connecting the plurality of common electrodes to one and the pixel electrode line connecting the plurality of pixel electrodes to one may be parallel to the data line.

Here, it is preferable that a common electrode line crosses the center of a common electrode. In this case, the common electrode line should be separated from the gate line, and a connection pattern for electrically connecting the separated common electrode line should be formed.

A liquid crystal display device having such a structure is manufactured by forming a common electrode line so as to be separated from the gate line in forming the gate line, and forming a connection pattern connecting the common electrode line separated in the forming of the data line and the pixel electrode. do.

As described above, the liquid crystal display and the manufacturing method thereof according to the present invention reduce the area of the pixel electrode and the common electrode facing the data line by forming the common electrode and the pixel electrode perpendicular to the data line.

Next, a liquid crystal display and a method of manufacturing the same according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

4 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention.

As shown in FIG. 4, a gate line 200 is formed on the substrate in a horizontal direction, the gate electrode 201 extends from the gate line 200, and is separated from the gate line 200. Electrode lines 303 and 304 are formed in the vertical direction. A plurality of common electrodes 310 extend in the horizontal direction on both sides of the common electrode lines 303 and 304.

An insulating film (not shown) is covered thereon, and contact holes C1 and C2 exposing the common electrode lines 303 and 304 are formed.

An amorphous silicon layer 500 is formed on the gate electrode 201 on the insulating film, and the data line 700 is formed in the vertical direction. A portion of the data line 700 extends to form a source electrode 710 overlapping an edge of the amorphous silicon layer 500 on the gate electrode 201, and the source electrode 710 around the gate electrode 201. The drain electrode 720 is formed on the opposite side. A doped amorphous silicon layer (not shown) is formed between the source and drain electrodes 710 and 720 and the amorphous silicon layer 500 to improve contact characteristics.

The pixel electrode line 830 extending from the drain electrode 720 overlaps the common electrode line 304 with the insulating film, and the plurality of pixel electrodes 810 extending from both sides of the pixel electrode line 830 in the horizontal direction are formed in the horizontal direction. It is. In addition, the connection patterns 850 formed to overlap both ends of the common electrode lines 303 and 304 and the data line 200, which are separated around the data line 200, are common through the contact holes C1 and C2. It is connected with the electrode wires 303 and 304.

In the thin film transistor substrate having the above structure, the common electrode 310 and the pixel electrode 810 are formed perpendicular to the data line 700, thereby reducing the area of the common electrode 310 facing the data line 700. Therefore, since the potential difference formed between the data line 700, the pixel electrode 810, and the common electrode 310 does not have the size of twisting the liquid crystal molecules LC, an abnormal arrangement of the liquid crystal molecules LC also appears. Do not.

Therefore, the vertical crosstalk phenomenon caused by the abnormal arrangement of the liquid crystal molecules LC is also reduced.

Next, a method of manufacturing a liquid crystal display device having such a structure will be described below with reference to FIGS. 5A to 5D.

5A through 5D are layout views sequentially illustrating a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention.

First, a first metal layer is deposited and patterned on a substrate to form first metal patterns such as the gate line 200, the gate electrode 201, the common electrode lines 303 and 304, and the common electrode 310. In this case, the common electrode lines 303 and 304 are formed to be separated from the gate line 200 (see FIG. 5A).

A gate insulating film (not shown) is applied, and an amorphous silicon layer 500 and a doped amorphous silicon layer (not shown) are sequentially formed on the gate insulating film on the gate electrode 201 (see FIG. 5B).

Next, a portion of the gate insulating film is etched to form contact holes C1 and C2 exposing end portions of the common electrode lines 303 and 304 (see FIG. 5C).

Finally, the second metal layer is stacked and patterned to connect the data line 700, the source and drain electrodes 710 and 720, the pixel electrode line 830, the pixel electrode 810, and the common electrode line 303 and 304. A second metal pattern such as pattern 850 is formed (see FIG. 5D).

In this way, a liquid crystal display device having a structure capable of reducing vertical crosstalk may be implemented. In addition, since the common electrode line 310 is vertically formed around the gate line 200, a short circuit between the two lines 200 and 310 may be reduced.

As with the first embodiment, the liquid crystal display according to the second and third embodiments having a structure in which the data line 700, the pixel electrode 810, and the common electrode 310 are vertically formed will be described with reference to FIGS. 6 and 6. It demonstrates with reference to FIG.

6 and 7 are layout views of the liquid crystal display according to the second and third embodiments of the present invention.

As shown in FIG. 6, the gate line 200, the gate electrode 201, the data line 700, the source and drain electrodes 710 and 720, the amorphous silicon layer 500, the gate insulating film, and the like are the first embodiment. It is formed in the same structure as.

The common electrode line 300 is formed in parallel with the gate line 200, and the auxiliary common electrode line 300 ′ extends in a direction perpendicular to the common electrode line 300, and a plurality of common lines are provided from the auxiliary common electrode line 300 ′. The electrode 310 extends perpendicular to the auxiliary common electrode line 300 ′, that is, perpendicular to the data line 700. In addition, the pixel electrode line 800 and the auxiliary pixel electrode line 800 ′ extending from the drain electrode 720 overlap in parallel along the common electrode line 300 and the auxiliary common electrode line 300 ′, and the plurality of pixel electrodes 810. ) Extends perpendicularly from the pixel electrode line 800 to the data line 700.

The third embodiment shown in FIG. 7 has a structure similar to the second embodiment. However, there is a difference in that the pixel electrode line 800 and the common electrode line 300 do not overlap each other, and are formed parallel to the data line 700 instead of the gate line 200. That is, the pixel electrode line 800 and the common electrode line 300 are formed in parallel with the data line 700, and the plurality of pixel electrodes 810 and the common are respectively perpendicular to the pixel electrode line 800 and the common electrode line 300. The electrode 310 is extended.

As in the first embodiment, since the pixel electrode 810 and the common electrode 310 are formed perpendicular to the data line 700 in the second and third embodiments, the effect is the same as in the first embodiment. .

As described above, according to the present invention, the vertical crosstalk phenomenon due to the abnormal arrangement of the liquid crystal molecules is reduced, and the productivity is also improved by reducing the short circuit defect between the gate line and the common electrode line.

1 is a layout view of a liquid crystal display device of a planar driving method according to the related art,

FIG. 2 is a cross-sectional view of the II-II 'line of FIG. 1, that is, a thin film transistor;

3 is a cross-sectional view taken along line III-III ′ of FIG. 1;

4 is a layout view of a liquid crystal display of a planar driving method according to a first exemplary embodiment of the present invention.

5A to 5D are layout views showing the manufacturing method of the first embodiment according to the process sequence;

6 is a layout view of a liquid crystal display of a planar driving method according to a second exemplary embodiment of the present invention.

7 is a layout view of a liquid crystal display of a planar driving method according to a third exemplary embodiment of the present invention.

Claims (7)

Insulation board, A gate line and a data line formed on the insulating substrate and crossing each other through an insulating film; A common electrode line formed in parallel with the data line and a plurality of common electrodes extending from the common electrode line and formed perpendicular to the data line, A pixel electrode line formed to be parallel to the data line and a plurality of pixel electrodes extending from the pixel electrode line and perpendicular to the data line; And the pixel electrode line and the common electrode line overlap each other. In claim 1, The common electrode line crosses the center of the common electrode and is separated about the gate line. In claim 2, And a connection pattern overlapping a portion of the gate line via the insulating layer and connected to the common electrode line at both sides of the gate line. In claim 3, A contact hole for exposing the common electrode line is formed in the insulating layer, and the connection pattern is in contact with the common electrode line through the contact hole. In claim 1, Further comprising an auxiliary common electrode line parallel to the common electrode line, The common electrode line and the auxiliary common electrode line are connected by the common electrode. Stacking a first metal film on the substrate, Patterning the first metal layer to form a common electrode line and a common electrode separated from the gate line and the gate line; Stacking a gate insulating film, Etching the gate insulating layer to form a contact hole exposing a part of the common electrode line; Stacking a second metal film; Patterning the second metal layer to form a connection pattern, a pixel electrode line, and a pixel electrode connecting the common electrode line through the contact hole; Including; The common electrode extends from the common electrode line, the pixel electrode extends from the pixel electrode line, The pixel electrode line and the common electrode line overlap each other. In claim 6, Forming a semiconductor layer overlapping a portion of the gate line with the gate insulating layer; patterning the second metal layer to form source and drain electrodes and a data line; The common electrode line and the pixel electrode line are parallel to the data line, and the common electrode and the pixel electrode are perpendicular to the data line.