KR100506404B1 - Driving Method of Plasma Display Panel - Google Patents
Driving Method of Plasma Display Panel Download PDFInfo
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- KR100506404B1 KR100506404B1 KR1019980020744A KR19980020744A KR100506404B1 KR 100506404 B1 KR100506404 B1 KR 100506404B1 KR 1019980020744 A KR1019980020744 A KR 1019980020744A KR 19980020744 A KR19980020744 A KR 19980020744A KR 100506404 B1 KR100506404 B1 KR 100506404B1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0228—Increasing the driving margin in plasma displays
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- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
본 발명은 어드레스 기간에서의 어드레스 마진 특성을 향상시키도록 된 플라즈마 표시패널의 구동방법을 제공하기 위한 것이다.The present invention is to provide a method for driving a plasma display panel which is designed to improve address margin characteristics in an address period.
이를 위해 본 발명은, 복수의 스캔 전극들을 포함하는 면방전 플라즈마 표시패널에서, 어드레스 기간내에 상기 스캔 전극들에 인가하는 셀프전압을 조정하여 벽전하의 시간경과에 따른 감소분을 보상함으로써, 종래의 비월주사방식보다 동특성 마진(어드레스 마진)이 뛰어난 효과를 얻게 될 뿐만 아니라 화상이 질이 향상된다.To this end, the present invention, in the surface discharge plasma display panel including a plurality of scan electrodes, by adjusting the self-voltage applied to the scan electrodes within the address period to compensate for the decrease over time of the wall charge, the conventional interlacing Not only will the dynamic margin (address margin) be superior to the scanning method, but also the image quality will be improved.
Description
본 발명은 플라즈마 표시패널의 구동방법에 관한 것으로, 보다 상세하게는 면방전형 PDP를 구동시킬 때 벽전하 생성구간에서의 시간에 따른 벽전하 소거에 대응하여 기입특성을 향상시키도록 된 플라즈마 표시패널의 구동방법에 관한 것이다.The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a surface discharge type PDP, in which a writing characteristic is improved in response to wall charge erasure with time in a wall charge generation section. It relates to a driving method.
일반적으로, 플라즈마 표시패널(Plasma Display Panel)은 기체방전시 생기는 플라즈마로부터 나오는 빛을 이용하여 문자 또는 그래픽을 표시하는 소자로서, 플라즈마를 만들기 위해 외부에서 가해주는 전계 인가 구동방법에 의하여 직류형 또는 교류형으로 구분된다.In general, a plasma display panel is a device that displays characters or graphics by using light emitted from a plasma generated during gas discharge. The plasma display panel is a direct current type or alternating current by an electric field application driving method applied externally to make a plasma. Are divided into types.
그 중에서, 종래의 교류형 플라즈마 표시패널의 계조표시에 주로 많이 채용되고 있는 ADS 서브필드 방식(Address Display Separated Sub-field Method)에 대해 설명하면 다음과 같다.Among them, the ADS subfield method (Address Display Separated Sub-field Method), which is mainly used for gray scale display of a conventional AC plasma display panel, will be described as follows.
종래의 ADS 서브필드 방식은 한 프레임을 다수개의 서브 필드(예컨대, SF1∼SF8)로 나누고, 각각의 서브 필드(SF1∼SF8)를 다시 점등셀 선택을 위한 어드레스방전이 이루어지는 어드레스 기간 및 표시를 위한 유지방전이 이루어지는 유지방전 기간으로 분할하고서, 8비트의 계조처리를 행하게 된다.The conventional ADS subfield method divides one frame into a plurality of subfields (for example, SF1 to SF8), and turns each subfield SF1 to SF8 on again for an address period and display for address discharge for cell selection. The 8-bit gradation process is performed by dividing into the sustain discharge period in which the sustain discharge is performed.
현재, 이러한 ADS 서브필드 방식이 채용된 종래의 면방전 교류형 플라즈마 표시패널에서는 통상적으로, 표시면측의 유리기판상에 수평방향으로 쌍으로 설치되면서 유전체층으로 덮혀 있는 표시 전극(X 전극; 유지 전극이라고도 함)과 스캔 전극(Y 전극) 및, 이에 대향되는 배면 유리기판상에 수직방향으로 설치되면서 유전체층으로 덮혀 있는 데이터 전극(A 전극; 어드레스 전극이라고도 함)으로 구성된 3전극 구조를 많이 채용하고 있다.At present, in the conventional surface discharge AC plasma display panel adopting such an ADS subfield method, a display electrode (X electrode; also referred to as a sustain electrode), which is generally provided in a horizontal direction in pairs in a horizontal direction on a glass substrate on the display surface side, is covered with a dielectric layer. ) And a scan electrode (Y electrode) and a data electrode (A electrode (also referred to as an address electrode)) which is provided in a vertical direction on a rear glass substrate opposite thereto and covered with a dielectric layer, is adopted.
상기의 3전극 면방전 교류형 플라즈마 표시패널의 구동에 대해 도 1의 파형도를 참조하여 설명하면, 표시 전극(X 전극)에 양극성의 전면 기입 펄스(10)를 인가하여 전면 기입을 행하고 나서, 스캔 전극(Y 전극)에 완만한 기울기를 갖는 양극성의 전면 소거 펄스(12)를 인가하여 전면 소거를 행한 후, 상기 스캔 전극(Y 전극)에 스캔 펄스(14a∼14n)를 순차적으로 인가하면서 데이터 전극(A 전극)에는 표시정보에 따라 소정의 데이터 기입 펄스(16)를 인가하여 어드레싱을 행하여 데이터 기입을 수행한다. 그 이후 상기 표시 전극(X 전극)과 스캔 전극(Y 전극)에는 일정시간 간격으로 유지 펄스(18)가 교번적으로 인가되는데, 이때 데이터 전극(A 전극)은 하이-임피던스(Hi-Z)상태를 유지하게 된다.The driving of the three-electrode surface discharge alternating current plasma display panel will be described with reference to the waveform diagram of FIG. 1. After the bipolar front write pulse 10 is applied to the display electrode (X electrode), the front write is performed. After performing a front erase by applying a bipolar front erase pulse 12 having a gentle slope to the scan electrode (Y electrode), the scan pulses 14a to 14n are sequentially applied to the scan electrode (Y electrode). A predetermined data write pulse 16 is applied to the electrode A electrode in accordance with the display information to perform addressing. Thereafter, a sustain pulse 18 is alternately applied to the display electrode (X electrode) and the scan electrode (Y electrode) at regular intervals, wherein the data electrode (A electrode) is in a high-impedance (Hi-Z) state. Will be maintained.
이러한 ADS방식에 의한 어드레싱은 모든 스캔전극(Y)들을 스캔한 후에 유지펄스를 인가하기 때문에, 최초 스캔라인을 스캔하여 최종 스캔 라인을 스캔할 때까지 상당한 시간이 소요된다. 따라서 최초 스캔스캔라인의 스캔에 의한 벽전하 형성은 시간이 지남에 따라 자연적으로 감소되는 것으로 알려져 있다. 그 결과, 모든 셀에서의 벽전하 분포가 불균일하여 어드레스 동작마진이 감소된다. Since the addressing by the ADS method applies a sustain pulse after scanning all the scan electrodes Y, it takes a considerable time to scan the first scan line and scan the last scan line. Therefore, the wall charge formation by the scan of the original scan scan line is known to decrease naturally over time. As a result, the wall charge distribution in all cells is nonuniform and the address operation margin is reduced.
이러한 문제점을 해결하기 위해, 종래에 어드레스 방전형성후에 벽전하 소거 감소방지를 위하여 비월주사(interlace)방식을 채택하여 어드레스 방전시간에 따른 벽전하 감소를 방지하고 있다.In order to solve this problem, an interlace method is conventionally employed to prevent wall charge erasure reduction after address discharge is formed, thereby preventing wall charge reduction due to address discharge time.
즉, 순행주사(non-interlace)일 경우에는 도 2에 나타낸 바와 같이 어드레스 방전시간에 따른 벽전하 감소율을 보이고 있는데, 비월주사인 경우에는 도 3에 나타낸 바와 같이 어드레스 방전시간에 따른 벽전하 감소율을 보이고 있다.That is, in the case of non-interlace, the wall charge decrease rate according to the address discharge time is shown as shown in FIG. 2, and in the case of interlaced scan, the wall charge decrease rate according to the address discharge time is shown in FIG. It is showing.
다시 말해서, 비월주사방식이 순행주사방식에 비해 어드레스 방전시간에 따른 벽전하 감소율이 적기 때문에 주로 채용되고 있다.In other words, the interlaced scanning method is mainly employed because the rate of wall charge reduction due to the address discharge time is smaller than that of the forward scanning method.
따라서 본 발명은 상기한 사정을 감안하여 이루어진 것으로, 비월주사방식을 채택하지 않고서도 어드레스 기간에서의 어드레스 마진 특성을 향상시키도록 된 플라즈마 표시패널의 구동방법을 제공함에 그 목적이 있다. Accordingly, the present invention has been made in view of the above circumstances, and an object thereof is to provide a method of driving a plasma display panel which improves an address margin characteristic in an address period without adopting an interlaced scanning method.
상기한 목적을 달성하기 위해 본 발명의 바람직한 실시예에 따른 교류형 플라즈마 표시패널의 구동방법에 있어서, 상기 표시패널은 서로 간격을 두고 대향하여 배치되는 제1,제2절연기판과, 제2절연기판을 향하는 제1절연기판의 내표면에 평행하게 배열되는 복수의 스캔전극들과, 제1절연기판을 대향하는 제2절연기판의 표면에 상기 스캔전극들에 실질적으로 직교하는 방향으로 배열되는 복수의 데이터 전극들과, 상기 스캔전극들 및 데이터전극들을 덮고 있는 제1,제2유전체층과, 상기 스캔전극과 데이터전극의 교차점에 형성되는 복수의 픽셀들 및 상기 대향하는 제1, 제2절연기판 사이에 채워져 밀봉되는 방전가스를 포함하며;In order to achieve the above object, in the method of driving an AC plasma display panel according to an exemplary embodiment of the present invention, the display panel includes first and second insulating substrates disposed to face each other at a distance from each other, and second insulation. A plurality of scan electrodes arranged in parallel to an inner surface of the first insulating substrate facing the substrate, and a plurality of scan electrodes arranged in a direction substantially perpendicular to the scan electrodes on a surface of the second insulating substrate facing the first insulating substrate; Data electrodes of the first electrode layer, first and second dielectric layers covering the scan electrodes and the data electrodes, a plurality of pixels formed at an intersection point of the scan electrode and the data electrode, and the opposing first and second insulating substrates. A discharge gas filled and sealed in between;
하나의 이미지 프레임은 복수의 서브필드로 분할되며, 상기 각 서브필드에는 특정 수의 유지펄스가 할당되며;One image frame is divided into a plurality of subfields, each of which is assigned a specific number of sustain pulses;
상기 분할된 각 서브필드는 모든 픽셀들을 표시하는 전면기입기간, 표시할 픽셀들을 지정하기 위해 모든 스캔전극들에 대해 순차적으로 스캔펄스를 인가하고 동시에 표시정보에 따라 데이터전극들에 데이터 펄스를 인가하여 유전체층에 벽전하를 형성하는 어드레스 기간 및 상기 표시패널의 지정된 모든 픽셀들에 대해 동시에 할당된 수의 유지펄스를 인가하는 표시기간을 포함하며;Each of the divided subfields sequentially applies scan pulses to all scan electrodes to designate a front write period for displaying all pixels and pixels to be displayed, and simultaneously applies data pulses to the data electrodes according to display information. An address period for forming wall charges in the dielectric layer and a display period for applying an allocated number of sustain pulses simultaneously to all specified pixels of the display panel;
상기 어드레스 기간에서 상기 스캔 전극들에 인가되는 셀프전압이 일정한 레벨을 갖지 않고 변화하는 레벨의 전압을 가지므로써, 한 서브필드에서 모든 스캔전극들을 스캔할 때에 시간에 따른 벽전하의 감소를 보상하는 것을 특징으로 한다.The self-voltage applied to the scan electrodes in the address period does not have a constant level but has a varying level of voltage, thereby compensating for reduction in wall charge over time when scanning all scan electrodes in one subfield. It features.
이하, 본 발명의 실시예에 대해 첨부된 도면을 참조하여 보다 상세히 설명한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 4는 본 발명의 제 1실시예에 따른 플라즈마 표시패널의 구동방법을 설명하는 파형도로서, 도 1에서 설명한 부분과 거의 동일하고 다만 차이점이라면 어드레스 기간내에 스캔 전극(Y 전극)에 인가되는 셀프전압(Vshelf)이 차등적으로 인가된다는 점이 차이난다.FIG. 4 is a waveform diagram illustrating a method of driving a plasma display panel according to a first embodiment of the present invention, and is substantially the same as that described in FIG. 1 except that the difference is applied to the scan electrode (Y electrode) within the address period. The difference is that the voltage Vshelf is applied differentially.
즉, 본 발명의 제 1실시예에서는 어드레스 기간내에서 어느 일정시간까지는 제 1의 셀프전압치(Vshelf1)가 스캔 전극(Y 전극)에 인가되고, 그 어느 일정시간 이후에는 제 2의 셀프전압치(Vshelf2)가 스캔 전극(Y)에 인가되므로, 결국 마진 보상치(Δv1)가 제공되어 어드레스 기간내에서 스캔 시간에 따른 벽전하의 감소분이 보상된다.That is, in the first embodiment of the present invention, the first self voltage value Vshelf1 is applied to the scan electrode (Y electrode) for a certain time period within the address period, and after the certain time, the second self voltage value ( Since Vshelf2 is applied to the scan electrode Y, a margin compensation value [Delta] v1 is eventually provided to compensate for the decrease in wall charge with respect to the scan time in the address period.
한편, 본 발명의 제 1실시예에서는 어드레스 기간내에 스캔 전극(Y 전극)에 제공되는 셀프전압치를 2개로 한정하여 설명하였으나, 필요에 따라서는 그 수를 증가시킬 수 있다.In the first embodiment of the present invention, the self-voltage value provided to the scan electrode (Y electrode) is limited to two in the address period. However, the number can be increased as necessary.
도 5는 본 발명의 제 2실시예에 따른 플라즈마 표시패널의 구동방법을 설명하는 파형도로서, 도 1에서 설명한 부분과 거의 동일하고 다만 차이점이라면 어드레스 기간내에 스캔 전극(Y 전극)에 인가되는 셀프전압(Vshelf)이 계속적으로 가변된다는 점이 차이난다.FIG. 5 is a waveform diagram illustrating a method of driving a plasma display panel according to a second exemplary embodiment of the present invention. FIG. 5 is substantially the same as that described in FIG. 1 except that the difference is applied to the scan electrode (Y electrode) within the address period. The difference is that the voltage Vshelf is continuously variable.
즉, 본 발명의 제 2실시예에서는 상기 셀프전압(Vshelf)이 상기 어드레스 기간내에서 지수함수적인 기울기의 레벨 전압로 제공되므로써, 어드레스 기간내에서 스캔 시간에 따라 마진 보상치(Δv2)가 제공되어 스캔 시간에 따른 벽전하의 감소분이 보상된다.That is, in the second embodiment of the present invention, since the self voltage Vshelf is provided as the exponential gradient level voltage in the address period, a margin compensation value Δv2 is provided according to the scan time in the address period, thereby providing a scan time. The decrease in wall charge due to this is compensated for.
결국, 본 발명의 제 1 및 제 2실시예에 따르면, 첫번째 스캔 라인과 마지막 스캔 라인의 벽전하 분포차를 줄여 어드레스 마진 특성을 향상시키게 된다.As a result, according to the first and second embodiments of the present invention, the difference in the wall charge distribution between the first scan line and the last scan line is reduced to improve the address margin characteristic.
도 6a는 도 4 및 도 5에 도시된 셀프전압을 생성시키는 회로의 일예를 나타낸 회로도로서, 셀프전압 생성회로는 하나의 단자가 셀프전압단(Vshelf)에 접속되고 다른 단자(제어단자)로는 제어신호(trigger)를 입력받아 온/오프 스위칭되는 스위칭소자(S) 및, 이 스위칭소자(S)의 또 다른 단자와 출력단자(out) 사이에 접속된 가변저항(R) 및 그 가변저항(R)과 접속된 표시패널 자체의 고유 캐패시터(C)로 이루어진 R-C회로를 구비한다.6A is a circuit diagram illustrating an example of a circuit for generating the self voltage shown in FIGS. 4 and 5, in which one terminal is connected to the self voltage terminal Vshelf and the other terminal (control terminal) is controlled. A switching element S which receives a signal trigger and is switched on / off, and a variable resistor R connected between another terminal of the switching element S and an output terminal out, and the variable resistor R thereof. ) Is provided with an RC circuit composed of a unique capacitor C of the display panel itself.
그에 따라, 상기 스위칭소자(S)의 게이트로 도 6b에서와 같은 하이레벨의 제어신호(trigger)가 제공되면 셀프전압(Vshelf)은 스위칭소자(S) 및 상기 R-C회로를 거쳐 도 6b에서와 같은 파형의 신호가 형성된다. 그리고, R-C회로의 가변저항(R)에 의해 여러 형태의 기울기를 갖는 레벨의 셀프전압(Vshelf)을 형성할 수 있다.Accordingly, when a high level control signal trigger as shown in FIG. 6B is provided to the gate of the switching device S, the self voltage Vshelf passes through the switching device S and the RC circuit as shown in FIG. 6B. A waveform signal is formed. In addition, the self resistance Vshelf having various types of slopes can be formed by the variable resistor R of the R-C circuit.
이상 설명한 바와 같은 본 발명에 의하면, 스캔 시간에 따른 벽전하 감소의 보상방식을 채택함으로써, 종래의 방식보다 동특성 마진(어드레스 마진)이 뛰어난 효과를 얻게 될 뿐만 아니라 화상이 질이 향상된다. 또한 본 발명은 비월주사 방식에 적용하는 것도 가능하다.According to the present invention as described above, by adopting the compensation method of the wall charge reduction according to the scan time, not only the effect of the dynamic characteristic (address margin) is superior to the conventional method, but also the image quality is improved. It is also possible to apply the present invention to an interlaced scan method.
한편 본 발명은 상술한 실시예로만 한정되는 것이 아니라 본 발명의 요지를 벗어나지 않는 범위내에서 수정 및 변형하여 실시할 수 있다.On the other hand, the present invention is not limited only to the above-described embodiments, but may be modified and modified without departing from the scope of the present invention.
도 1은 종래의 3전극 면방전 교류형 플라즈마 표시패널의 구동방법을 설명하기 위한 파형도,1 is a waveform diagram illustrating a driving method of a conventional three-electrode surface discharge AC plasma display panel;
도 2는 종래의 순차 주사시의 어드레스 방전시간에 따른 벽전하 감소율을 표시한 도면,2 is a view showing a wall charge reduction rate according to the address discharge time in the conventional sequential scanning;
도 3은 종래의 비월 주사시의 어드레스 방전시간에 따른 벽전하 감소율을 표시한 도면,3 is a view showing a wall charge reduction rate according to an address discharge time in a conventional interlaced scan;
도 4는 본 발명의 제 1실시예에 따른 플라즈마 표시패널의 구동방법을 설명하는 파형도,4 is a waveform diagram illustrating a method of driving a plasma display panel according to a first embodiment of the present invention;
도 5는 본 발명의 제 2실시예에 따른 플라즈마 표시패널의 구동방법을 설명하는 파형도,5 is a waveform diagram illustrating a method of driving a plasma display panel according to a second embodiment of the present invention;
도 6은 도 4 및 도 5에 도시된 셀프전압을 형성하는 회로의 일예를 나타낸 회로도이다.6 is a circuit diagram illustrating an example of a circuit for forming the self voltage shown in FIGS. 4 and 5.
< 도면의 주요부분에 대한 부호의 설명><Description of reference numerals for main parts of the drawings>
10 : 전면 기입 펄스 12 : 전면 소거 펄스 10: front write pulse 12: front erase pulse
14a∼14n : 스캔 펄스 16 : 데이터 기입 펄스14a to 14n: Scan pulse 16: Data write pulse
18 : 유지 펄스18: holding pulse
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08320668A (en) * | 1995-05-26 | 1996-12-03 | Nec Corp | Driving method for gas discharge display panel |
| JPH0981073A (en) * | 1995-09-13 | 1997-03-28 | Fujitsu Ltd | Driving method for plasma display and plasma display device |
| JPH1165516A (en) * | 1997-08-18 | 1999-03-09 | Hitachi Ltd | Method and device for driving plasma display panel |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08320668A (en) * | 1995-05-26 | 1996-12-03 | Nec Corp | Driving method for gas discharge display panel |
| JPH0981073A (en) * | 1995-09-13 | 1997-03-28 | Fujitsu Ltd | Driving method for plasma display and plasma display device |
| JPH1165516A (en) * | 1997-08-18 | 1999-03-09 | Hitachi Ltd | Method and device for driving plasma display panel |
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