KR100498780B1 - Method for manufactuting MEMS structure object having the high step edge - Google Patents

Abstract

The present invention provides a method for manufacturing a high step MEMS structure.

According to the present invention, there is provided a method of manufacturing a high step memes structure, the method comprising: forming a hole having a deep depth on a sacrificial substrate, forming a plug in the hole, and forming a structure on the sacrificial substrate on which the plug is formed. Forming a protective film pattern defining a shape of, removing the plug and embedding a conductive material in the protective film pattern.

Accordingly, the photoresist may be coated with good uniformity on the sacrificial substrate on which the hole is formed, and the photoresist may be prevented from remaining inside the hole.

Description

Method for manufactuting MEMS structure object having the high step edge}

The present invention relates to a method for manufacturing a high step MEMS structure using MEMS (Micro Electro Mechanical System) technology, and more particularly, to a method for manufacturing a high step MEMS structure for implementing a high step structure on a sacrificial substrate.

In general, a semiconductor chip is implemented on a semiconductor substrate by performing a series of semiconductor manufacturing processes such as an oxidation process, a diffusion process, an ion implantation process, an etching process, and a metal process, and the chip implemented on the semiconductor substrate is an EDS (Electrical Die). Sorting and sorting into normal and abnormal chips, only normal chips are sliced (Slicing) packaging (Packing).

In this case, the EDS contacts an electrical contact such as a probe card to a pad of a chip to apply an electrical signal to detect a response electrical signal corresponding to an applied electrical signal, thereby detecting whether the chip is normal or abnormal. It is a process to confirm.

In addition, a flat panel display device such as an LCD (Liquid Crystal Display) is also applied by applying an electrical signal by contacting an electrical contact with a predetermined portion of the flat panel display device manufactured by performing a series of flat display device manufacturing processes. By detecting the response electric signal corresponding to the electric signal, the LCD panel is checked whether it is normal or abnormal.

In the method of manufacturing such an electrical contact, as shown in FIG. 1A, a protective film is formed on the entire surface of the sacrificial substrate 10 made of silicon, such as (10), and then the upper portion of the protective film. The photoresist is coated on it. Next, a photoresist pattern for forming a protective film pattern to be used as an etching mask of an etching process for forming the hole 14 is formed by performing exposure and development processes on the photoresist.

Subsequently, using the photoresist pattern as an etching mask, a protective film made of an oxide film is wet or dry etched to form a protective film pattern defining a region in which the hole 14 is to be formed in a subsequent step, and then the photoresist pattern. Remove it.

In this case, the protective film formed of the oxide film may be formed by a thermal oxidation process or the like, and the photoresist may be formed by a spin coating method.

In addition, the photoresist pattern may be removed using a peeling solution for removing photoresist or acetone.

Subsequently, as shown in FIG. 1B, the tip of the electrical contact 22 is formed by performing an anisotropic wet etching process using potassium hydroxide (KOH) or tetra-methyl ammonium hydroxide (TMAH) using the protective film pattern as an etching mask. A hole 14 (Hole) defining a space is formed. In this case, the hole 14 is formed by an anisotropic wet etching process, so that the upper end portion of the hole 14 is etched relatively wider than the bottom portion.

Subsequently, as shown in FIG. 1C, the depth of the hole 14 is deeply formed by performing an anisotropic dry etching process using SF 6, C 4 F 8, and O 2 gas using the protective film pattern as an etching mask.

In this case, the anisotropic dry etching process is performed by a known reactive ion etching (RIE) called a Bosch process as one of the deep hole etching methods.

Subsequently, after removing the first passivation layer pattern 12 as illustrated in FIG. 1D, the seed layer 16 made of copper (Cu), which functions as a seed of a plating process, is formed on the sacrificial substrate 10. (Seed layer) is formed. In this case, the first passivation layer pattern 12 formed of the oxide layer may be removed by wet etching using a chemical having excellent reactivity with the oxide layer, and the seed layer 16 may be formed by a known sputtering process. have. Next, a second passivation layer pattern 18 is formed on the sacrificial substrate 10 to define the shape of the beam part connected to the tip of the electrical contact 22. In this case, the second passivation layer pattern 18 may be formed by spin-coating a photoresist thickly on the sacrificial substrate 10 and then exposing and developing the photoresist. In particular, the surface flatness of the photoresist for forming the second passivation layer pattern 18 is formed in the process of forming the second passivation layer pattern 18 because the deep hole 14 is formed on the sacrificial substrate 10. May fall and photoresist may remain inside the hole 14.

Subsequently, as shown in FIG. 1E, a conductive material 20 made of nickel alloy, such as nickel or nickel-cobalt, is embedded in the second passivation layer pattern 18, and then the upper surface thereof is planarized.

In this case, the conductive material 20 may be embedded in the second passivation layer pattern 18 by a plating process using the seed layer 16. In another embodiment, the process of forming the seed layer 16 may be omitted, and CVD ( The conductive material 20 may be embedded in the second passivation layer pattern 18 by a process such as chemical vapor deposition (PVD) or physical vapor deposition (PVD).

Finally, as shown in FIG. 1F, the second protective layer pattern 18, the seed layer 16, and the sacrificial substrate 10 are removed by wet etching using a predetermined chemical. 22).

However, the conventional manufacturing method of the electrical contact, after forming a hole on the sacrificial substrate, the following problems occur in the process of coating the photoresist to form a second protective film pattern that defines the shape of the beam portion.

First, the air filled in the hole formed on the sacrificial substrate does not escape during the photoresist spin coating, but diffuses or is trapped by the photoresist coated on the sacrificial substrate to reduce the coating uniformity of the photoresist. There was a problem.

Second, since the hole formed on the sacrificial substrate is deeply formed, there is a problem in that the photoresist coating uniformity is very poor due to filling the photoresist into the hole or due to the geometrically high surface energy around the hole.

Third, the photoresist remains after exposure and development processes for forming the second passivation layer pattern in the hole formed on the sacrificial substrate, thereby causing a poor plating of subsequent plating materials.

An object of the present invention is to provide a method for manufacturing a high step MEMS structure that can coat a photoresist having good surface uniformity on a sacrificial substrate on which a structure having a high step height is formed, such as a hole formed on a sacrificial substrate.

Another object of the present invention is to provide a method for manufacturing a high step MEMS structure that can prevent photoresist from remaining inside a structure having a high high step such as a hole formed on a sacrificial substrate.

Method for manufacturing a high step MEMS structure according to the present invention for achieving the above object, Forming a deep hole (Hole) on the sacrificial substrate: Forming a plug (Plug) inside the hole; Forming a protective film pattern defining a shape of a structure on the sacrificial substrate on which the plug is formed; Removing the plug; And embedding a conductive material in the protective film pattern.

In this case, the forming of the plug in the hole may include: laminating a dry film on the sacrificial substrate; And planarizing the top surface of the sacrificial substrate so that the top surface of the sacrificial substrate is exposed so that a dry film remains only inside the hole.

In addition, the planarization of the top surface of the sacrificial substrate may use etch-back or chemical mechanical polishing (CMP).

The forming of the protective layer pattern defining the shape of the structure on the sacrificial substrate on which the plug is formed may include: coating a photoresist on the entire surface of the sacrificial substrate on which the plug is formed; And exposing and developing the photoresist to form a photoresist pattern.

The removing of the plug may be performed by a developing process for forming the photoresist pattern.

In addition, after the filling of the conductive material may be performed, a planarization process may be further performed on the upper surface of the sacrificial substrate, and the conductive material may be formed by plating.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2I are cross-sectional views illustrating a method of manufacturing a probe tip for inspecting an electronic device according to an embodiment of the present invention.

Method for manufacturing a probe tip for electronic device inspection according to the present invention, as shown in Figure 2a is formed in a subsequent process on a sacrificial substrate 30 of silicon (Silicon) material having a certain direction, such as (10) A first protective film pattern 32 made of an oxide film or the like which defines the shape of the hole 34 to be formed is formed.

In this case, the first passivation layer pattern 32 may be formed by forming a passivation layer including an oxide layer on the entire surface of the sacrificial substrate 30 and performing a known photolithography process on the passivation layer.

Subsequently, as shown in FIG. 2B, the first contact layer pattern 32 is used as an etching mask to perform an anisotropic wet etching process using potassium hydroxide (KOH) or tetra-methyl ammonium hydroxide (TMAH). Hole 34 to define the shape of the tip. In this case, the hole 34 is formed by an anisotropic wet etching process so that the upper end portion of the hole 34 is relatively wider than the bottom surface portion.

Subsequently, as shown in FIG. 2C, the depth of the hole 34 is performed by performing an anisotropic dry etching process using SF ₆ , C ₄ F ₈ , and O ₂ gas using the first protective film pattern 32 as an etching mask. Form deeply.

In this case, the anisotropic dry etching process is performed by a known reactive ion etching (RIE) called a Bosch process as one of the deep hole etching methods.

Subsequently, as shown in FIG. 2D, a seed layer 36 made of copper (Cu), which functions as a seed of a plating process, is formed on the sacrificial substrate 30 having the holes 34 formed therein. After that, the dry film 38 (Dry film) is laminated on the top (Laminating).

In this case, the seed layer 36 may be formed by sputtering, and the dry film 38 pressurizes the surface of the dry film 38 while heating to a temperature of 90 ° C. to 100 ° C. to surface the sacrificial substrate 30. By laminating in the dry film 38 above the hole 34 is slightly recessed in the direction of the hole 34.

In addition, the dry film 38 on the upper portion of the hole 34 may be recessed in the direction of the hole 34 to form a bridge or fill the hole 34.

Next, as shown in FIG. 2E, the planarization process is performed such that the seed layer 36 on the upper surface of the sacrificial substrate 30 on which the dry film 38 is laminated is exposed, thereby providing the dry film 38 only inside the hole 34. The remaining portion forms a plug 39 in the hole 34.

In this case, the planarization process may include an etch-back or chemical mechanical polishing (CMP) process.

Subsequently, as shown in FIG. 2F, the second protective film 40 made of photoresist is thickly formed on the sacrificial substrate 30 on which the plug 39 is formed.

In this case, the photoresist as the second passivation layer 40 may be formed by spin coating or the like. Since the plug 39 is formed in the hole 34, the surface uniformity of the photoresist is constant and the inside of the hole 34 is constant. Photoresist is introduced into the photoresist and air from the holes 34 is prevented from diffusing into the photoresist.

Subsequently, as illustrated in FIG. 2G, the beam part connected to the tip of the electrical contact 46 is formed on the sacrificial substrate 30 by performing an exposure and development process on the second passivation layer 40 made of photoresist. A second protective film pattern 42 is formed. At this time, the plug 39 inside the hole 34 is simultaneously removed by the developer during the development process for forming the second passivation layer pattern 42.

Next, as shown in FIG. 2H, a conductive material 44 made of nickel alloy, such as nickel or nickel-cobalt, is embedded in the second passivation pattern 42 inside the sacrificial substrate 30, and then the upper surface of the sacrificial substrate 30 is embedded. Flatten.

In this case, the conductive material 44 may be embedded in the second passivation layer pattern 42 by a plating process using the seed layer 36. In another embodiment, the process of forming the seed layer 36 may be omitted, and CVD, The conductive material 44 may be embedded in the second protective film pattern 42 by a process such as PVD. In addition, since the photoresist does not remain in the hole 34, the conductive material 44 may be effectively embedded in the hole 34 to effectively form a tip of the electrical contact, which is completed by a subsequent process.

Finally, as shown in FIG. 2I, the second contact layer pattern 42, the seed layer 36, and the sacrificial substrate 30 are removed by wet etching using a predetermined chemical. Form.

In addition, in the present embodiment, the process of forming the holes 34 of the electrical contact body on the sacrificial substrate has been described above, but a high step, that is, the depth of the hole formed on the sacrificial substrate is deeply formed, and then a structure is manufactured on the top thereof. Of course, it can be applied to the field of MEMS (Micro Electro Mechanical System).

According to the present invention, the second protective film pattern 42 made of photoresist is formed after the plug is formed in the hole.

Therefore, the air filled in the hole formed on the sacrificial substrate may be diffused into the photoresist coated on the sacrificial substrate, thereby reducing the coating uniformity of the photoresist.

In addition, the photoresist may be filled into the deep hole formed on the sacrificial substrate, or the photoresist coating uniformity may be very poor due to the geometrically high surface energy around the hole.

In addition, the photoresist remains after the exposure and development processes for forming the second passivation layer pattern in the hole formed on the sacrificial substrate to solve the problem of causing a plating failure of the subsequent plating material.

Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical spirit of the present invention, and such modifications and modifications belong to the appended claims.

1A to 1F are cross-sectional views illustrating a method of manufacturing a probe tip for inspecting a conventional electronic device.

2A to 2I are cross-sectional views illustrating a method of manufacturing a probe tip for inspecting an electronic device according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10, 30: sacrificial substrate 12, 32: the first protective film pattern

14, 34: Hall 16, 36: seed layer

18, 42: second protective film pattern 20, 44: conductive material

22, 46: electrical contact 38: dry film

39: plug 40: second protective film

Claims (8)

Forming a deep hole on the sacrificial substrate: Forming a plug in the hole; Forming a protective film pattern defining a shape of a structure on the sacrificial substrate on which the plug is formed; Removing the plug; And Filling a conductive material in the protective film pattern; High step MEMS structure manufacturing method characterized in that it comprises a. The method of claim 1, wherein the forming of the plug in the hole comprises: Laminating a dry film on the sacrificial substrate; And Planarizing the top surface of the sacrificial substrate so that the top surface of the sacrificial substrate is exposed and leaving a dry film only inside the hole; High step MEMS structure manufacturing method characterized in that it comprises a. The method of claim 2, wherein the planarization of the top surface of the sacrificial substrate is performed using an etch-back. The method of claim 2, wherein the planarization of the top surface of the sacrificial substrate is performed using chemical mechanical polishing (CMP). The method of claim 1, wherein the forming of the protective layer pattern defining the shape of the structure on the sacrificial substrate on which the plug is formed comprises: Coating a photoresist on the entire surface of the sacrificial substrate on which the plug is formed Forming a photoresist pattern by exposing and developing the photoresist; High step MEMS structure manufacturing method characterized in that it comprises a. The method of claim 5, wherein the removing of the plug is performed by a developing process for forming the photoresist pattern. The method of claim 1, wherein after the step of filling the conductive material, the planarization process is further performed on the upper surface of the sacrificial substrate. The method of claim 1, wherein the conductive material is formed by plating.