KR100496422B1 - Flat Panel Display with improved white balance using MILC - Google Patents

Abstract

The present invention discloses a flat panel display that can improve white balance by varying the current mobility according to the length of an amorphous silicon film included in a channel region of a driving transistor in R, G, and B unit pixels of each pixel.

The flat panel display of the present invention includes R, G, and B unit pixels for implementing red (R), green (G), and blue (B), respectively, and each unit pixel includes a plurality of pixels including transistors. The transistor of at least one unit pixel among the R, G, and B unit pixels may include a channel layer including silicon layers having different film qualities.

The transistors of at least two unit pixels of the R, G, and B unit pixels have channel layers made of silicon layers having different film qualities, and the channel layers of the transistors of the at least two unit pixels have a low current mobility. The length of the silicon layer is characterized in that different from each other. Each of the R, G, and B unit pixels includes a light emitting element, and a transistor corresponding to the light emitting element having the lowest luminous efficiency among the light emitting elements of each unit pixel has a length of a silicon layer having a low film quality with low current mobility in the channel region. The current mobility of the channel region of the transistor corresponding to the light emitting device having low luminous efficiency is less than or equal to the length of the low quality silicon layer.

Description

Flat Panel Display with improved white balance using MILC}

The present invention relates to a full-color flat panel display, and more specifically, by varying the resistance value by varying the length of the amorphous silicon film included in the channel layer of the driving transistor for each R, G, B unit pixel using a MILC process. The present invention relates to a flat panel display device capable of implementing white balance and a manufacturing method thereof.

In general, an organic light emitting display device, which is a flat panel display device, includes a plurality of pixels 100 arranged in a matrix form as shown in FIG. 1, and each pixel 100 is a unit for implementing red (R). It consists of three unit pixels: a pixel 110R, a unit pixel 120G for implementing green (G), and a unit pixel 130B for implementing blue (B).

The R unit pixel 110R includes a red EL element 115 having a red (R) light emitting layer, a driving transistor 113 for supplying current to the red EL element 115, and the driving transistor 113. To the red EL element 113 from the switching transistor 111 for switching. The G unit pixel 120G includes a green EL element 125 having a green (G) light emitting layer, a driving transistor 123 for supplying current to the green EL element 125, and the driving transistor 123. Switching transistor 121 for switching the supply of current to the green EL element 123. The B unit pixel 130B includes a blue EL element 135 having a blue (B) light emitting layer, a driving transistor 133 for supplying current to the blue EL element 135, and the driving transistor 133. Switching transistor 131 for switching the current supply to the blue EL element 135.

Typically, the R, G, and B unit pixels 110R, 120G, and 130B of the OELD have a size W of the driving transistors 113, 123, and 133, that is, a ratio W of the width W to the length L of the channel layer. / L) are all constant, and the EL elements 113, 123, and 133 have high luminous efficiency in the order of B, R, and G unit pixels. Therefore, the R, G, and B unit pixels 110R, 120G, and 130B have the same length of the channel layer of the driving transistors 113, 123, and 133, while the EL layers 115, 125 of each of the R, G, and B unit pixels are the same. 135, it is difficult to implement the white balance (white balance) because the luminous efficiency of the different.

In order to realize white balance, a relatively small amount of current must be supplied to an EL device having a high luminous efficiency, for example, a green EL device, and a relatively large amount of current is supplied to a red and blue EL device having a low luminous efficiency. You should.

At this time, the current Id flowing through the driving transistor to the EL element is expressed as in Equation (1) since the driving transistor is operated in a saturated state.

Id = Cox mu W {(Vg-Vth)} ^ {2} / 2L ..... (1)

Therefore, one of the methods for controlling the current flowing to the EL element to realize the white balance is the size of the driving transistors of the R, G, and B unit pixels, that is, the width W of the channel length L of the transistor. There is a method of controlling the amount of current flowing through the EL elements of R, G, and B unit pixels by varying the ratio (W / L). Thus, a method of controlling the amount of current flowing to the EL element according to the size of the transistor is disclosed in Japanese Patent Laid-Open No. 2001-109399. In the Japanese patent, the size of the driving transistors of the R, G and B unit pixels is formed differently according to the luminous efficiency of the EL element for each of the R, G and B unit pixels. That is, the size of the driving transistor of the unit pixel for implementing green (G) having high luminous efficiency is made smaller than that of the unit transistor for implementing red (R) or blue (B) having low luminous efficiency. The amount of current flowing to the EL elements of the R, G, and B unit pixels was controlled by zooming.

Another method for implementing the white balance is a method of differently forming the area of the light emitting layer of the R, G, B unit pixels, which is disclosed in Japanese Patent Laid-Open No. 2001-290441. The Japanese patent forms light emitting areas differently according to the luminous efficiency of EL elements of R, G and B unit pixels, thereby generating the same luminance of R, G and B unit pixels. That is, the light emitting area of the R unit pixel or B unit pixel having low luminous efficiency than the G unit pixel having high luminous efficiency is formed to be relatively large so that the same luminance is generated through the R, G, and B unit pixels.

However, the conventional method for implementing the white balance as described above is to form a large light emitting area of the unit pixels of low luminous efficiency among the R, G, B unit pixels, or to increase the luminous efficiency of the R, G, B unit pixels. By increasing the size of the transistor of a low unit pixel, the area occupied by each pixel increases, and thus there is a problem that it is difficult to apply to high resolution.

Accordingly, an object of the present invention is to provide a flat panel display device and a method for manufacturing the same, which can achieve white balance without increasing the pixel area.

Another object of the present invention is to provide a flat panel display device and a method of manufacturing the same, which can realize white balance by differently forming resistance values of channel layers of driving transistors for R, G, and B unit pixels.

Another object of the present invention is to provide a flat panel display device and a method of manufacturing the same, which can achieve height balance by varying the length of an amorphous silicon film included in a channel layer of a driving transistor for each R, G, and B unit pixel.

In order to achieve the object as described above, the present invention is provided with R, G, B unit pixels for implementing red (R), green (G), blue (B), respectively, wherein each unit pixel is a transistor A flat panel display device including a plurality of pixels, wherein the transistors of at least one unit pixel among the R, G, and B unit pixels has a channel region formed of a silicon layer having a different film quality.

Transistors of at least two unit pixels of the R, G, and B unit pixels have channel regions formed of silicon layers having different film qualities, and the channel regions of the transistors have a length of a silicon layer having a low current mobility in the silicon layers. Is characterized in that different.

Each of the R, G, and B unit pixels includes a light emitting element, and a channel region of a transistor corresponding to the light emitting element having the lowest luminous efficiency among the light emitting elements of the R, G, and B unit pixels has a higher luminous efficiency than the light emitting element. It is characterized in that the film-like silicon layer having a lower current mobility than the channel region of the transistor corresponding to the light emitting element has a small or no length.

The channel layer of the transistor is composed of an amorphous silicon layer and a polycrystalline silicon layer, and the film-like silicon layer having low current mobility is characterized in that the amorphous silicon layer.

The present invention also provides a flat panel display including R, G, and B unit pixels, each unit pixel including a transistor, the method comprising: forming an amorphous silicon film on an insulating substrate; Forming first to third MILC masks on the amorphous silicon film; Depositing a metal film for MILC on the entire surface of the substrate; Crystallizing the amorphous silicon film with the polysilicon film so that the amorphous silicon film partially remains only below the first to third masks; Removing the first to third MILC masks and the MILC metal film; Patterning the polysilicon film so that an amorphous silicon film exists between the polysilicon films, thereby forming a semiconductor layer of the transistors of the R, G, and B unit pixels, wherein the channel region of the transistors of the R, G, and B unit pixels is formed. The present invention provides a method of manufacturing a flat panel display device in which a resistance value of a channel region is determined according to a length of an amorphous silicon film existing between polycrystalline silicon films.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

2A through 2D are cross-sectional views illustrating a method of manufacturing an organic light emitting display device according to an exemplary embodiment of the present invention. 2A to 2D show the cross-sectional structure of the organic light emitting display device limited to driving transistors among R, G, and B unit pixels of each pixel.

Referring to FIG. 2A, a buffer layer is formed on the insulating substrate 200, and an amorphous silicon film 210 is formed thereon. Subsequently, a plurality of masks 221, 223, and 225 for MILC are formed on the amorphous silicon film 210, and the metal layer 230 is formed on the entire surface of the substrate.

In this case, the MILC masks 221, 223, and 225 are formed to have different widths, and the masks 221, 223, and 225 are formed to have a larger width in order of the second mask 223, the first mask 221, and the third mask 225. do. The first mask 221 is formed corresponding to a portion in which the driving transistor (113 in FIG. 1) of the R unit pixel is to be formed among the R, G, and B unit pixels, and the second mask 223 is formed of the G unit pixel. A driving transistor (123 of FIG. 1) is formed corresponding to a portion where a driving transistor (123 of FIG. 1) is to be formed, and the third mask 225 is formed corresponding to a portion where a driving transistor (133 of FIG. 1) of a B unit pixel is to be formed.

Referring to FIG. 2B, a crystallization process for crystallizing the amorphous silicon film 210 into the polysilicon film 240 is performed, which corresponds to the masks 221, 223, and 225 of the amorphous silicon film 210. The part to be crystallized by MILC is crystallized into polycrystalline silicon films 241, 243 and 245, and the part directly contacting the metal layer 230 between the masks 221, 223 and 225 is a polycrystalline silicon film (MIC). 247).

In this case, since the widths of the first to third masks 221, 223, and 225 for MILC are different from each other, all parts corresponding to the third mask having a smaller width are crystallized by MILC and have a relatively large width. Only portions of the portions corresponding to the first and second masks 221 and 223 are crystallized by MILC, so that the amorphous silicon films 211 and 213 remain.

That is, in the portion corresponding to the first mask 221, an amorphous silicon film 211 exists between the portions 241 crystallized by MILC in the polysilicon film 240, and in the portion corresponding to the second mask, polycrystalline An amorphous silicon film 213 is present between the portions 243 of the silicon film 240 crystallized by MILC. In addition, since the width of the first mask 221 is relatively smaller than the width of the second mask 223, the length of the amorphous silicon film 213 is an amorphous silicon film (a portion of the portion corresponding to the first mask 221). Greater than the length of 211).

Referring to FIG. 2C, after removing the MILC masks 221, 223, and 225 and the metal layer 230, the polysilicon layer 240 is formed using a mask (not shown) for forming a semiconductor layer. Are patterned to form driving transistor semiconductor layers 251, 253, and 255 of R, G, and B unit pixels. The driving transistor semiconductor layer 251 of the R unit pixels among the R, G, and B unit pixels is a crystallized portion 241 of the polysilicon film 240 by MILC and an amorphous silicon film 211 existing therebetween. Is done. The driving transistor semiconductor layer 253 of the G unit pixel is composed of a portion 243 crystallized in MILC of the polysilicon film and an amorphous silicon film 213 existing therebetween. On the other hand, the drive transistor semiconductor layer 255 of the B unit pixel is composed of only the polysilicon film 245 crystallized by MILC in the polysilicon film.

Referring to FIG. 2D, a gate insulating film 260 is deposited on the entire surface of the substrate including the semiconductor layers 251, 253, and 255, and then a conductive material such as a metal film is deposited thereon, followed by a gate forming mask. The conductive material is patterned to form the gates 271, 273, and 275 of the driving transistors for each pixel of R, G, and B units. Subsequently, source / drain regions 281, 283, and 285 of the driving transistor are ion-implanted with high concentration impurities of a predetermined conductivity type into the semiconductor layers 251, 253, and 255 using the gates 271, 273, and 275 as masks. To form.

Thereafter, although not shown in the drawing, an interlayer insulating film is formed on the entire surface of the substrate, and the contact hole exposing the source / drain regions 281, 283, and 285 is formed by etching the interlayer insulating film and the gate insulating film 260. The driving transistor is manufactured by forming a source / drain electrode electrically connected to the source / drain regions 281, 283, and 285 through the contact hole.

In the flat panel display device of the present invention manufactured by the above method, the channel layer 282 of the driving transistor of the R unit pixel is composed of the polysilicon film 241 and the amorphous silicon film 211 by MILC, and the channel The length Lrc of the layer is equal to the sum Lrc = Lr1 + Lra + Lr2 of the lengths Lr1 and Lr2 of the polysilicon film 241 and the length Lra of the amorphous silicon film 211. The channel layer 284 of the driving transistor of the G unit pixel is composed of the polysilicon film 243 and the amorphous silicon film 213 by MILC, and the length Lgc of the channel layer is the length of the polysilicon film 243. The sum of the lengths Lg1 and Lg2 and the length Lga of the amorphous silicon film 213 becomes Lgc = Lg1 + Lga + Lg2. In addition, the channel layer 286 of the driving transistor of the B unit pixel is made of only the polysilicon film 245 by MILC, and the length Lbc of the channel layer is equal to the length Lb of the polysilicon film 245.

In the driving transistor for each R, G, and B unit pixel, the lengths of the channel layers 282, 284, and 286 are the same as Lrc = Lgc = Lbc, and therefore, the channel of the driving transistor according to the length of the amorphous silicon film included in each channel layer. The resistance value of the layer changes. That is, in the embodiment of the present invention, the resistance value of the channel layer is determined according to the luminous efficiency of the EL element of the R, G, and B unit pixels, but the channel layer 286 of the B unit pixel having the lowest luminous efficiency is the lowest. Since is made of a polysilicon film by MILC, the resistance value of the channel layer is relatively low.

In addition, in the channel layers 282 and 284 of the R or G unit pixels having a relatively high luminous efficiency, an amorphous silicon film is present between the polysilicon films to relatively increase the resistance of the channel layer. In this case, since the luminous efficiency of the EL element of the G unit pixel is higher than that of the EL unit pixel, the length Lra of the amorphous silicon film 211 existing in the channel layer 282 of the R unit pixel is higher than that of the G unit pixel. It is formed to be formed relatively shorter than the length Lga of the amorphous silicon film 213 present in the channel layer 284.

Accordingly, in the present invention, the channel layers of the driving transistors of the R, G, and B unit pixels have the same length, while the amorphous silicon films present in the channel layers of the driving transistors of the R, G, and B unit pixels have different lengths. In this case, the white balance may be realized by forming the resistance values of the channel layers of the driving transistors to have different values.

In the embodiment of the present invention, the crystallization process is performed so that the amorphous silicon film exists in the channel layer through the MILC process, so that the resistance value of the channel layer of the driving transistor for each R, G, and B unit pixels is changed, but instead of the MILC process. The method of changing the resistance values of the driving transistors of the R, G, and B unit pixels by performing different crystallization processes such that the amorphous silicon film having different lengths are included in the channel layer is applicable. The amorphous silicon film does not exist in the channel layer of the driving transistor of the B unit pixel. However, the amorphous silicon layer is not necessarily limited thereto, but the amorphous silicon layer has a resistance value such that white balance can be achieved for the channel layer of the R or G unit pixel. It is also possible to form a structure including a film.

In addition, in the present invention, it is also possible to perform a crystallization process so that an amorphous silicon film exists in each channel layer by controlling the crystallization temperature or crystallization time during MILC crystallization, and all the channel regions of the switching transistors of each unit pixel are MILC polycrystalline silicon films. Alternatively, the driving transistors of the R and G unit pixels may have an amorphous silicon film between the polysilicon films, and the driving transistors of the B unit pixels may form a channel region made of the polysilicon film.

According to the embodiment of the present invention as described above, the white balance can be realized without increasing the pixel area by changing the resistance value of the channel layer of the R, G, B unit pixels.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

1 is a view showing an arrangement state of R, G, B unit pixels of a conventional flat panel display;

2A through 2D are cross-sectional views illustrating a method of manufacturing driving transistors of R, G, and B unit pixels in a flat panel display device according to an exemplary embodiment of the present invention;

* Description of the symbols for the main parts of the drawings *

200: insulating substrate 210, 211, 213: amorphous silicon film

230: MILC metal layer 221, 223, 225: MILC mask

240: polycrystalline silicon film 241, 243, 245: MILC polycrystalline silicon film

247: MIC polysilicon film 260: Gate insulating film

271, 273, 275: Gates 281, 283, 285: Soso / Drain regions

282, 284, 286: channel layer 251, 253, 255: semiconductor layer

Claims (6)

Each of which has R, G, and B unit pixels for implementing red (R), green (G), and blue (B), the unit pixels each including a plurality of pixels including transistors, The transistor of at least one unit pixel of the R, G, and B unit pixels includes a channel region formed of silicon layers having different film qualities. The transistor of claim 1, wherein the transistors of at least two unit pixels of the R, G, and B unit pixels have a channel region including at least one silicon layer having different film quality, and have low current mobility in the channel region. And a silicon layer having a different length. The light emitting device of claim 2, wherein each of the R, G, and B unit pixels includes a light emitting element, and a channel region of a transistor corresponding to the light emitting element having the lowest luminous efficiency among the light emitting elements of the R, G, and B unit pixels is the light emitting element. A flat panel display device characterized in that the silicon layer of a film quality having a lower current mobility than a channel region of a transistor corresponding to a light emitting device having a higher luminous efficiency than a device is short or absent. The flat panel display of claim 1, wherein the channel region comprises a polycrystalline silicon layer and an amorphous silicon layer. The flat panel display of claim 2 or 3, wherein the silicon layer having a low current mobility in the channel region is formed of an amorphous silicon layer. In the flat panel display device comprising R, G, B unit pixels, each unit pixel comprising a transistor, Forming an amorphous silicon film on the insulating substrate; Forming first to third MILC masks on the amorphous silicon film; Depositing a metal film for MILC on the entire surface of the substrate; Crystallizing the amorphous silicon film with the polysilicon film so that the amorphous silicon film partially remains only below the first to third masks; Removing the first to third MILC masks and the MILC metal film; Patterning the polysilicon film so that an amorphous silicon film exists between the polysilicon films, thereby forming a semiconductor layer of a transistor of the R, G, and B unit pixels; The channel region of the transistors of the R, G, and B unit pixels has a resistance value of the channel region determined according to the length of the amorphous silicon film present between the polysilicon films.