KR100479766B1 - Dynamic feed white electrostatic wafer chuck - Google Patents

Abstract

The electrostatic chuck system holding the wafer 108 on the surface of the electrostatic chuck 302 includes a wafer bias sensor 400 coupled to the first portion of the electrostatic chuck to sense an alternating current signal at the first portion. The sensor is coupled to a variable power supply 410 that outputs a DC voltage level indicative of the DC bias level of the wafer in response to an AC signal and provides a first potential level to the first portion of the electrostatic chuck. The first potential level is changed in response to the DC voltage level to maintain a first predetermined potential difference between the first region of the electrostatic chuck and the first region of the wafer overlying the first region, regardless of the DC bias magnitude of the wafer.

Description

Dynamic Feedback Electrostatic Wafer Chuck

The present invention relates to the manufacture of semiconductor devices. In particular, the present invention relates to a method and apparatus for securing a semiconductor wafer on an electrostatic (ESC) chuck of a plasma processing chamber during wafer processing.

Plasma enhanced semiconductor processes for etching, oxidation, anodization, chemical vapor deposition (CVD) are well known. For example, FIG. 1A shows a representative plasma processing system 100 having a plasma processing chamber 102. Above the chamber 102 is arranged an electrode 103 embodied by a coil in the embodiment of FIG. 1. Coil 103 is excited by RF generator 105 through a matching network (not shown in FIG. 1A).

Within the chamber 102 a showerhead 104 is provided that includes a plurality of holes for releasing a gas source material into the RF induced plasma region between itself and the wafer 108. In one embodiment, the showerhead 104 is made of quartz but may be made of other suitable materials and is electrically floating or grounded. Wafer 108 acts as a second electrode and is disposed on chuck 110 biased by high frequency generator 120 (via a mating network).

1A is a simplified plasma enhanced processing system included for the purpose of introducing the background of the present invention. As is known to those skilled in the art, modifications to the plasma processing system design are possible. For example, FIG. 1B is a variation of the plasma processing system of FIG. 1A, where a single RF generator 150 is used (via changeover switch 152) to supply RF power to chuck 110 or showerhead 104. . In the case of FIG. 1B the coil is not used and the showerhead 104 acts as an electrode when excited by the RF generator 150.

It is desirable that the temperature of the wafer 108 be precisely controlled during plasma processing to ensure uniform and repeatable etching and deposition of the material. Control of the wafer temperature is performed by introducing a heat exchange gas, one of an inert gas such as helium, into the wafer / chuck interface below the wafer. In the plasma processing system of FIGS. 1A and 1B, helium is introduced into the region between wafer 108 and chuck 110 through port 112.

A helium pressure of 5-15 torr is required to provide a suitable heat transfer medium between the wafer and the chuck. Since the pressure in chamber 102 is relatively low (usually 5 millitorr-500 millitorr (mT)), a fixture is required to secure wafer 108 on chuck 110. Fixation minimizes helium leakage around the bottom of the wafer to maintain acceptable helium pressure and achieve satisfactory heat transfer.

One known method for fixing a wafer on a chuck is electrostatic fixing. In electrostatic fixation, the electrostatic chuck is electrically biased against the wafer to generate electrostatic forces between the chuck and the wafer. Electrostatic forces hold the wafer against the chuck to minimize helium leakage and improve heat transfer.

2 shows a monopolar electrostatic chuck 200. The electrostatic chuck of FIG. 2 is called a monopolar chuck since it is biased with a single polarity, ie positive or negative, during use. A dielectric layer 202 made of a suitable dielectric material, such as a polymer or ceramic, is disposed over the monopolar chuck 200 and provided with the chuck 200 as a single unit. During processing, the wafer 108 is disposed over the chuck 200 and separated by the dielectric layer 202.

When plasma is generated in the plasma processing chamber, the wafer 108 is negatively charged by the plasma. By supplying power 201 to generate a potential difference between the chuck 200 and the negatively charged wafer, i.e., biasing the chuck positively, an electrostatic force is generated to fix the wafer 108 on the chuck 200. .

3A shows a cross-sectional view of a bipolar electrostatic chuck. The dipole electrostatic chuck 302 of FIG. 3A has two poles: an anode 304 and a cathode 306. The dipole chuck 302 is arranged in a configuration known as a "donut-base". This configuration is more clearly shown in Figure 3b. However, the present invention is not limited to this configuration and applies to all known or suitable bipolar chuck configurations.

A dielectric layer 202 is disposed on top of the bipolar electrostatic chuck from which a suitable material such as ceramic or polymer can be made. The wafer 108 is then placed over the dielectric layer 202 of the bipolar ESC chuck for processing.

The cathode 306 is negatively biased by the power supply 310 to the common reference potential level when the power supply 310 is turned on. The power supply 310 also positively biases the anode 304 with respect to the common reference potential level. In the case of a p-type semiconductor wafer, the presence of a negative potential on the cathode 306 electrostatically induces a positive charge or hole in the wafer 108 and moves it towards the cathode 306 wafer region. Conversely, in the case of an n-type semiconductor wafer, electrons in the wafer 108 move toward the anode 304 wafer region. As a result, electrostatic forces between the pole and the wafer region are generated to provide the necessary clamping force for securing the wafer 108 to the bipolar electrostatic chuck 302 during processing.

If the poles are biased equally with opposite polarity with respect to the common reference voltage level, an imbalance of extreme electrostatic forces can occur when a plasma is generated and the wafer is negatively biased. To illustrate this condition, consider the case where the power supply 310 biases the positive electrode to + 350V and the negative electrode 306 to -350V with respect to the common reference voltage level. When the plasma is extinguished, the wafer potential is 0V with respect to the common reference voltage level and the potential difference between the pole of the bipolar chuck 302 and the wafer region is + 350V and -350V, respectively.

However, due to the presence of the plasma, when the wafer 108 is negatively charged, the potential difference between the two poles of the wafer and the bipolar electrostatic chuck becomes asymmetric. For example, the wafer bias voltage can be -100V when the plasma is generated. In this case, the potential difference between the anode and the negatively biased wafer is increased to + 450V (i.e., + 350V-(-100V)). However, the potential difference between the cathode and the negatively biased wafer is reduced to -250V (ie -350V-(-100V)). Thus, the electrostatic holding force between the cathode and the wafer is weakened. As a result, some heat exchange gases may escape, resulting in inaccurate temperature control or process variables.

In addition, plasma induced negative wafer bias can unduly increase the potential difference between the negatively biased wafer and the anode of the bipolar chuck. An excessively high potential difference can cause a spark between the bottom face of the wafer and the top face of the chuck, resulting in pit mark damage. Over time, the surface of the chuck may be damaged to such an extent that it is impossible to seal the heat exchange gas. This spark problem may occur in a monopolar chuck system if the potential difference between the monopolar chuck and the negatively biased wafer is excessively large.

If the DC bias potential is constant during plasma processing, this imbalance can be compensated by appropriately modifying the voltage level supplied to the chuck in a static manner. For example, if the anode of the bipolar chuck is less negatively biased to a common reference voltage level, the electrostatic force imbalance mentioned above can be significantly removed to reduce the risk of electrostatic sparks. Techniques for modifying the voltage level supplied to the chuck are disclosed in US patent application Ser. No. 08 / 550,510, filed 10/30/95, Representative Document No. P168 / LAM1P004, entitled "Negative Offset Bipolar Electrostatic Chuck." In unipolar systems, such as the system shown in FIG. 2, the entire chuck can be biased less positively to offset the negative bias level of the wafer in the presence of plasma.

However, the direct current bias potential of a given wafer may not remain constant during processing and may actually vary from process to process. As a result, the potential difference between the wafer and the chuck and the change in the generated electrostatic force cannot be eliminated by biasing the chuck's power supply in a static manner.

In light of the above, what is needed is an improved method and apparatus for securing a wafer to an electrostatic chuck during plasma processing, which apparatus and method should be able to respond in real time to the dynamic nature of plasma processing.

1a and 1b show known plasma enhanced processing systems.

2 shows a monopolar electrostatic chuck.

3A is a cross-sectional view of a bipolar electrostatic chuck.

3B shows the donut-base configuration of a bipolar electrostatic chuck.

4 shows an embodiment of a dynamic feedback bipolar electrostatic (ESC) chuck system in accordance with an aspect of the present invention.

5A shows an example of a wafer bias sensor.

5B shows another example of a wafer bias sensor.

6A, 6B, 7 and 8 are graphs showing signals measured at different points in the wafer bias sensor of FIG. 5A.

9 shows an embodiment of a dynamic feedback monopole electrostatic (ESC) chuck system in accordance with an aspect of the present invention.

* Code Description

100 ... plasma processing system 102 ... plasma processing chamber

103 ... coil 104 ... shower head

108 ... Wafer 110 ... Chuck

112 ... port 120 ... high frequency generator

150 ... RF generator 152 ... Switching circuit

200 ... Chuck 202 ... Dielectric Layer

302 ... Chuck 304 ... Anode

306 ... cathode 310 ... power supply

400 ... wafer bias sensor 402 ... measuring point

403 ... conductor 410 ... bridge

417,418 ... RF filter 420 ... RF generator

421,422 ... blocking capacitors 424 ... RF compliant circuit

502,504,508 ... conductor 506 ... blocking capacitor

510 ... Diode Modules 512,514 ... Resistors

516 ... Capacitors 518 ... Nodes

520 ... RC network 550,552,554,556 ... circuit block

551a, 551b ... capacitor 560,562 ... diode

564 ... Register 570 ... Buffer Circuit

572 ... power supply 574 ... resistor

The present invention relates to an electrostatic chuck system having an electrostatic chuck for securing a wafer on the surface of the electrostatic chuck. The electrostatic chuck system includes a wafer bias sensor coupled to a first portion of the electrostatic chuck for sensing an alternating signal. The wafer bias sensor outputs a DC voltage level indicating the DC bias level of the wafer in response to the AC signal.

The electrostatic chuck system includes a variable electrostatic chuck power supply coupled to a wafer bias sensor. The variable electrostatic chuck power source provides a first potential level at the first portion of the electrostatic chuck. The first potential level is varied in size to maintain a first predefined potential difference between the first portion of the electrostatic chuck and the first region of the wafer covering the first portion regardless of the direct current bias level of the wafer.

In another embodiment, the present invention relates to a method of securing a wafer to the surface of an electrostatic chuck. The method includes sensing a first AC signal at a first portion of the electrostatic chuck and inducing a DC voltage level indicative of the DC bias level of the wafer in response to the first AC signal. In addition, the method is controlled by a DC power supply in response to a DC voltage level in order to maintain a predetermined potential difference between the first region of the electrostatic chuck and the first region of the wafer covering the first region, regardless of the magnitude of the DC bias level of the wafer. Changing the first potential level supplied to the first portion of the electrostatic chuck.

An invention is disclosed which dynamically infers a wafer direct current bias level and changes the potential level supplied to the pole of an ESC chuck by an electrostatic chuck (ESC) power supply in response to the inferred wafer direct current bias level.

4 shows an embodiment of a dynamic feedback electrostatic (ESC) chuck system in accordance with an aspect of the present invention. The ESC chuck system of FIG. 4 is called a dynamic feedback configuration because the wafer DC bias level is dynamically inferred and used to change the potential level supplied to the poles of the ESC chuck by the ESC power supply. Although a bipolar ESC chuck is shown, the dynamic feedback concept in the subsequent FIG. 9 also applies to a unipolar ESC chuck.

In FIG. 4 a bipolar ESC chuck 302 is shown comprising a donut portion 304 and a base portion 306. The bipolar ESC chuck 302 is excited by the RF generator 420 through a matching circuit 424 which serves to maximize power transfer from the RF generator 420 to the plasma. The RF peak-to-peak voltage (V _peak-peak ) is sensed through the conductor 403 by a wafer bias sensor (WBS) 400 at a predefined measurement point 402 on the ESC chuck. The measuring point 402 is located at the base portion 306 of the bipolar ESC chuck 302 but may be located at any point on the chuck, such as the donut portion 304. In particular, the measuring point 402 is located at a chuck point that is not exposed to the plasma environment. By not exposing to a highly reactive plasma environment in this manner, RF peak-to-peak voltage can be sensed without jeopardizing the long term persistence of the conductor 403. Wafer bias sensor contact from the plasma processing chamber, ie the absence of conductor 403, minimizes the possibility of contamination.

According to one aspect of the invention, the measured RF peak-to-peak voltage, which is an alternating signal, is then converted by the wafer bias sensor 400 to a direct current voltage level. The direct current bias voltage (V _DC-W ) of the wafer is related to the _peak- to-peak voltage (V _peak-peak ) measured by the ESC chuck according to the following equation:

[Equation 1]

Here, V _PL represents the plasma voltage and V _DC-W represents the DC bias voltage of the wafer when RF power is supplied to the chuck and the plasma is present in the plasma processing chamber.

In a typical plasma processing environment, the plasma voltage (V _PL ) is 20-70 volts. In contrast, the peak-to-peak voltage (V _PK-PK ) supplied to the chuck by the RF source is at most 2000 volts, in particular 300-1500 volts. Since the plasma voltage V _PL is much smaller than the peak-to-peak voltage V _PK-PK measured on the chuck, the DC bias voltage of the approximated wafer may be represented by Equation 2 after the plasma voltage V _PL is ignored.

[Equation 2]

In Equation 2, the DC bias voltage approximation (V _DC-WA ) of the wafer can be directly and accurately inferred from the measured peak-to-peak voltage (V _PK-PK ) of the chuck.

The function of the wafer bias sensor (WBS) 400 is to derive an approximated wafer DC bias voltage (V _DC-WA ) from the RF peak-to-peak voltage measured on the ESC chuck. This wafer DC voltage V _DC-WA is then used as a feedback voltage to the variable ESC power supply 412 to change the potential level supplied to the two poles (poles 304 and 306 of the bipolar ESC chuck). .

In the example of FIG. 4, the approximated wafer DC bias voltage (V _{DC -WA} ) is supplied to the bridge 410 of the variable ESC power supply 412 to provide a base portion 306 and a donut portion 304 (conductors 414, respectively). Control the potential level. Bridge 410 includes two resistors R1 and R2 connected in series and is used to change the potential level at nodes 430 and 432. In this way, the potential level supplied to the pole of the bipolar ESC chuck is adjusted for an approximated wafer direct current bias voltage (V _{DC -WA} ).

For example, if the approximated wafer DC bias voltage (V _{DC -WA} ) is around -100 volts, the cathode and anode of the bipolar ESC chuck 302 by the DC voltage source (V _S ) (ie, base region 306 in FIG. 4). ) And the donut site 304) are reduced by the same size, ie 100 volts. Thus, the potential difference between the pole and the wafer region is constant regardless of the direct current bias level of the wafer.

Although a variable ESC power source 412 is implemented by a bridge connected in series with a DC supply source, other conventional variable DC power sources that can change the output for a DC input signal can be used.

In another configuration, the resistors forming bridge 410, such as resistors R1 and R2 of FIG. 4, may be unbalanced to supply potential levels of opposite polarity and not equal size to the poles of the chuck. The ability to change the potential level supplied to the pole of the chuck is another variable that can be adjusted to obtain the required wafer holding force.

5A shows an example of the wafer bias sensor 400 of FIG. 4, inferring the wafer DC bias voltage by performing negative peak detection on the alternating current signal obtained on the bipolar ESC chuck 302. The example shown in FIG. 5 is for illustration only and there is a conventional circuit that performs a similar negative peak detection task. Since the wafer bias sensor 400 is designed to perform negative peak detection on the AC RF signal, its components are selected to handle the measured high voltage, high frequency AC signal.

In FIG. 5A, wafer bias sensor 400 receives an RF peak-to-peak alternating signal (V _PK-PK ) measured on the chuck via conductor 502 and approximates a variable electrostatic chuck power supply through conductor 504. The wafer DC bias voltage V _DC-WA is output. The DC blocking capacitor 506 cuts off the DC voltage level on the conductor 502 from the conductor 508.

The peak-to-peak information known on conductor 502 is also present at node 508. However, compared to the waveform on the conductor 502, the waveform at the node 508 is downward by the same value as the front bias voltage of the diode module 510 minus the magnitude of the RF peak voltage (i.e., half of the RF peak-to-peak voltage). Is moved to. For example, if the RF peak-to-peak voltage is 700 volts and the front bias voltage of the diode module 510 is about 30 volts, the downward travel magnitude is about 320 volts (700 volts / 2-30 volts).

The diode module 510 represents a plurality of diodes connected in series and in series with the RC circuit 518, whose aggregate front bias voltage is similar to the plasma potential V _PL . Using multiple diodes in series is useful to allow diode module 510 to withstand the high voltage peaks present at node 508. In one embodiment, this aggregate front bias voltage is about 30 volts close to the plasma voltage V _PL up to the first order. The diodes in diode module 510 are selected with low capacitance to prevent the formation of capacitive voltage divider circuits and to ensure accurate peak detection of the alternating signal at node 508. In one embodiment, diode module 510 includes about 42 diodes in series, each diode having a capacitance value of about 2-4 PF. In particular, diode module 510 has an aggregate capacitance value of less than 4 PF, in particular about 0.5 PF. In addition, the diode module 510 has a response time of less than 15 nanoseconds to minimize the phase shift of the AC signal at the node 508 which introduces an error in the peak detection circuit. In addition, each diode of the diode module is connected in parallel with a voltage balancing resistor including the carbon composition. In addition, the voltage balancing resistance has a low parasitic capacitance of less than 2 PF and a low parasitic inductance of less than 30-50 nH. In diode modules, when the diodes are connected in series, the voltage balancing resistors are connected in series to evenly distribute the reverse voltage of the diode to prevent diode reverse destruction caused by excessive reverse voltage.

A resistor 512 is connected between the diode modules 510 and grounded to limit the current surge to the diode module 510 and provides a constant time for charging the capacitor 506. In one embodiment, resistor 512 is selected such that capacitor 506 can be charged within 800 nanoseconds.

A low pass filter is used to obtain direct current information from the waveform presented at node 508. In a preferred embodiment the low pass filter is implemented by an RC network 520 comprising a resistor 514 and a capacitor 516. Since the signal at node 508 is a relatively high voltage alternating current signal, resistor 514 is preferably a low impedance resistor to prevent parallel resonance and minimize power dissipation. In one embodiment, resistance 514 has an inductance of less than about 50 nH.

In addition, resistor 514 is preferably a high voltage, high power resistor to withstand full peak to peak voltage at node 508. For example, resistors having a rated voltage of 3K Volts, in particular 6K Volts, are suitable. The rated power of this resistor 514 is about 15 watts.

Between resistor 514 and capacitor 516, node 518 is connected to conductor 504 to convert a negative DC voltage (V _DC-WA ) that approximates the wafer DC bias voltage, which is a variable ESC chuck power supply, i. To the bridge 410 of the ESC power supply 412.

In this way, the present invention detects the RF peak-to-peak voltage from the ESC chuck and infers the DC bias approximation level of the wafer from it. The inferred approximated direct current bias level is then used as the feedback voltage to change the potential level supplied by the variable ESC chuck power supply to dynamically process the plasma induced change in the direct current voltage level of the wafer under different plasma conditions.

Due to the dynamic feedback feature, a relatively constant potential difference is maintained between the pole of the ESC chuck and the wafer region during processing. Therefore, the holding force between the chuck and the wafer should be within tolerances to reduce the likelihood of arcing or dechucking.

5B shows another embodiment of the wafer bias sensor 400 of FIG. 4. Conductor 502 supplies the RF peak-to-peak alternating signal (V _PK-PK ) measured on the chuck to the wafer bias sensor of FIG. 5B. The approximated wafer direct current voltage (V _{DC -WA} ) is output through the conductor 504 to the variable electrostatic chuck power supply, that is, the variable electrostatic chuck power supply 412 of FIG. 4.

The circuit block 550 in the wafer bias sensor of FIG. 5B is a 100: 1 capacitive splitting circuit with the value of the capacitor 551a which is 99 times the value of the RF signal reduction block, particularly the capacitor 551b. Circuit block 552 represents a negative peak detector circuit comprising two fast diodes 560, 562 and a resistor 504. The circuit block 554 is a filter that obtains a direct current signal from the output of the negative peak detector circuit of the circuit block 552. In the embodiment of FIG. 5B, circuit block 554 is implemented by an RC filter.

The circuit block 556 is a signal amplifying circuit that amplifies a small DC signal output by the filter of the circuit block 554. In this embodiment, circuit block 556 includes a buffer circuit 570 that provides a gain ratio of 100: 1 and is connected in series with a high voltage variable floating power supply 572. The reduced value of the circuit block 550 and the amplified value of the circuit block 556 may be changed. The positive terminal of high voltage variable floating power supply 572 is either directly grounded or grounded through resistor 574 to limit leakage current. The output of the circuit block 556 is then provided via a conductor 504 to a variable electrostatic chuck power supply, such as the power supply 412 of FIG. 4.

FIG. 6A is a graph illustrating an AC RF signal measured at the measuring point 423 of FIG. 4. Peak-to-peak information is included in the waveform and denoted V _PK-PK in FIG. 5A. The DC component is removed by a DC blocking capacitor, such as capacitors 421 and 422 in FIG. 4 so that the waveform is symmetrical around the horizontal zero volt line of the voltage axis. FIG. 6B is a graph showing an AC RF signal measured on an ESC chuck, eg, at measurement point 402 of FIG. 4. The waveform shown in FIG. 6B is the same as that of FIG. 6 except that it is shifted downward by half the supply voltage (V _S ) plus the wafer DC bias magnitude, ie, downward by V _S / 2 + | V _DC-W | It has a peak-to-peak voltage (V _PK-PK ).

FIG. 7 is a graph showing an alternating RF signal obtained at node 508 of the negative peak detector of FIG. 5A. The waveform shown in FIG. 7 is the same shape and peak as in FIG. 6 except that the peak voltage value (ie, half of the RF peak-to-peak voltage) is subtracted downward by the front bias voltage magnitude (V _D ) of the diode module. It has a large peak voltage (V _PK-PK ). Thus, the waveform portion above 0 volts represents the front bias voltage of the diode module and is denoted V _D in FIG. 7. In one embodiment, the front bias voltage of diode module 510 is selected to be close to the plasma voltage V _PL , such as 30 volts.

FIG. 8 shows the direct current feedback signal output by the wafer bias sensor on the conductor 504 of FIG. 5A. This direct current bias is a negative value representing the dynamically inferred direct current bias of the wafer. This DC feedback signal is a signal used to change the potential level supplied to the pole of the electrostatic chuck.

9 shows a single pole chuck system using the dynamic feedback technique of the present invention. In Fig. 9, the monopole chuck 200 is positively biased to provide the necessary clamping force, although it may be negatively biased. The circuit of FIG. 9 can be modified for dynamic sensing for a negatively biased monopole chuck.

In FIG. 9, the wafer 108 is disposed over the dielectric layer 202 of the monopole chuck 200. The peak-to-peak voltage of the chuck is detected at measurement point 902 on the chuck and processed by wafer bias sensor (WBS) 400 to infer an approximated wafer direct current bias voltage. Similar to the measurement point 402 of FIG. 4, the measurement point 902 is located at a chuck point not exposed to the plasma environment to maximize sensor persistence and minimize the possibility of contaminating the wafer processing chamber.

In one embodiment, wafer bias sensor 400 is implemented by the negative peak detection circuit of FIG. 5A. The inferred wafer DC bias voltage output by the wafer bias sensor 400 is then used as a feedback voltage that changes the potential level supplied by the DC voltage source 904 to the monopole chuck 200. For example, as the wafer becomes more negatively biased, the inferred wafer DC bias voltage output by the wafer bias sensor 400 becomes more negative. In response to this inferred DC bias voltage, the DC voltage source 904 reduces the positive DC potential level supplied to the chuck 200. The RF filter 417, the RF generator 422, the RF conforming circuit 424, and the direct current blocking capacitor have been described with reference to FIG. 4.

The dynamic feedback feature keeps the potential difference between the monopole chuck and the wafer constant throughout the process. As a result, the possibility of creating an excessively high potential difference between the wafer and the monopole chuck is minimized, thereby reducing the likelihood of causing breakage damage of the dielectric layer 202 or pit mark damage (due to arc) on the chuck or wafer top surface.

Claims (23)

A wafer bias sensor coupled to the first portion of the electrostatic chuck to sense an alternating current signal at the first portion of the electrostatic chuck and outputting a direct current voltage level indicative of the direct current bias level of the wafer in response to the alternating current signal; A first potential level coupled to the wafer bias sensor and providing a first potential level to the first portion of the electrostatic chuck, the first potential level being changed in response to the direct current voltage level so as to overlie the first portion and the first portion of the electrostatic chuck; An electrostatic chuck system having an electrostatic chuck holding the wafer on a surface of the electrostatic chuck comprising a power supply of a variable electrostatic chuck that maintains a first predefined potential difference between the first region of the wafer regardless of the magnitude of the direct current bias level of the wafer. . 2. The apparatus of claim 1, further comprising a second portion of the electrostatic chuck insulated from the first portion and coupled to the power of the variable electrostatic chuck to receive a second potential level that is different from the first potential level. The second potential level of the wafer on which the second portion of the electrostatic chuck rests on the second portion irrespective of the magnitude of the DC bias level of the wafer so that the second potential level is adjusted in response to the DC voltage level coming from the wafer bias sensor. And maintain a second predefined potential difference between the regions. The power supply of the variable electrostatic chuck comprises a bridge for receiving the DC voltage level, the bridge comprising a first resistor connected in parallel with the DC power supply and in series with a second resistor. System. 4. The system of claim 3, wherein the first and second resistors of the bridge are selected differently in value. 2. The system of claim 1, wherein the direct current voltage level is a dynamic approximation of the direct current bias level of the wafer. 6. The method of claim 5, wherein the power supply of the variable electrostatic chuck is a direct current voltage source having a first supply node and a second supply node and the first supply node is connected to the wafer bias sensor to receive a direct current voltage level and the second supply node. And a supply node is connected to the first portion of the electrostatic chuck. Sense a first alternating current signal at a first portion of the electrostatic chuck; Derive a DC voltage level representing a DC bias level of a wafer in response to the first AC signal; The first potential level supplied by the DC power supply to the first portion of the electrostatic chuck is dynamically changed in accordance with the DC voltage level so as to be placed on the first portion and the first portion of the electrostatic chuck irrespective of the magnitude of the DC bias level of the wafer. Maintaining a predetermined potential difference between the first region of the wafer to be placed. 8. The method of claim 7, wherein the second potential level supplied by the DC power supply to the second portion of the electrostatic chuck is changed in response to the DC voltage level, wherein the second portion is insulated from the first portion. Cause the second potential level to differ from the first potential level, and as the second potential level changes, between the second portion of the electrostatic chuck and the second region of the wafer, regardless of the magnitude of the direct current bias level of the wafer. Maintaining a predefined second potential difference. 8. The first resistor of claim 7, wherein the step of changing the first potential level comprises receiving a DC voltage level using a bridge, the bridge being connected in series with a DC power supply and in series with a second resistor. Method comprising a. 10. The method of claim 9, wherein the first and second resistors of the bridge are selected differently in value. 8. The method of claim 7, wherein the direct current voltage level is a dynamic approximation of the direct current bias level of the wafer. 12. The method of claim 11, wherein the changing step includes supplying a DC voltage level to the first supply node of the DC power supply source to change the first potential level at the second supply node of the DC power supply source. How to. Means for dynamically sensing a first alternating current signal at a first portion of the electrostatic chuck; Means for deriving a direct current voltage level indicative of a direct current bias level of a wafer in response to said first alternating signal; The first potential level supplied by the DC power supply to the first portion of the electrostatic chuck is dynamically changed in accordance with the DC voltage level so as to be placed on the first portion and the first portion of the electrostatic chuck regardless of the magnitude of the DC bias level of the wafer. An electrostatic chuck system having an electrostatic chuck to secure the wafer on the surface of the electrostatic chuck comprising means for maintaining a predetermined potential difference between the first region of the wafer to be placed. 14. The apparatus of claim 13, wherein the changing means changes a second potential level supplied to the second portion of the electrostatic chuck by the DC power supply in response to the DC voltage level, wherein the second portion is changed to the first portion. The second potential level is different from the first potential level, and according to the second potential level change, irrespective of the magnitude of the DC bias level of the wafer, And maintain a second predetermined potential difference between the second zones. 14. The apparatus of claim 13, wherein said changing means comprises a bridge connected to said derivation means for receiving said direct current voltage level and said bridge includes a first resistor connected in parallel with a direct current power supply and in series with a second resistor. System characterized in that. 16. The system of claim 15, wherein the first and second resistors of the bridge are selected differently in value. 14. The system of claim 13, wherein the direct current voltage level is a dynamic approximation of the direct current bias level of the wafer. 18. The system of claim 17, wherein said changing means comprises a direct connection between said derivation means and a first supply node of a direct current power source to change a first potential level at a second supply node of a direct current power source. The electrostatic chuck of claim 1, wherein the wafer bias sensor is positioned so as not to expose the wafer bias sensor to a plasma of a plasma processing chamber used in the electrostatic chuck system. 6. The electrostatic chuck of claim 5, wherein the wafer bias sensor is positioned so as not to expose the wafer bias sensor to the plasma of the plasma processing chamber used in the electrostatic chuck system. A method of tightening a substrate on the surface of an electrostatic chuck in a plasma processing chamber, the method comprising: -Dynamically detecting a first alternating current signal at a first position on said electrostatic chuck, wherein said first position is determined so that a sensor used for said dynamic sensing is not exposed to plasma of said plasma processing chamber during substrate processing, Derive a DC voltage level approximating a DC bias level of the substrate during the substrate processing in accordance with the first AC signal, In order to obtain a desired potential difference between the first portion of the electrostatic chuck and the first region of the substrate overlying the first portion regardless of the magnitude of the DC bias level of the substrate during the substrate processing. Modifying the first potential level supplied to the electrostatic chuck in a dynamic manner according to the direct current voltage level, Method comprising the above steps 22. The method of claim 21, wherein said electrostatic chuck represents a bipolar electrostatic chuck. 22. The method of claim 21, wherein the plasma processing chamber is configured for plasma etching.