KR100465838B1 - High dielectric capacitor having double dielectric layer in semiconductor device and method for forming the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a capacitor forming process in a semiconductor device manufacturing process, and more particularly, to a high dielectric capacitor of a semiconductor device having a double dielectric thin film and a method of forming the same. SUMMARY OF THE INVENTION An object of the present invention is to provide a high-k dielectric capacitor of a semiconductor device and a method of forming the same, which can simultaneously ensure capacitance and leakage current characteristics. In order to secure the capacitance of the high dielectric capacitor, crystallization of the high dielectric thin film is inevitable. Accordingly, in the present invention, a high-k dielectric thin film is doubled to arrange a crystalline high-k dielectric thin film, which is advantageous for securing capacitance, and an amorphous high-k dielectric thin film is disposed on the upper portion to compensate for the leakage current characteristics.

Description

High dielectric capacitor having double dielectric layer in semiconductor device and method for forming the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a capacitor forming process in a semiconductor device manufacturing process, and more particularly, to a high dielectric capacitor of a semiconductor device having a double dielectric thin film and a method of forming the same.

As semiconductor memory devices become more integrated, efforts have been made to secure larger capacitances in the same layout area.

Since the capacitance of the capacitor is proportional to the dielectric constant (ε) and the effective surface area of the electrode, and is inversely proportional to the distance between electrodes, conventionally, many studies have been conducted mainly to secure the surface area of the capacitor lower electrode or to minimize the distance between electrodes by thinning the dielectric. Has been going on. However, thinning of the dielectric has a problem of increasing leakage current. Accordingly, the capacitor structure is formed into a three-dimensional structure such as a planar stack, a concave, and a cylinder to form a capacitor. The method of increasing the effective surface area has been mainly used.

However, with the reduction of design rules associated with high integration of semiconductor devices, the method of securing capacitance through such structural improvements has faced limitations in the process.

Accordingly, studies are being actively conducted to replace NO (nitride / oxide) thin films, which are conventional dielectric materials, with high dielectric thin films such as Ta ₂ 0 ₅ and HfO _{2 in} DRAMs of 1 gigabit or more.

By the way, in the case of using a high-k dielectric thin film, such as Ta ₂ O ₅ , HfO ₂ is usually crystallized in order to increase the capacitance, there was a problem that accompanied by degradation of the leakage current characteristics in this process. This is due to the increase in grain density as the high dielectric film is crystallized.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a high-k dielectric capacitor and a method for forming the semiconductor device capable of simultaneously securing capacitance and leakage current characteristics.

1 is a cross-sectional view of a high dielectric capacitor according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

1: substrate

2: lower electrode (conductive film)

3: crystalline high dielectric thin film

4: amorphous high dielectric thin film

5: upper electrode (conductive film)

According to an aspect of the present invention for achieving the above technical problem, a lower electrode provided on the substrate; A crystalline high dielectric thin film provided on the lower electrode; An amorphous high dielectric thin film provided on the crystalline high dielectric thin film; And an upper electrode provided on the amorphous high dielectric thin film, and wherein the lower electrode, the crystalline high dielectric thin film, the amorphous high dielectric thin film, and the upper electrode all include elements of the same group. A high dielectric capacitor of is provided.

Further, according to another aspect of the invention, forming a conductive film for the lower electrode on the substrate; Forming a crystalline high dielectric thin film on the conductive film for the lower electrode; Forming an amorphous high dielectric thin film on the crystalline high dielectric thin film; And forming an upper electrode conductive film on the amorphous high dielectric thin film, wherein the lower electrode, the crystalline high dielectric thin film, the amorphous high dielectric thin film, and the upper electrode all contain elements of the same group. A high dielectric capacitor forming method of a semiconductor device is provided.

In order to secure the capacitance of the high dielectric capacitor, crystallization of the high dielectric thin film is inevitable. Accordingly, in the present invention, a high-k dielectric thin film is doubled to arrange a crystalline high-k dielectric thin film, which is advantageous for securing capacitance, and an amorphous high-k dielectric thin film is disposed on the upper portion to compensate for the leakage current characteristics.

Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.

1 is a view showing a cross-sectional configuration of a high dielectric capacitor according to an embodiment of the present invention.

Referring to FIG. 1, the high-k dielectric capacitor according to the present embodiment includes a lower electrode (eg, an HfN film) 2 provided on the substrate 1, and a crystalline high-k dielectric thin film provided on the lower electrode 2. (E.g., a c-HfO ₂ film) 3, an amorphous high dielectric film (e.g., a-HfO ₂ film) 4 provided on the crystalline high dielectric film 3, and an amorphous high dielectric film 4 An upper electrode (eg, an HfN film) 5 provided on the substrate.

That is, in the present invention, the high dielectric thin film is implemented as a laminated structure of the crystalline high dielectric thin film 3 and the amorphous high dielectric thin film 4.

Hereinafter, a high dielectric capacitor forming process according to an embodiment of the present invention will be described with reference to FIG. 1.

First, the conductive film 2 for lower electrodes is deposited on the board | substrate 1 which completed the predetermined lower process. At this time, as the lower electrode conductive film 2, the doped polysilicon film, ScN film, YN film, LaN film, TiN film, ZrN film, HfN film, VN film, NbN film, TaN film, CrN film, MoN film Any one or two or more laminated structures of WN film, Mo film, W film, Tc film, Re film, Ru film, Os film, Rh film, Ir film, Pd film, and Pt film can be used. It is preferable to deposit using atomic layer deposition using a gas or chemical vapor deposition. At this time, the precursor material is MR _X (where M is Si, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Tc, Re, Ru, Os, Rh, Ir , Pd, Pt, etc., and R is a ligand such as an H group, an alkyl group, an alkenyl group, an alkoxy group, an aryl group, an amide group, a halide group), and the reaction gas is H ₂ , O ₂ , Any one or two or more of H ₂ O, NH ₃ , amine, hydrazine and derivatives thereof can be used in combination.

Subsequently, the crystalline high dielectric thin film 3 is formed on the conductive film 2 for the lower electrode. At this time, the crystalline high-k dielectric thin film 3 is deposited an oxide film represented by MO _X (wherein M is a center element such as Ti, Zr, Hf, V, Nb, Ta, Al, etc.), and the rapid thermal treatment or furnace heat treatment It is formed by heat treatment in a manner. On the other hand, the thin film (MO _X ) is preferably deposited using atomic layer deposition method or chemical vapor deposition method using a precursor material and a reaction gas, wherein the precursor material is MR _X (where M is Si, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Tc, Re, Ru, Os, Rh, Ir, Pd, Pt, etc. are the central elements, and R is H group, alkyl group, alkenyl group , And a ligand such as an alkoxy group, an aryl group, an amide group, and a halide group), and as the reaction gas, any one or two of H ₂ , O ₂ , H ₂ O, NH ₃ , amine, hydrazine and derivatives thereof The above can be mixed and used. Meanwhile, the thin film MO _X may be formed by oxidizing the surface of the lower electrode conductive film 2 by performing a heat treatment in an oxidizing gas atmosphere by a rapid heat treatment method or a furnace heat treatment method. Can be omitted.

Next, an amorphous high dielectric thin film 4 is deposited on the crystalline high dielectric thin film 3. At this time, the amorphous high-k dielectric thin film 4 is an oxide film expressed by MO _X (wherein M is a central element such as Ti, Zr, Hf, V, Nb, Ta, Al, etc.), and an atomic layer using a precursor and a reaction gas. It is preferable to deposit using the vapor deposition method or the chemical vapor deposition method. At this time, the precursor material is MR _X (where M is Si, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Tc, Re, Ru, Os, Rh, Ir , Pd, Pt, etc., and R is a ligand such as an H group, an alkyl group, an alkenyl group, an alkoxy group, an aryl group, an amide group, a halide group), and the reaction gas is H ₂ , O ₂ , Any one or two or more of H ₂ O, NH ₃ , amine, hydrazine and derivatives thereof can be used in combination.

Subsequently, an upper electrode conductive film 5 is deposited on the amorphous high dielectric thin film 4. At this time, the upper electrode conductive film 5 is a doped polysilicon film, ScN film, YN film, LaN film, TiN film, ZrN film, HfN film, VN film, NbN film, TaN film, CrN film, MoN film Any one or two or more laminated structures of WN film, Mo film, W film, Tc film, Re film, Ru film, Os film, Rh film, Ir film, Pd film, and Pt film can be used, and react with precursors. It is preferable to deposit using atomic layer deposition using a gas or chemical vapor deposition. At this time, the precursor material is MR _X (where M is Si, Sc, Y, La, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Tc, Re, Ru, Os, Rh, Ir , Pd, Pt, etc., and R is a ligand such as an H group, an alkyl group, an alkenyl group, an alkoxy group, an aryl group, an amide group, a halide group), and the reaction gas is H ₂ , O ₂ , Any one or two or more of H ₂ O, NH ₃ , amine, hydrazine and derivatives thereof can be used in combination.

Subsequently, a unit capacitor structure is formed by performing photographic and etching processes on the upper electrode conductive film 5, the amorphous high dielectric film 4, the crystalline high dielectric film 3, and the lower electrode required conductive film 2. .

In the above-described high-k dielectric capacitor of the present invention, the lower crystalline high-k dielectric thin film 3 performs a function of securing capacitance, and the amorphous high-k dielectric thin film of the upper part performs a function of reducing leakage current and thus can be expected to complement each other. Will be. For reference, the amorphous thin film has excellent leakage current characteristics because the density of crystal grains is very small.

On the other hand, when the lower electrode, the dielectric thin film, and the upper electrode are all formed using the same group element having similar physical and chemical properties, there is an advantage that the interface property is improved to ensure structural stability.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

For example, in the above-described embodiment, the case in which the patterning process is performed after the lamination is completed up to the conductive film for the upper electrode has been described as an example. However, the present invention is applied to the case where the patterning is performed in the intermediate process.

The present invention described above can secure high capacitance and excellent leakage current characteristics of the high-k dielectric capacitor at the same time, thereby improving the reliability of the semiconductor device.

Claims (6)

delete A lower electrode provided on the substrate; A crystalline high dielectric thin film provided on the lower electrode; An amorphous high dielectric thin film provided on the crystalline high dielectric thin film; And An upper electrode provided on the amorphous high dielectric film; And the lower electrode, the crystalline high dielectric film, the amorphous high dielectric film, and the upper electrode all contain elements of the same group. delete delete delete Forming a conductive film for the lower electrode on the substrate; Forming a crystalline high dielectric thin film on the conductive film for the lower electrode; Forming an amorphous high dielectric thin film on the crystalline high dielectric thin film; And Forming a conductive film for an upper electrode on the amorphous high dielectric film; And the lower electrode, the crystalline high dielectric thin film, the amorphous high dielectric thin film, and the upper electrode all contain elements of the same group.