KR100459112B1 - Symbol Timing Recovery Device and Method - Google Patents

Abstract

The symbol timing recovery apparatus and method may include preprocessing and filtering a digitally converted signal when an initialization signal is input from an external source, and receiving a filtered signal and outputting a timing error to generate a reliable segment synchronization signal from the digitally converted signal. And detecting the timing error of the digitally converted signal when the segment synchronizing signal is detected, and restoring the timing. The use of the group as a prefilter has the effect of generating a timing error signal without hardware complexity.

Description

Symbol Timing Recovery Device and Method

The present invention relates to digital communication systems, and more particularly, to an apparatus and method for recovering symbol timing.

In general, the U.S. Grand Alliance (GA) HDTV broadcasting standard uses a ground VSB (Vestigial SideBand) transmission method.

In this case, the general VSB transmission method uses a data stream in which a specific synchronization signal pattern is periodically inserted in the VSB transmission data so that the synchronization signal can be easily detected by the HDTV receiver.

The data stream is composed of consecutive data segments of 832 symbols, and the data segment is composed of four symbols such as +1, 0, 0, +1, and the like. It is divided into a data section consisting of two symbols.

Horizontal sync is recovered by finding a sync signal section consisting of the four symbols.

That is, when timing recovery is not started at the beginning of timing recovery when the segment synchronization signal is found, it is difficult to detect the segment synchronization signal due to the clock slip phenomenon, which causes a phenomenon that the system is not locked because it is bitten. This probability is proportional to the difference between the frequencies of the transmitter and the receiver.

FIG. 1 is a view illustrating a pattern of a general segment synchronization signal, and FIG. 2 is a block diagram illustrating a configuration of a timing recovery apparatus according to the prior art. The conventional timing recovery apparatus includes an ADC 21 and a segment synchronization recovery unit. (22), quadrature filter (23), PWM (24), charge pump (25), loop filter (26), and VCXO (27).

First, the received signal converted from the ADC 21 into a digital signal is output to the segment sync recovery unit 22 to find a segment sync signal as shown in FIG.

The quadrature filter 23 detects a timing error of the signal output from the ADC 21 according to the time enable signal timen output from the segment synchronization recovery unit 22 and outputs timing information to the PWM 24. do.

The quadrature filter 23 is composed of three delayers and three adders as shown in FIG.

The PWM 24 performs phase width modulation on the timing information output from the quadrature filter 23 according to the modulation enable signal pwmen output from the segment sync recovery unit 22 to occupy the up signal and the down signal. Output to the pump 25.

The charge pump 25 pumps and outputs to the loop filter 26 according to the input up and down signals, and the loop filter 26 performs low pass filtering to output to the VCXO 27 and the VCXO 27. Outputs the recovered clock to the ADC 21.

That is, the segment sync recovery section 22 finds the segment sync signal and then filters the segment signal through the quadrature filter 23. The output of the quadrature filter 23 is sampled at each segment period, and the signal is fed back as a timing error signal.

Such a timing recovery apparatus of the prior art judges a segment signal in order to recover timing error information, and then feeds back the output thereof. Therefore, when the waveform of the signal is clean, the segment signal can be determined relatively easily, but the waveform of the signal is not clean. In this case, a problem arises in that segment signal determination is made wrong or impossible and timing error cannot be extracted.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and an object of the present invention is to provide an apparatus and method for recovering symbol timing that can extract an accurate timing error even when a waveform of a signal is not clean without increasing hardware complexity.

A feature of the apparatus and method for recovering symbol timing according to the present invention is to operate in a timing recovery method that does not use a decision feedback method at the beginning of system startup, and to operate in a timing recovery method that uses a decision feedback method when segment and frame synchronization signals are detected. It is in Sikkim.

In addition, another feature of the apparatus and method for recovering symbol timing according to the present invention is to extract a timing error using a feed forward filter of the equalizer while the segment synchronization signal is not detected.

Hereinafter, a symbol timing recovery apparatus according to the present invention will be described with reference to the accompanying drawings.

4 is a block diagram illustrating the configuration of a symbol timing recovery apparatus according to the present invention. The ADC 41 converts a received signal into a digital signal and outputs the received signal, and receives a reset signal due to channel conversion or serious error. A control unit 51 for outputting a control signal and a selection signal, a forward filter 47 for forward filtering the signal output from the ADC 41 under the control of the control unit 51, and a signal output from the ADC 41; A first timing error detector 49 that detects a timing error and outputs a detection signal to the controller 51, and a second timing error detector that detects a timing error by receiving a signal output from the forward filter 47 ( 50, a selection unit 45 for selectively outputting one of the signals output from the first timing error detection unit 49 and the second timing error detection unit 50 according to the selection signal of the control unit 51, and the selection unit 45. Signal output from the analog signal DAC or PWM (44) for converting to or performing phase width modulation, LPF (43) for low pass filtering the signal output from the DAC or PWM (44), and according to the signal output from the LPF (43) It is composed of a VXCO 42 that oscillates and outputs a corresponding clock.

Looking at the operation of the symbol timing recovery apparatus according to the present invention configured as described above, first, the present invention is a Gardner method using a general pre-filter that does not determine because the waveform of the signal is not clean when the timing signal is not restored The timing error extraction method is used.

On the other hand, the equalizer 46 for compensating for linear channel distortion on the channel does not operate when a segment sync signal is not detected, so the equalizer does not perform any operation. (46) is used as the Gardner type prefilter.

That is, the feed forward filters 47 and 48 which are resting at the beginning of the operation of the system in which no segment synchronization signal is detected are used as the prefilters.

If the system initialization signal is input to the controller 51 due to channel conversion or serious error, the feed forward filters 47 and 48 are initialized to the coefficients of the prefilter.

The signal output from the ADC 41 is filtered through the forward filter 47 of the equalizer 46 and then input to the second timing error detector 50 to detect a timing error.

The selector 45 selectively outputs the signal output from the second timing error detector 50 to the DAC or PWM 44 according to the control signal of the controller 51.

The signal converted in the DAC or PWM 44 is input to the ADC 41 again through the LPF 43 and the VCXO 42.

During this period, the first timing error detection unit 49 receives the signal output from the ADC 41 and starts detecting the segment synchronization signal. When it is determined that the detected segment synchronization signal has some reliability, the segment synchronization signal detection is performed. The signal is output to the controller 51.

When this synchronization signal detection signal is input, the control unit 51 selects and outputs the output of the first timing error detection unit 49 to the DAC or PWM 44.

The detection signal of the first timing error detector 49 selected and output by the selector 45 is converted into an analog signal through the DAC or the PWM 44 or performs phase width modulation.

After that, the LPF 43 filters and outputs the VCXO 42 to output the recovered clock back to the ADC 41 and the equalizer 46 operates.

That is, a timing error signal that does not depend on the determination is generated when timing recovery is not performed, and after the segment synchronization signal is detected, a timing recovery operation that depends on the determination is performed.

The apparatus and method for recovering symbol timing according to the present invention has an effect of generating a timing error signal without any hardware complexity by using an existing equalizer as a prefilter when the waveform of the signal is not clean during the initial operation of the system.

1 is a diagram illustrating a pattern of a general segment synchronization signal.

2 is a block diagram illustrating a configuration of a timing recovery apparatus according to the prior art.

3 is a block diagram illustrating a detailed configuration of a quadrature filter of FIG. 2.

4 is a block diagram illustrating a configuration of a symbol timing recovery apparatus according to the present invention.

<Description of the symbols for the main parts of the drawings>

41: ADC 42: VCXO

43: LPF 44: DAC or PWM

45: selector 46: equalizer

47: forward filter 48: feedback filter

49,50: timing error detection unit 51: control unit

Claims (3)

A controller for receiving an initialization signal from an external device and outputting a control signal and a selection signal; A feed forward filter for preprocessing and filtering the received signal under control of the controller according to the initialization signal input; A first timing error detector which detects a timing error by receiving the received signal and outputs a detection signal to the controller; A second timing error detector configured to receive a signal output from the feed forward filter and detect a timing error; After selecting and outputting the signal output from the second timing error detector, when a detection signal is input from the first timing error detector, the timing of the received signal is restored by selectively outputting the output signal of the first timing error detector according to a selection signal of the controller. Symbol timing recovery apparatus characterized by consisting of a selection unit. The apparatus of claim 1, wherein the feed forward filter is a filter included in an equalizer. Pre-processing and filtering the digitally converted signal when an initialization signal is input from the outside; Determining whether a reliable segment synchronization signal is detected from the digitally converted signal while receiving the filtered signal and outputting a timing error; And recovering timing by detecting timing error of the digitally converted signal when the segment synchronization signal is detected.

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