KR100448194B1 - printed circuit board - Google Patents

printed circuit board Download PDF

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Publication number
KR100448194B1
KR100448194B1 KR10-2002-0068262A KR20020068262A KR100448194B1 KR 100448194 B1 KR100448194 B1 KR 100448194B1 KR 20020068262 A KR20020068262 A KR 20020068262A KR 100448194 B1 KR100448194 B1 KR 100448194B1
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KR
South Korea
Prior art keywords
layer
circuit board
printed circuit
ground
sectional area
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KR10-2002-0068262A
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Korean (ko)
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KR20040039999A (en
Inventor
황용원
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삼성전자주식회사
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Priority to KR10-2002-0068262A priority Critical patent/KR100448194B1/en
Publication of KR20040039999A publication Critical patent/KR20040039999A/en
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards

Abstract

본 발명은, 인쇄회로기판에 관한 것으로서, 그라운드를 형성하는 그라운드층과, 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 상부에 마련되는 전원층과, 상기 전원층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 전원층의 상부에 마련되는 제1신호층과, 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 하부에 마련되는 제2신호층을 포함하는 것을 특징으로 한다. 이에 의하여, PCB기판의 각 층에서의 전자기파 발생을 감소시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board, comprising: a ground layer forming a ground; A first signal layer having a small cross-sectional area and provided over the power supply layer with an insulator interposed therebetween, and a second signal layer having a small cross-sectional area with an insulator interposed therebetween with a small cross-sectional area provided below the ground layer It is characterized by including. As a result, the generation of electromagnetic waves in each layer of the PCB substrate can be reduced.

Description

인쇄회로기판{printed circuit board}Printed circuit board

본 발명은 인쇄회로기판에 관한 것으로서, 보다 상세하게는 인쇄회로기판을 형성하는 신호층, 그라운드층, 전원층의 단면적이 상이하게 설정된 인쇄회로기판에 관한 것이다.The present invention relates to a printed circuit board, and more particularly, to a printed circuit board having different cross-sectional areas of a signal layer, a ground layer, and a power supply layer forming a printed circuit board.

컴퓨터시스템의 제품의 성능이 향상됨에 따라 시스템의 내부클럭속도가 빨라지고 있다. 이에 따라, 시스템내부에서 고주파가 많이 발생하므로, 컴퓨터시스템내에 마련되는 인쇄회로기판상에는 다양한 칩과 회로가 구현되어 자기장펄스(EMI)가 발생한다. 시스템이 정상적으로 동작시키기 위해서는 전자기파(EMI)를 감소시켜야 한다.As the performance of computer system products is improved, the internal clock speed of the system is increasing. Accordingly, since a lot of high frequency is generated inside the system, various chips and circuits are implemented on the printed circuit board provided in the computer system to generate magnetic field pulses (EMI). The system must reduce electromagnetic waves (EMI) in order to operate normally.

인쇄회로기판(100)의 단면구조는 도 2에 도시된 바와 같이 제2신호층(109)과, 제2신호층(109)상에 안착되는 그라운드층(107)과, 그라운드층(107)상에 안착되는 전원층(105)과, 전원층(105)위에 안착되는 제1신호층(103)을 가지며, 각 층 사이에는 절연체(111)가 마련된다.As shown in FIG. 2, the cross-sectional structure of the printed circuit board 100 includes a second signal layer 109, a ground layer 107 seated on the second signal layer 109, and a ground layer 107. And a first signal layer 103 seated on the power supply layer 105, and an insulator 111 is provided between the layers.

그런데, 종래의 인쇄회로기판은 전원공급시 부품장착 및 회로구현이 이루어지는 제1신호층(103)과 제2신호층(109)에서 자기장 펄스가 발생하여 전원이 공급되는 전원층(105)과 그라운드층(107)에서 자기장 펄스가 발생한다. 각 층간에 층간의 단락방지와 자기장 펄스를 차단하기 위하여 절연체가 마련되나 인쇄회로기판(100)의 단부에서도 각 층간의 자기장펄스가 발생한다(도 4 참조). 더구나, 인쇄회로기판의 각 층간의 회로구현부위가 동일한 면적을 가지고 있어 더욱 많은 자기장 펄스가 발생하게 되는 문제점이 있다.However, in the conventional printed circuit board, magnetic field pulses are generated in the first signal layer 103 and the second signal layer 109 where components are mounted and circuits are implemented at the time of power supply. Magnetic field pulses occur in layer 107. Insulators are provided to prevent short circuits and magnetic field pulses between the layers, but magnetic field pulses between the layers also occur at the ends of the printed circuit board 100 (see FIG. 4). In addition, there is a problem that more magnetic field pulses are generated because the circuit implementation portions between the layers of the printed circuit board have the same area.

따라서, 본 발명의 목적은, PCB기판의 각 층에서의 전자기파 발생을 감소시킬 수 있는 인쇄회로기판을 제공하는 것이다.It is therefore an object of the present invention to provide a printed circuit board which can reduce the generation of electromagnetic waves in each layer of the PCB board.

도 1은 본 발명에 따른 인쇄회로기판의 단부면 구성도,1 is an end surface configuration of a printed circuit board according to the present invention;

도 2는 도 1의 인쇄회로기판의 단면에서 본 층간의 자기장 표시도,FIG. 2 is a magnetic field display diagram of layers seen from a cross section of the printed circuit board of FIG. 1;

도 3은 종래의 인쇄회로기판의 단부면 구성도,3 is an end surface configuration of a conventional printed circuit board,

도 4는 도 3의 인쇄회로기판의 단면에서 본 층간의 자기장 표시도이다.FIG. 4 is a magnetic field display diagram of layers seen from a cross section of the printed circuit board of FIG. 3.

* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

1 : 인쇄회로기판 3 : 제1신호층1: printed circuit board 3: first signal layer

5 : 전원층 7 : 그라운드층5: power layer 7: ground layer

9 : 제2신호층 11 : 절연층9: second signal layer 11: insulating layer

상기 목적은, 본 발명에 따라, 인쇄회로기판에 있어서, 그라운드를 형성하는 그라운드층과, 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 상부에 마련되는 전원층과, 상기 전원층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 전원층의 상부에 마련되는 제1신호층과, 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 하부에 마련되는 제2신호층을 포함하는 것에 의해 달성된다.According to the present invention, in the printed circuit board, a ground layer for forming a ground, a power layer having a smaller cross-sectional area than the ground layer and provided on top of the ground layer with an insulator interposed therebetween, A first signal layer having a smaller cross-sectional area than the power supply layer and having an insulator interposed therebetween; a first signal layer having a smaller cross-sectional area compared to the ground layer and having an insulator interposed therebetween Is achieved by including two signal layers.

이하에서는 첨부도면을 참조하여 본 발명에 대해 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 1은 본 발명에 따른 인쇄회로기판의 단부면도이다. 도면에 도시된 바와 같이, 인쇄회로기판(1)은 그라운드를 형성하는 그라운드층(7)과, 그라운층(7)을 기준으로 동작하며 그라운드층(7)에 비해 작은 단면적을 갖는 제1신호층(3)과, 그라운드층(7)에 비해 작은 단면적을 갖는 전원층(5)과, 전원층(5)을 기준으로 동작하며 전원층(5)에 비해 작은 단면적을 갖는 제2신호층(9)을 갖는다. 각 층사이에는 층간의 단락을 방지하기 위한 절연층(11)이 마련되어 있다.1 is an end view of a printed circuit board according to the present invention. As shown in the figure, the printed circuit board 1 operates on the ground layer 7 forming the ground and the ground layer 7 and has a first signal layer having a smaller cross-sectional area than the ground layer 7. (3) and a power supply layer 5 having a smaller cross-sectional area than the ground layer 7 and a second signal layer 9 operating on the power supply layer 5 and having a smaller cross-sectional area compared to the power supply layer 5. Has The insulating layer 11 is provided between each layer in order to prevent the short circuit between layers.

여기서, 제1신호층(3)이 최상층이며, 제1신호층(3)의 하부에 전원층(5)이 마련되고, 전원층(5)의 하부에 그라운드층(7)이 마련되고, 그라운드층(7)의 하부에 제2신호층(9)이 마련된다.Here, the first signal layer 3 is the uppermost layer, the power supply layer 5 is provided below the first signal layer 3, the ground layer 7 is provided below the power supply layer 5, and the ground is provided. The second signal layer 9 is provided below the layer 7.

인쇄회로기판의 각 층을 배치했을 때 제1신호층(3)의 양단부는 절연층(11)을 기준으로 외곽으로부터 0.035인치 내입되고, 전원층(5)은 외곽으로부터 0.03인치, 그라운드층(7)은 외곽으로부터 0.02인치 내입되며, 바닥면을 이루는 제2신호층(9)은 외곽으로부터 0.025인치 내입되도록 각 층의 단면적을 책정하는 것이 바람직하다.When each layer of the printed circuit board is disposed, both ends of the first signal layer 3 are embedded 0.035 inches from the outside based on the insulating layer 11, and the power supply layer 5 is 0.03 inches from the outside and the ground layer 7 ) Is embedded 0.02 inches from the outside, and the second signal layer 9 forming the bottom surface is preferably set to the cross-sectional area of each layer to be embedded 0.025 inches from the outside.

도 2는 도 1의 인쇄회로기판의 단면에서 본 층간의 자기장펄스 표시도이다.전원층(5)을 기준으로 동작하는 제1신호층(3)에서 발생하는 자기장은 제1신호층(3)에 비해 큰 단면적을 가지는 전원층(5)으로 유기될 때 그 전자기파의 파장반경이 좁아지며 주위에 미치는 영향이 감소한다. 그리고, 그라운드층(7)을 기준으로 동작하는 제2신호층(9)에서 발생하는 자기장은 제2신호층(9)에 비해 큰 단면적을 가지는 그라운드층(7)으로 유기될 때 전자기파의 파장반경이 좁아진다. 또한, 전원층(5)에서 발생하는 자기장은 그라운드층(7)으로 유기될 때 그 반경이 좁아진다. 따라서, 전체적으로 인쇄회로기판의 각 층간에서 발생하는 자기장의 영향이 적어진다.FIG. 2 is a diagram showing magnetic field pulses between layers viewed from the cross section of the printed circuit board of FIG. 1. The magnetic field generated in the first signal layer 3 operating on the power source layer 5 is the first signal layer 3. When it is induced to the power supply layer 5 having a large cross-sectional area, the wavelength radius of the electromagnetic wave is narrowed and the influence on the surroundings is reduced. When the magnetic field generated in the second signal layer 9 operating on the ground layer 7 is induced into the ground layer 7 having a larger cross-sectional area than the second signal layer 9, the wavelength of the electromagnetic wave This narrows. In addition, the magnetic field generated in the power supply layer 5 becomes narrow when it is induced into the ground layer 7. Therefore, the influence of the magnetic field generated between the layers of the printed circuit board as a whole becomes less.

본 발명의 인쇄회로기판은 전술한 실시 예의 단면적 크기에 한정되지 않으며, 각 층의 단면적차이가 유지되는 범위내에서 각 층의 단면적크기를 변경할 수 있음은 물론이다.The printed circuit board of the present invention is not limited to the size of the cross-sectional area of the above-described embodiment, and of course, the cross-sectional area size of each layer may be changed within a range in which the cross-sectional area difference of each layer is maintained.

이러한 구성에 의하여, 인쇄회로기판에서 각 층간에서 발생하는 자기장의 영향이 적어져 EMI감소효과를 제공한다.By such a configuration, the influence of the magnetic field generated between each layer in the printed circuit board is reduced to provide an EMI reduction effect.

이상 설명한 바와 같이, 본 발명에 따르면, PCB기판 각 층에서의 전자기파 발생을 감소시킬 수 있는 인쇄회로기판이 제공된다.As described above, according to the present invention, a printed circuit board capable of reducing the generation of electromagnetic waves in each layer of the PCB substrate is provided.

Claims (1)

인쇄회로기판에 있어서,In a printed circuit board, 그라운드를 형성하는 그라운드층과,A ground layer forming a ground, 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 상부에 마련되는 전원층과,A power supply layer having a smaller cross-sectional area than the ground layer and provided above the ground layer with an insulator therebetween; 상기 전원층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 전원층의 상부에 마련되는 제1신호층과,A first signal layer having a smaller cross-sectional area than the power supply layer and provided on the power supply layer with an insulator therebetween; 상기 그라운드층에 비해 작은 단면적을 가지며 절연체를 사이에 두고 상기 그라운드층의 하부에 마련되는 제2신호층을 포함하는 것을 특징으로 하는 인쇄회로기판.And a second signal layer having a smaller cross-sectional area than the ground layer and provided under the ground layer with an insulator therebetween.
KR10-2002-0068262A 2002-11-05 2002-11-05 printed circuit board KR100448194B1 (en)

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CN113056090A (en) * 2021-03-18 2021-06-29 山东英信计算机技术有限公司 Multiplexing PCB lamination and server

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08274427A (en) * 1995-03-29 1996-10-18 Canon Inc Pattern wiring method of printed board and printed board by the method
JP2000183533A (en) * 1998-12-17 2000-06-30 Mitsubishi Electric Corp Low-emi multilayer circuit board and electric and electronic device
JP2001068801A (en) * 1999-08-27 2001-03-16 Sony Corp Printed wiring board
JP2002185091A (en) * 2000-12-14 2002-06-28 Nec Corp Circuit board, method for reducing emi of circuit board and method for reducing emi of electronic apparatus using that circuit board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08274427A (en) * 1995-03-29 1996-10-18 Canon Inc Pattern wiring method of printed board and printed board by the method
JP2000183533A (en) * 1998-12-17 2000-06-30 Mitsubishi Electric Corp Low-emi multilayer circuit board and electric and electronic device
JP2001068801A (en) * 1999-08-27 2001-03-16 Sony Corp Printed wiring board
JP2002185091A (en) * 2000-12-14 2002-06-28 Nec Corp Circuit board, method for reducing emi of circuit board and method for reducing emi of electronic apparatus using that circuit board

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