KR100436098B1 - 데이터프로세서,데이터처리시스템,및데이터프로세서를이용한외부장치로의액세스방법 - Google Patents
데이터프로세서,데이터처리시스템,및데이터프로세서를이용한외부장치로의액세스방법 Download PDFInfo
- Publication number
- KR100436098B1 KR100436098B1 KR1019970008475A KR19970008475A KR100436098B1 KR 100436098 B1 KR100436098 B1 KR 100436098B1 KR 1019970008475 A KR1019970008475 A KR 1019970008475A KR 19970008475 A KR19970008475 A KR 19970008475A KR 100436098 B1 KR100436098 B1 KR 100436098B1
- Authority
- KR
- South Korea
- Prior art keywords
- external
- signal
- bus
- address
- master
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
- Dram (AREA)
- Memory System (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/623,482 US5740382A (en) | 1996-03-28 | 1996-03-28 | Method and apparatus for accessing a chip-selectable device in a data processing system |
| US623,482 | 1996-03-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR970066899A KR970066899A (ko) | 1997-10-13 |
| KR100436098B1 true KR100436098B1 (ko) | 2004-08-16 |
Family
ID=24498247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019970008475A Expired - Fee Related KR100436098B1 (ko) | 1996-03-28 | 1997-03-13 | 데이터프로세서,데이터처리시스템,및데이터프로세서를이용한외부장치로의액세스방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5740382A (enExample) |
| EP (1) | EP0798644A3 (enExample) |
| JP (1) | JP3817327B2 (enExample) |
| KR (1) | KR100436098B1 (enExample) |
| CN (1) | CN1118028C (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5854944A (en) * | 1996-05-09 | 1998-12-29 | Motorola, Inc. | Method and apparatus for determining wait states on a per cycle basis in a data processing system |
| GB2362482A (en) * | 2000-05-15 | 2001-11-21 | Ridgeway Systems & Software Lt | Direct slave addressing to indirect slave addressing |
| US6798711B2 (en) * | 2002-03-19 | 2004-09-28 | Micron Technology, Inc. | Memory with address management |
| JP2005038230A (ja) * | 2003-07-16 | 2005-02-10 | Oki Electric Ind Co Ltd | システムlsi |
| KR100746646B1 (ko) * | 2006-07-11 | 2007-08-06 | 삼성전자주식회사 | 디스플레이 구동 회로 및 이를 갖는 액정 표시 장치 |
| CN115529275B (zh) * | 2022-11-28 | 2023-04-07 | 中国人民解放军国防科技大学 | 一种报文处理系统及方法 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4615017A (en) * | 1983-09-19 | 1986-09-30 | International Business Machines Corporation | Memory controller with synchronous or asynchronous interface |
| US4617624A (en) * | 1984-04-16 | 1986-10-14 | Goodman James B | Multiple configuration memory circuit |
| US4745407A (en) * | 1985-10-30 | 1988-05-17 | Sun Microsystems, Inc. | Memory organization apparatus and method |
| US5151986A (en) * | 1987-08-27 | 1992-09-29 | Motorola, Inc. | Microcomputer with on-board chip selects and programmable bus stretching |
| US5448744A (en) * | 1989-11-06 | 1995-09-05 | Motorola, Inc. | Integrated circuit microprocessor with programmable chip select logic |
| JP2762138B2 (ja) * | 1989-11-06 | 1998-06-04 | 三菱電機株式会社 | メモリコントロールユニット |
| US5522064A (en) * | 1990-10-01 | 1996-05-28 | International Business Machines Corporation | Data processing apparatus for dynamically setting timings in a dynamic memory system |
| US5418924A (en) * | 1992-08-31 | 1995-05-23 | Hewlett-Packard Company | Memory controller with programmable timing |
| US5511182A (en) * | 1994-08-31 | 1996-04-23 | Motorola, Inc. | Programmable pin configuration logic circuit for providing a chip select signal and related method |
-
1996
- 1996-03-28 US US08/623,482 patent/US5740382A/en not_active Expired - Lifetime
-
1997
- 1997-02-21 CN CN97102640A patent/CN1118028C/zh not_active Expired - Fee Related
- 1997-03-13 KR KR1019970008475A patent/KR100436098B1/ko not_active Expired - Fee Related
- 1997-03-20 EP EP97104768A patent/EP0798644A3/en not_active Withdrawn
- 1997-03-24 JP JP09012497A patent/JP3817327B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR970066899A (ko) | 1997-10-13 |
| JPH1091568A (ja) | 1998-04-10 |
| CN1165346A (zh) | 1997-11-19 |
| EP0798644A2 (en) | 1997-10-01 |
| EP0798644A3 (en) | 1999-05-06 |
| CN1118028C (zh) | 2003-08-13 |
| JP3817327B2 (ja) | 2006-09-06 |
| US5740382A (en) | 1998-04-14 |
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