KR100402951B1 - Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance - Google Patents
Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance Download PDFInfo
- Publication number
- KR100402951B1 KR100402951B1 KR10-2001-0000242A KR20010000242A KR100402951B1 KR 100402951 B1 KR100402951 B1 KR 100402951B1 KR 20010000242 A KR20010000242 A KR 20010000242A KR 100402951 B1 KR100402951 B1 KR 100402951B1
- Authority
- KR
- South Korea
- Prior art keywords
- receiving device
- light receiving
- substrate
- semiconductor light
- intermixing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 4
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims abstract description 4
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 claims abstract description 4
- 239000000758 substrate Substances 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 abstract description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 6
- 238000004891 communication Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 230000035945 sensitivity Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000001017 electron-beam sputter deposition Methods 0.000 description 2
- 238000000313 electron-beam-induced deposition Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/109—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN heterojunction type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L31/03046—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Light Receiving Elements (AREA)
Abstract
낮은 콘택 저항을 갖는 반도체 수광소자 제조 방법. 저저항성 반도체 수광소자는 이종접합층 상에 산화막을 형성한 후, 고온 열처리 공정을 실시하여 상호섞임 현상을 일으키므로써 제조할 수 있다. 일 실시예에 있어서, 이종접합층은 도핑되지 않은 인듐 인 웨이퍼 상에 상에 도핑되지 않은 인듐 갈륨 비소층을 형성한 구조이며, 상호 섞임 현상에 의해 이종접합 계면에서 에너지 장벽이 낮아져 반송자의 트랩 현상을 효과적으로 감소시킬 수 있게 된다.A method for manufacturing a semiconductor light receiving device having a low contact resistance. The low resistance semiconductor light receiving device can be manufactured by forming an oxide film on a heterojunction layer and then performing a high temperature heat treatment to cause intermixing. In one embodiment, the heterojunction layer is a structure in which an undoped indium gallium arsenide layer is formed on an undoped indium phosphorus wafer, and the energy barrier is lowered at the heterojunction interface due to intermixing, thereby trapping the carrier. Can be effectively reduced.
이에 따라 반도체 수광소자의 저항을 낮출 수 있어, 적은 비용과 간단한 방법으로 고속, 고성능의 수광소자를 제조할 수 있다.As a result, the resistance of the semiconductor light receiving device can be lowered, whereby a high speed and high performance light receiving device can be manufactured with a low cost and a simple method.
Description
본 발명은 광소자 제조 방법에 관한 것으로, 보다 상세하게는 수광소자의 재료로 사용되는 저저항성 반도체 이종접합 구조의 제조 방법에 관한 것이다.The present invention relates to a method for manufacturing an optical device, and more particularly, to a method for manufacturing a low resistance semiconductor heterojunction structure used as a material of a light receiving device.
현재 통신 산업은 우리 사회에서 중요한 위치를 차지하고 있으며, 이 통신산업의 일부로서 광통신이 차지하는 비중이 점점 커지고 있다.At present, the telecom industry occupies an important position in our society, and as a part of the telecom industry, optical communication is increasing.
종래에는 광통신에서 사용되는 수광소자의 재료로 실리콘(Si), 게르마늄(Ge) 등을 사용하였는데, 실리콘은 증배 특성은 우수한 반면 광파이버의 저손실 파장대를 유효하게 이용하는 데 충분하지 않고, 게르마늄은 광감도는 높은 반면 증배잡음이나 암전류가 큰 결점이 있다. 이에 따라 우수한 증배특성을 가지면서 광파이버의 저손실 파장대에서 높은 감도를 갖는 수광소자의 개발이 요구되게 되었다.Conventionally, silicon (Si), germanium (Ge), and the like are used as materials for light-receiving elements used in optical communication. Silicon has excellent multiplication characteristics, but is not sufficient to effectively use the low loss wavelength band of optical fibers, and germanium has high light sensitivity. On the other hand, there is a drawback of large multiplication noise or dark current. Accordingly, it is required to develop a light receiving device having excellent sensitivity and high sensitivity in a low loss wavelength band of an optical fiber.
이러한 요구에 따라 광의 파장에 상당하는 에너지 금지대폭을 갖는 Ⅲ-Ⅴ족 화합물 반도체를 이용한 수광소자의 개발이 진행되었으며, 그 결과로 이종접합(heterojunction) 구조를 수광소자의 재료로 사용하기에 이르렀다. 반도체 이종접합 구조는 우수한 감도를 가지며 암전류가 낮은 장점이 있다.According to this demand, the development of a light receiving device using a III-V compound semiconductor having an energy inhibiting bandwidth corresponding to the wavelength of light has progressed, and as a result, the heterojunction structure has been used as a material of the light receiving device. Semiconductor heterojunction structure has the advantage of excellent sensitivity and low dark current.
그러나 통신이 고속화됨에 따라 현재의 이종접합 구조는 소자의 접합계면에서 발생하는 반송자의 트랩(trap) 현상에 의해 높은 콘택(contact) 저항을 갖는 단점이 있으며, 이로 인해 수광소자의 수신 성능이 저하되는 문제점이 있다. 이에 따라 종래에는 이종접합 구조에 대하여 고농도의 불순물 도핑 방법, 에너지 장벽을 낮추기 위한 장벽층을 삽입하는 그래이디드 헤테로 장벽(graded heterobarrier) 형성 방법을 사용하여 에너지 장벽을 낮춤으로써 반송자의 트랩 현상을 억제하고자 하였으나, 제조 방법이 복잡하고 수반되는 비용이 증가하는 문제점이 있다.However, as the communication speed increases, the current heterojunction structure has a disadvantage of having a high contact resistance due to the trap phenomenon of the carrier occurring at the interface of the device, which causes the reception performance of the light receiving device to be degraded. There is a problem. Accordingly, in order to suppress trapping of carriers by lowering the energy barrier using a method of forming a heterogeneous impurity doping method and a graded heterobarrier inserting a barrier layer for lowering the energy barrier, the heterojunction structure is conventionally used. However, there is a problem that the manufacturing method is complicated and the accompanying costs increase.
본 발명은 상술한 문제점을 해결하기 위하여 안출된 것으로서, 원자간 상호섞임(intermixing) 현상에 의해 반송자의 트랩 현상을 감소시켜 저저항성 반도체 수광소자를 제조할 수 있도록 하는 데 그 기술적 과제가 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and there is a technical problem in that it is possible to manufacture a low-resistance semiconductor light-receiving device by reducing a trap phenomenon of a carrier by intermixing between atoms.
도 1a 및 1b는 본 발명에 따른 저저항성 반도체 수광소자의 제조 방법을 설명하기 위한 기판의 단면도이다.1A and 1B are cross-sectional views of a substrate for explaining a method of manufacturing a low resistance semiconductor light receiving device according to the present invention.
도 2a 및 도 2b는 본 발명에 따른 반도체 수광소자용 기판에서 전송 라인 모델이 형성된 상태를 보여주는 사시도이다.2A and 2B are perspective views illustrating a state in which a transmission line model is formed in a substrate for a semiconductor light receiving device according to the present invention.
도 3a 및 도 3b는 원자간 상호섞임 현상 유무 및 콘택간 거리에 따른 소자의 저항 정도를 설명하기 위해 도시한 그래프이다.3A and 3B are graphs illustrating the resistance of the device according to the presence or absence of intermixing between atoms and the distance between contacts.
<도면의 주요 부분에 대한 부호 설명><Description of the symbols for the main parts of the drawings>
12 : U-InP 기판 14 : U-InGaAs층12: U-InP substrate 14: U-InGaAs layer
14 : 산화막 16 : 금속층14 oxide film 16 metal layer
상술한 기술적 과제를 달성하기 위한 본 발명은 이종접합층 상에 산화막을 형성한 후 고온 열처리 공정을 실시하여 접합 계면에서 원자간 상호섞임 현상이 일어나도록 한다. 이와 같이 상호섞임 현상을 일으키게 되면 이종접합 계면에서 에너지 장벽이 낮아져 반송자 트랩 현상을 억제할 수 있으며, 이에 따라 반도체 수광소자의 콘택 저항을 낮출 수 있게 된다.The present invention for achieving the above-described technical problem is to form an oxide film on the heterojunction layer and then subjected to a high temperature heat treatment process to cause inter-atomic intermixing at the junction interface. When intermixing occurs as described above, the energy barrier at the heterojunction interface is lowered, thereby suppressing the carrier trap phenomenon, thereby lowering the contact resistance of the semiconductor light receiving device.
상기 이종접합 기판으로는 예컨대 도핑되지 않은 인듐 인 기판 상에 도핑되지 않은 인듐 갈륨 비소층이 형성한 구조를 사용할 수 있다.As the heterojunction substrate, for example, a structure in which an undoped indium gallium arsenide layer is formed on an undoped indium phosphorus substrate may be used.
이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 1a 및 1b는 본 발명에 따른 저저항성 반도체 수광소자의 제조 방법을 설명하기 위한 기판의 단면도이다.1A and 1B are cross-sectional views of a substrate for explaining a method of manufacturing a low resistance semiconductor light receiving device according to the present invention.
도 1a는 도핑되지 않은(Undoped) 인듐 인(U-InP) 기판(10) 상에 도핑되지 않은 인듐 갈륨 비소(U-InGaAs)층(12)을 형성한 이종접합 반도체 기판의 일 예를 보여준다.FIG. 1A illustrates an example of a heterojunction semiconductor substrate in which an undoped indium gallium arsenide (U-InGaAs) layer 12 is formed on an undoped indium phosphorus (U-InP) substrate 10.
이러한 이종접합 구조는 감도가 우수하고 암전류 및 증폭잡음이 낮기 때문에 현재 광통신의 수광소자를 제조하기 위한 소재로 널리 사용되고 있다.Since the heterojunction structure is excellent in sensitivity and low in dark current and amplification noise, it is widely used as a material for manufacturing a light receiving device of optical communication.
도 1b는 U-InGaAs층(12) 상에 산화막(14)을 성장시키고 고온 열처리 공정을실시한 상태의 반도체 수광소자를 나타낸다. 여기에서, 고온 열처리 공정은 650 내지 800℃에서 10초 내지 2분 동안 실시하는데, 보다 바람직하게는 750℃의 온도에서 45초간 실시한다.FIG. 1B illustrates a semiconductor light receiving device in which an oxide film 14 is grown on a U-InGaAs layer 12 and subjected to a high temperature heat treatment process. Here, the high temperature heat treatment process is carried out for 10 seconds to 2 minutes at 650 to 800 ℃, more preferably for 45 seconds at a temperature of 750 ℃.
이와 같이 U-InGaAs층(12) 상에 산화막을 형성하고 고온 열처리 공정을 실시하게 되면, 불순물 없는 빈공간 확산(Impurity Free Vacancy Diffusion)이 일어나 접합 계면에서 원자간 상호섞임(intermixing) 현상이 일어나게 된다. 이로 인해 접합 계면에서 밴드갭의 공간적 분포에 변화가 일어나게 되며, 이에 따라 상호섞임 현상이 일어나기 전보다 에너지 장벽이 낮아지게 된다.As such, when an oxide film is formed on the U-InGaAs layer 12 and subjected to a high temperature heat treatment process, impurity free vacancy diffusion occurs and intermixing between atoms occurs at the junction interface. . This results in a change in the spatial distribution of the bandgap at the junction interface, resulting in a lower energy barrier than before intermixing occurs.
접합 계면의 에너지 장벽이 낮아지게 되면 반송자의 트랩 현상이 감소하게 되어 이를 사용하여 반도체 수광소자를 제조하는 경우 접합계면에서의 저항이 감소되게 된다.When the energy barrier at the junction interface is lowered, the trapping phenomenon of the carrier is reduced, and when the semiconductor light-receiving device is manufactured using this, the resistance at the junction interface is reduced.
도 2a 및 도 2b는 본 발명에 따른 반도체 수광소자용 기판에서 콘택 저항을 측정하기 위한 전송 라인 모델이 형성된 상태를 보여주는 사시도이다.2A and 2B are perspective views illustrating a state in which a transmission line model for measuring contact resistance is formed on a substrate for a semiconductor light receiving device according to the present invention.
먼저, 도 1b와 같이 상호섞임 현상이 일어난 이종접합 반도체 기판에서 산화막을 제거하고, 산화막이 제거된 기판에 p-형 불순물 예컨대 아연(Zn)을 도핑한 후, 전체구조 상에 금속층(16)을 형성한다. 바람직한 실시예에서 금속층(16)은 Au/AuZn/Cr/Au 구조로 되어 있는데, 전자빔 증착이나 스퍼터링에 의해 형성할 수 있다.First, an oxide film is removed from a heterojunction semiconductor substrate in which intermixing occurs as shown in FIG. 1B, and a dopant-type impurity such as zinc (Zn) is doped into the substrate from which the oxide film is removed. Form. In a preferred embodiment, the metal layer 16 has an Au / AuZn / Cr / Au structure, which may be formed by electron beam deposition or sputtering.
도 2a는 금속층(16) 즉 전송 라인 모델(Transmission Line Model; 이하, 'TLM'이라 약칭함) 패턴을 형성하는 데 있어서 금속층(16)만 패터닝된 상태를 보여주고, 도 2b는 금속층(16)이 패터닝되고 난 후 노출된 U-InGaAs층(12)이 패터닝되어 TLM 패턴 형성이 완료된 상태를 보여준다.FIG. 2A shows a state in which only the metal layer 16 is patterned in forming the metal layer 16, that is, a transmission line model (hereinafter, abbreviated as 'TLM') pattern, and FIG. 2B shows the metal layer 16. After this patterning, the exposed U-InGaAs layer 12 is patterned to show a state in which TLM pattern formation is completed.
거리가 각각 다른 콘택 사이에서의 저항 정도를 도 3을 이용하여 설명한다.The resistance degree between contacts with different distances is demonstrated using FIG.
도 3a는 상호섞임 현상을 일으키지 않은 이종접합 구조에서 콘택간 거리에 따른 저항 정도를 나타내고, 도 3b는 상호섞임 현상을 일으킨 이종접합 구조에서 콘택간 거리에 따른 저항 정도를 나타낸다.FIG. 3A illustrates the degree of resistance according to the distance between contacts in the heterojunction structure that does not cause intermixing, and FIG. 3B illustrates the degree of resistance according to the distance between contacts in the heterojunction structure that causes the intermixing phenomenon.
먼저, TLM 패턴 형성 후 U-InP 기판(10)과 U-InGaAs층(12) 계면에서 콘택 저항은 상호섞임 현상을 일으키지 않은 소자의 경우 8.01×10-4Ω㎠(32)인 반면, 상호섞임 현상을 일으킨 소자의 경우 7.65×10-5Ω㎠(36)로 나타나 상호섞임 현상을 일으킨 경우의 콘택 저항이 1/10 정도 작은 것을 알 수 있다.First, the contact resistance at the interface of the U-InP substrate 10 and the U-InGaAs layer 12 after the formation of the TLM pattern is 8.01 × 10 −4 Ω㎠ (32) for the device that does not cause intermixing, while intermixing. In the case of the device that caused the phenomenon, the contact resistance of 7.65 × 10 −5 m 2 (36) was found to be about 1/10 smaller in the case of the intermixing phenomenon.
또한, 금속층(16)과 U-InGaAs층(12) 계면의 콘택 저항은 상호섞임 현상을 일으키지 않은 소자의 경우 3.14×10-7Ω㎠(34), 상호섞임 현상을 일으킨 소자의 경우 4.29×10-7Ω㎠(38)로 나타나, U-InP 기판(10)과 U-InGaAs층(12) 계면에서 상호섞임 현상이 일어나게 되면 이종접합 계면에서의 콘택 저항은 효과적으로 감소시키면서 이후에 형성되는 금속층(16)과 U-InGaAs층(12)의 콘택 저항에는 영향을 미치지 않는 것을 알 수 있다.한편, 이상에서는 기판에 대한 전처리 과정을 중심적으로 설명하고 그 효과를 테스트하기 위해 기판에 TLM 패턴을 형성하는 것에 대해 설명하였지만, 실제 수광소자 제조에 있어서는 TLM 패턴 대신에 전극을 형성하게 된다. 전극은 TLM 패턴과 마찬가지로 예컨대 전자빔 증착이나 스퍼터링에 의해 형성할 수 있는데, 구체적인 공정은 본 발명이 속하는 기술분야의 당업자에게 있어 자명한 것으로서 용이하게 실시할 수 있으므로 구체적인 설명은 생략한다.In addition, the contact resistance at the interface between the metal layer 16 and the U-InGaAs layer 12 is 3.14 × 10 −7 Ω㎠ (34) for the device that does not cause intermixing, and 4.29 × 10 for the device that causes intermixing. When the intermixing phenomenon occurs at the interface of the U-InP substrate 10 and the U-InGaAs layer 12, the contact resistance at the heterojunction interface is effectively reduced, and the metal layer is formed later ( 16) and the contact resistance of the U-InGaAs layer 12. However, the above description focuses on the pretreatment process for the substrate and forms a TLM pattern on the substrate to test the effect. Although the description has been made, in actual light-receiving device fabrication, an electrode is formed instead of the TLM pattern. Like the TLM pattern, the electrode can be formed by, for example, electron beam deposition or sputtering, and specific steps are obvious to those skilled in the art to which the present invention pertains.
이와 같이, 본 발명이 속하는 기술분야의 당업자는 본 발명이 그 기술적 사상이나 필수적 특징을 변경하지 않고서 다른 구체적인 형태로 실시될 수 있다는 것을 이해할 수 있을 것이다. 그러므로 이상에서 기술한 실시예들은 모든 면에서 예시적인 것이며 한정적인 것이 아닌 것으로서 이해해야만 한다. 본 발명의 범위는상기 상세한 설명보다는 후술하는 특허청구범위에 의하여 나타내어지며, 특허청구범위의 의미 및 범위 그리고 그 등가개념으로부터 도출되는 모든 변경 또는 변형된 형태가 본 발명의 범위에 포함되는 것으로 해석되어야 한다.As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.
상술한 바와 같이, 본 발명에 의하면 광통신에 적용되는 고속의 수광소자를 저저항화할 수 있어 소자의 수신성능 및 신뢰성을 향상시킬 수 있다. 또한, 제조 방법이 간단하며, 소자를 저저항화하는 데 소요되는 비용을 절감할 수 있어 동일 성능의 광소자에 대해서 경쟁력을 가질 수 있게 된다.As described above, according to the present invention, it is possible to reduce the resistance of a high-speed light receiving element applied to optical communication, thereby improving the reception performance and reliability of the element. In addition, the manufacturing method is simple, it is possible to reduce the cost required to reduce the resistance of the device can be competitive to the optical device of the same performance.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2001-0000242A KR100402951B1 (en) | 2001-01-03 | 2001-01-03 | Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2001-0000242A KR100402951B1 (en) | 2001-01-03 | 2001-01-03 | Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020059177A KR20020059177A (en) | 2002-07-12 |
| KR100402951B1 true KR100402951B1 (en) | 2003-10-22 |
Family
ID=27690659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2001-0000242A KR100402951B1 (en) | 2001-01-03 | 2001-01-03 | Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100402951B1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9515186B2 (en) | 2014-01-23 | 2016-12-06 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
-
2001
- 2001-01-03 KR KR10-2001-0000242A patent/KR100402951B1/en not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9515186B2 (en) | 2014-01-23 | 2016-12-06 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
| US10276694B2 (en) | 2014-01-23 | 2019-04-30 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020059177A (en) | 2002-07-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7180147B2 (en) | Microelectronic structure with a high germanium concentration silicon germanium alloy including a graded buffer layer | |
| EP0458688B1 (en) | Method of fabrication of an integrated semiconductor light guide-light detector structure | |
| US7723206B2 (en) | Photodiode | |
| CN107615495B (en) | Light receiving element and optical integrated circuit | |
| JP4894752B2 (en) | Semiconductor light receiving element and manufacturing method thereof | |
| US5132747A (en) | Avalanche photo diode | |
| KR100206079B1 (en) | Silicon photosensitive element | |
| Laih et al. | Characteristics of MSM photodetectors with trench electrodes on p-type Si wafer | |
| JP2005032843A (en) | Avalanche photodiode | |
| US6620732B1 (en) | Method for controlling critical dimension in a polycrystalline silicon emitter and related structure | |
| Pearsall et al. | Compound semiconductor photodiodes | |
| KR100402951B1 (en) | Fabrication Method of Semiconductor Photo Detector with Low Contact Resistance | |
| Ang et al. | Waveguide-integrated Ge/Si avalanche photodetector with 105GHz gain-bandwidth product | |
| US20070170476A1 (en) | Lateral photodetectors with transparent electrodes | |
| US11164987B2 (en) | Si—Ge—Si phototransistor | |
| CN111052405B (en) | Avalanche photodiode and method for manufacturing the same | |
| JP6086019B2 (en) | Optical semiconductor device and method for manufacturing optical semiconductor device | |
| EP0245169A1 (en) | HgCdTe avalanche photodiode | |
| KR100654014B1 (en) | Photo diode having electrode structure for large optical signal receiving area | |
| EP0160377A1 (en) | Heterojunction photo-FET and method of making the same | |
| KR970009732B1 (en) | Fabrication method of planar pin photodiode | |
| JPH0316275A (en) | Manufacture of semiconductor photodetector | |
| JP5061971B2 (en) | Method of manufacturing a semiconductor light receiving element | |
| JPS6180875A (en) | Semiconductor device | |
| KR100399050B1 (en) | Avalanche optical detecting device for high speed optical communications and methood for fabricating the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20121008 Year of fee payment: 10 |
|
| FPAY | Annual fee payment |
Payment date: 20130930 Year of fee payment: 11 |
|
| LAPS | Lapse due to unpaid annual fee |