KR100373298B1 - Device and resource reservation method for multiplexing / demultiplexing in digital communication system - Google Patents

Abstract

The present invention relates to an apparatus and a method for multiplexing / demultiplexing, respectively, in a digital communication system using a time division multiplex. The apparatus US includes a switching device having first switching means USC for switching data and second switching means TCU-1 and TCU-2 for multiplexing or demultiplexing data. The at least one second switching means is connected to the first switching means via a terminal connection link including a logical interface (USC-link) comprising a plurality of time slots arranged in a matrix. The apparatus further comprises means for providing resources on an interface of a first terminal access link (USC-link), wherein resources for two or more different functions are reserved in a resource reservation and interface based on a column of the interface And is reserved using a reservation based on a time slot.

Description

Device and resource reservation method for multiplexing / demultiplexing in digital communication system

A synchronous communication system using devices for multiplexing or demultiplexing, which concentrates information on multiple communication channels on one communication channel and distributes information on one communication channel over multiple communication channels, is well known.

US-A-4630261 shows a signal concentrator (multiplexer) that includes a buffer that stores message and signaling information based on priority. In this device, the signaling information is assigned the highest priority, while the generated voice packet is assigned a lower priority, which depends on whether a new voice packet has been created. In addition, low-rate voiceband data is given different priorities and digital data packets are given another priority. An entry in the buffer is included in a lock-up table indicating the priority level, identification and location, etc. in the buffer. Other tables include a time record for when a message from a particular sound source is released from the buffer. Through the controller executing the priority algorithm, the contents of the table and the sequence entries from the buffer are used to transfer to the communication channel based on the priority. An entry with the highest priority is transmitted according to a first-in-first-out principle and then an entry with a lesser priority is transmitted.

Therefore, the data is shifted out to the common communication channel through the priority algorithm.

WO 93/25031 relates to monitoring the fill rate of an elastic buffer memory in a synchronous digital communication system. It is an object of the present invention to monitor the charging rate of a channel using hardware that is smaller than known systems. This is accomplished by using a time division scheme that monitors the charge rate so that the charge rate of two or more channels on essentially the same hierarchical level is monitored on a time division basis in a monitoring unit common to the channels.

None of the cited documents, however, discloses an apparatus for multiplexing or demultiplexing in a digital communication system that uses resources on a channel in an efficient manner. In addition, it is difficult to connect the transmission system in such a way that resources can be used efficiently. Also, only devices designed for the transmission system can be connected.

The present invention relates to an apparatus and method for multiplexing or demultiplexing a panel, respectively, in a digital communication system using a time division multiplex, comprising a switching device for switching data and multiplexing / demultiplexing data, Data is transmitted on an access link that includes a logical interface requesting resources.

The invention also relates to a switching device comprising means for controlling multiplexing or demultiplexing of a channel. The present invention also relates to a communication system including such a switching device.

1 schematically illustrates a terminal connection link connecting a plurality of second switching means to a first switching means;

2 schematically illustrates a direct connection of any transmission system to a terminal access link;

3 illustrates a frame of a second interface;

4 is a view for explaining a frame of a first interface;

5 is a view showing positions of allocation storage and map storage in the first and second switching means;

6 is a diagram illustrating allocation of control time slots;

It is an object of the present invention to provide an apparatus and method for optimal multiplexing or demultiplexing of channels in a digital communication system, respectively. It is also an object of the present invention to provide an apparatus which includes multiplexing or demultiplexing in a digital switching apparatus in which resources, i.e. time slots, can be used as efficiently as possible.

It is a further object of the present invention to provide a frame-based transmission system, particularly a transmission system other than a 2 Mbit / s or 1.5 Mbit / s transmission system, Or demultiplexing the received signal.

It is a further object of the present invention to provide a switching device comprising means for controlling multiplexing or demultiplexing such that a channel or timeslot can be used in an efficient manner. It is a further object of the present invention to provide a system and method for multiplexing a plurality of frame-based transmission systems so that one or more transmission systems can be connected under optimal use of resources, especially for a limited number of given transmission systems, / Demultiplexing control means.

It is still another object of the present invention to provide a communication system including such a switching device.

These and other objects are achieved by a method and apparatus for causing a first switching means for switching data to be connected to a plurality of second switching means for multiplexing or demultiplexing data via a first terminal connection link .

The first terminal access link includes a first interface. The interface contains the time slots of the arrays arranged in a matrix. The connection for the second switching means is provided by a second terminal connection link which may comprise a first or a second interface. Means are provided for providing resources to a first interface on a first terminal access link. A resource for a first functionality is reserved using a reservation of a resource based on a column of an interface and a resource for a second functionality is reserved based on a time slot reservation.

The object of the present invention is achieved through a switching device comprising multiplexing or demultiplexing control means, which are based on their functionality, that is, their intended purpose. Wherein the reservation for the first functionality is based on a partitioned time slot of the interface connected to the first switching means and the reservation for the second functionality is based on a timeslot.

For a given number of bits per time slot in the interface, the interface includes a time slot of frame positive integer (and possibly all of the multiple bits). The interface is also divided into a number of time slots of a predetermined number of matrices plus a number of excess time slots.

In general, there are three different kinds of time slots: three different kinds of time slots: a so-called basic time slot (BTS), a control time soul (CTS) and a data time slot (DTS). The primary timeslots are mainly used for frame control and their position in the frame is fixed. The control time slot is used to control the data packet and the data time slot is used to switch the data. The concept of a logical interface is used to understand information and also to transmit information over a terminal access link. They are subject to mapping and allocation. Assignment means defining a timeslot on the interface as a timeslot of either a data timeslot or a control timeslot and the mapping can be done by connecting one data timeslot on one interface to a data timeslot on another inteface it means. Means for providing resources to the terminal access link, i. E. Means for controlling multiplexing or multiplexing, includes mapping and allocation functionality that defines first and second reservations according to the functionality of the required resources as described above.

The present invention will be described below with reference to the accompanying drawings, but the present invention is not limited thereto.

The present invention is described in the context of a specific embodiment in which the switching device comprises a switch US, which in principle comprises two switching means. In this embodiment, the first switching means USC serves to switch data. The second switching means includes a circuit having a plurality of terminal connection units (TCU) and is provided for multiplexing or demultiplexing of data. The switching device includes a switch control packet network (USC PN) used for control, arithmetic and maintenance functions, and a circuit serving to switch data. In Fig. 1, a method of cascading second switching means including two terminal connection units (TCU-1, TCU-2) is shown. The first terminal connection unit TCU-1 is connected to a first switching means USC called a so-called switching core through a first terminal connection link (USC-link). The terminal connection units TCU-1 and TCU-2 are interconnected by a second terminal connection link (TCU-link: TCL-2 in this case). As can be seen from the figure, a plurality of terminal units TU (n represents any associated number) are connected to the terminal connection units TCU-1 and TCU-2, respectively. A second terminal connection link (TCU-link) is used to connect the terminal unit (TU) to the terminal connection unit (TCU), which are referred to herein as TCL-1. The terminal connection units (TCU-1, TCU-2) communicate with the device processor (DP). For communication with the device processor (DP), an internal second terminal connection link (TCL-3) is used. They are dedicated for device processor connection in the illustrated embodiment. As shown schematically only in Fig. 1, a plurality of terminal connection units may be connected to the first switching means or the switch core according to this embodiment. Although not shown in the drawings, it is also possible in the present invention to directly connect the terminal unit TU to the switch core USC. A plurality of additional terminal connection units may be connected to the first terminal connection unit (TCU-1) connected to the switch core (USC), and the plurality of additional terminal connection units may be connected to the second terminal connection link (TCL-2). In addition, each terminal connection unit (TCU) (not shown in the figure) can be connected to a plurality of terminal units TU via (TCL-1) as described above. Each terminal connection unit (TCU) can communicate with one or more device processors (DP) via an internal TCU link (TCL-3). For example, if redundancy is applied, there is at least one device processor in the TCU. A transmission system can be connected to the terminal unit TU. As schematically shown in Fig. 2, in another embodiment the transmission system may be connected directly to the terminal connection unit. The connection of the transmission system will be described in more detail later.

The terminal unit TU may also include a device processor DP (not shown).

Each terminal access link (TCU -) (USC-link) includes an interface or a logical interface. Through these interfaces, information can be understood and transmitted through the terminal access link. The first terminal connection link (USC-link) is connected to the first switching means, in this case the switch core USC, and the second terminal connection link (TCU) And may or may not be different from the first interface in accordance with the terminal access unit link (TCU-link: TCL-I, TCL-2 or TCL-3) in the example.

Hereinafter, an embodiment including two specific interfaces will be described. However, these are provided for illustrative purposes only and may have a variety of other alternatives.

Fig. 2 shows an embodiment in which the transmission system is directly connected to a terminal connection unit (TCU). The TCU then has to find out how the transmission system allocates its time slot at the interface (e.g., via reading), where Z represents a switch or the like. In this particular embodiment, it may be a TCU that provides a direct connection.

The two interfaces to be described are hereinafter referred to as USI 2 and USI 4 (second and first interfaces), respectively. The USI 2 interface (second interface) is an 8. 192 Mb / s interface including 113 time slots (TS) per frame and the remaining 7 bits. USI 4 is an 184.32 Mb / s interface with 2560 time slots per frame. On both interfaces, there are 9 bits per time slot. The frames of both interfaces are also divided into matrices. The USI 2 interface has twelve columns and nine rows of time slots plus five extra timeslots, the USI 4 interface has 284 columns and nine rows of time slots plus four extra timeslots. The frames of the USI 2 interface and the USI 4 interface are shown in Figs. 3 and 4, respectively. A time slot (TS) is divided into three different types of time slots: a basic time slot (BTS), a control time slot (CTS) and a data time slot (DTS). These basic time slots (BTS) are mainly used for frame control purposes, and they are fixedly arranged in the frame, that is, they have fixed positions in the frame. A control time slot (CTS) is used to control the packet, and a data time slot is used to switch data. In the illustrated embodiment, the terminal connection unit (TCU) comprises one or more device processors (DP), as described in more detail below. The communication channel to the device processor DP includes a device processor interface (DPI) that includes a device processor data interface (DPDI) and a device processor control interface (DPCI).

The DPD includes two channels (DPD and D64) (data 64 kbit). Through the DPCI, the device processor can receive information about the USC PN control packet network. This transmission takes place via the control slot (CTS) and also via the DPCI to the device processor. After the device processor also communicates with the switching data network, the transmission is provided via a data time slot (DTS). This information is introduced via DPDI to either DPD or D64. DPD and D64 include fixed channels at the interface. The DPD channel is always mapped to the DTSB2 timeslot, and the D64 channel is mapped to the DTSB2 timeslot.

The frames of each of the USI 2 and USI 4 interfaces are shown in Figures 3 and 4, respectively. In the figure, the basic time slot is denoted by B. A field (time slot) with no indication, that is, empty fields, indicates that a timeslot can be assigned as either a data time slot (DTS) or a control time slot (CTS). In Figure 3, the remaining seven bits are denoted by X. [ As described above, DPD is assigned to DTSBI (1) and D64 is assigned to DTSB2 (2).

The hardware circuitry that determines the allocation of timeslots to the intiface (USI) is denoted by an allocation store (AS). The assignment store can be accessed by the terminal for assignment assignment, and they can be accessed from the central processor software via the USC PN, the control packet network.

Assignment and mapping will now be described with reference to FIG. The assignment is associated with a time slot specification such as a data time slot (DTS) or a control time slot (CTS) at the time of the interface. An allocation storage (AS) is used for defining time slots in the transmission direction. In the receive direction, data time slots and control time slots are distinguished by line coding, where each time slot is coded as either a data time slot or a control time slot. The allocation storage (ASO, ASI, AS2, AS3, ... ASn) is located in the first switching means, or in the present embodiment, in the switch core USC. In addition, an allocation store (AS) is located in a terminal access unit (TCU), so that there is one allocation store (AS) for each TCU link. In the switch core (USC), there is one allocation store for each USC link.

How the timeslots in the interface (USI) are allocated depends on the category of each TCU link. The allocation of timeslots at the interface on the TCU link used for device processor communication is hard coded in hardware and this allocation can not be changed by the central processor software. The assignment of time slots of the interface on the TCU link used for connection to the terminal unit TU is hardcoded per terminal unit variant. Generally, there is a frame delay between input and output frames. This means that the pull-out frame USI4 on the USC-link is delayed for the incoming frame USI2 on the TCU link. The same applies for transmission in the other direction, i.e., the outgoing frame USI2 on the TCU-link is delayed for the incoming frame USI4 on the USC-link. In general, the more flexible the mapping algorithm (described in more detail below), the longer the frame delay.

A terminal unit (TU) that terminates the transmission system and is connected to the TCU via the TCU-link must allocate a data time slot (DTS) in the USI2, which must allocate one DTS for each traffic channel in the transmission system. If the terminal unit TU includes a device processor DP (externally), DTSBI or DTSB2 must be allocated. The assignment of DTS can be done in different ways, but the DTS should be uniformly spread over the possible USI2 frames. The allocation information is maintained by a switch termination unit not further described herein. The corresponding TCU allocation store must be loaded with the same allocation and the CP-software of the TCU must consult the CP software of the terminal unit (TU) with respect to the specific allocation in order to be able to load the allocation store (AS). The CP software of the Terminal Access Unit (TCU) determines the allocation of the time slot in the TCU link used for the serial connection and the inteface on the USC link.

The assignment is bidirectional, that is, from the switch core (USC) and from the switch core (USC).

The hardware circuitry that determines the mapping of time slots of the inteface is referred to herein as a mapping storage (MS). The mapping storage is accessed by the terminal for mapping settings. These terminals can be accessed from the CP software. The mapping of the data time slot (DTS) on one interface to the data time slot (DTS) on the other interface is known. The mapping storage is located in the terminal access unit, where there are two mapping stores per terminal connection unit, one for switching in the link direction LX and the other for switching to the switch direction LX The mapping (as well as the assignment) is the same in both directions, i.e. two mapping stores (MS) store the same information. This mapping is controlled by the CP software of the terminal connection unit (TCU). All timeslots that are not mapped are allocated as control time slots (CTS). 3 shows that a plurality of terminal connection units (TCUs) can be connected to a switch core USC, which may include one or more expansion units EU-0, ... EU-n. For each expansion unit, a number of allocation stores are provided, for example, there are four allocation stores AS0, AS1, AS2, and AS3 in the first expansion unit EU-0. The figure also shows that a plurality of terminal units TU can be connected to each terminal connection unit (TCU).

The first and second switching means are described in more detail below. In the illustrated embodiment, the first switching means, denoted switch core USC, performs the actual time and space switch operations in the stream of data. A switch core (USC) is arranged with a plurality of allocation stores (AS), one allocation store for each USC entrance, as described above. The Allocation Storage (AS) is designed for the USI 4 interface as described above in the illustrated embodiment. These are owned by the USC CP-Software, but this USC CP-Software needs to obtain the allocation information from the TCU CP-Software in the Assignment Store (AS-LX) in the TCU that determines the allocation of the interface (USI 4) on the USC link have. The switch core USC includes a device processor (not shown) and a device processor that can be accessed from the interface USl 4. If redundancy is applied, there can be more than one; This also generally applies to device processors in the TCU. Communication between these device processors and equipment processors requires time slots on the USC link, which results in two basic timeslots in the first USC link being reserved. There is a hardware reservation that can not be changed from the CP software. The device processor (s) are mainly used for maintenance of the switch core (USC) while the equipment process (s) are used for synchronization of the switching devices.

The terminal access unit (TCU), as its main function, multiplexes or demultiplexes the data stream between the terminal unit (to be described in more detail later) and the switch core (USC). Multiplexing or demultiplexing is controlled by a mapping and assignment function, which is referred to as a means or control means prepared to provide resources. Such function is mainly executed in the CP software of the terminal connection unit (TCU).

The terminal connection unit (TCU) has an inlet for connecting the TCU to the pre-unit in the direction of the core, if not the first terminal connection unit directly connected to the switch core (USC). However, this entry is designed for the first terminal access link (USI 4). The number of terminal access unit link entrances depends on the type of terminal connection unit, that is, the TCU transformation. The TCU link entrance used for the serial connection is designed for the first interface USI 4 while the TCU link entrance used for connection with the terminal unit TU is designed for the first or second interface, Or USI 2. The TCU link inlets used for device processor communication are designed for the second interface (USI 2) only in the illustrated embodiment. Each entry includes an allocation store (AS) that determines the allocation of time slots in the direction of transmission.

In the terminal connection unit (TCU), one device (or more, if necessary, more) processors are arranged (see FIG. 1). The device processor (DP) is internally connected to the TCU via the USI 2 interface. The TCU's device processor uses only the DPD channel (as described at the beginning of this section) and is mapped to DTSBI. Reservation is required for each device processor. This reservation is executed based on the time slot described later according to the illustrated embodiment. The data time slots received on the TCU link are terminated in the two first-in-first-out memories FIFO of the terminal connection unit. One of the FIFO memories is used for the traffic time slot, and the other FIF0 memory is used for the DTSB. The DTSB is dedicated to a unit in which one or more device processors are located, as described above. However, another FIFO memory is used for the control time slot of the control packet network.

The data is inserted into or removed from the switching device via the terminal unit TU. The switching device forms a switching structure comprising a terminal unit and the first and second switching means (USC and _{TCU i i = 1 ... n)} . One of the switching devices supports USI 2 and the other is terminated at two differently shaped switch terminal units (not described) that support USI 4. The terminal unit may also include a mapping and assignment unit. The allocation of timeslots at the interface between the terminal unit and the switching device is performed by the switch terminal unit circuit. If an external interface transmission system is connected to the terminal unit, the terminal unit also needs to map the external time slot into the interface USI 2. In the mapping and allocation functions, the terminal unit mapping and allocation forms a constant, i. E., Hard coded as mentioned at the beginning. The mapping and allocation functions need to be notified of this allocation in order to allow the terminal access unit (TCU) to load the assignment store (AS) and the mapping store (MS). The terminal unit may request a data time slot (DTS) through both a column-based reservation and a time slot-based reservation. The reservation based on the column and the reservation based on the time slot will be described later.

There is one switch store (not shown) for each USC link. Thus, consecutive TSs from the USC are stored in consecutive locations within the switch store. The location number of the timeslot begins at the first USC link of extension unit 0 (EU-0).

Since USI 4 is used on the USC link, the switch store can store 2560 TSs. Each switch storage location corresponds to multiple locations. This means, for example, that the first link on EU-0 "owns" a number of locations from 0 to 2559 and the second link "owns" a number of locations from 2,560 to 5,119.

As soon as the time slot mapping and allocation on the USC link is performed for the user, the location assigned to that particular user can be known.

The mapping and allocation algorithm of the switching device will be described in more detail below. Mapping and allocation in switches in principle involves three subfunctions: reservation of loading and unloading of mappings and allocation data. When the unit operates, mapping and allocation data loading are executed. The mapping and allocation data are then loaded into the implemented mapping storage and allocation storage. Mapping and allocation data release is performed when the unit is disconnected. The mapping and allocation data is released and the associated mapping storage and allocation storage are reloaded. The loading and unloading functions are not further described in the present invention because the present invention relates to a mapping including an algorithm executed in a mapping and allocation data reserving function when a unit requests a resource for a transmission system or a resource for a device processor And allocation data reservation. The algorithm is activated when forming the mapping and allocation data, and the mapping and allocation data will later be loaded into the mapping storage and allocation storage.

The mapping and allocation data reservation function according to the present invention provides two algorithms for requesting a resource on a terminal access link, that is, providing a reservation based on a column-based reservation and a time slot. Column-based reservations are used for the picture channel, while timeslot-based reservations are used for the device processor channel.

When a unit (e.g., a terminal unit TU) makes a column-based request for a data timeslot, the entire column is reserved for this particular unit. The number of reserved columns depends on the number of data time slots requested. On the other hand, if the unit makes a request based on a time slot for a time slot, the time slot of the reserved column is reserved for the idle time slot, or possibly a time slot usage reservation. Within this column, a data time slot may belong to one unit or one of a number of different units.

Column-based reservations will be described in more detail below. Column-based reservations are used, for example, to reserve data time slots for the transmission system. According to the present invention, it is possible to handle any transmission system that can vary from 1 to 2547 64 kb / s channels, for example. The present invention is applied to a system having a 64 kb / s channel. However, in principle, it can be applied to other transmission systems, for example, under the condition that a plurality of requirements are satisfied, e.g., the frames are synchronized and the time is the same.

In the particular embodiment described herein, the USI 4 interface is used on the USC link. The frame of this interface contains 9 time slots that can be allocated in the column and there are 283 reserved columns. For a column-based reservation, USI 4 frames are divided into regions. The number of regions is given by dividing the number of requested data time slots (STS) by nine, i. E., By dividing by the number of assignable time slots in the column. The number of reserved columns in the interface, i.e., 283, is divided into the required number of regions to provide the number of columns in the region. The remaining columns are then grouped together at the end of the frame to form the remaining area. As will be described below, if the request is not to be rejected, then one column is reserved for each requesting unit for each zone.

An example in which a 2 Mbit / s transmission system having 32 channels is connected to the terminal unit is given. Since there are 32 timeslots, dividing them by 9 provides a 3.55 area. This number is rounded to four areas.

To set the number of columns per region, 283 columns are divided into 4 regions, resulting in 70.75 columns per region. This number is truncated to provide 70 columns and 3 columns of residual area (final columns 283, 282 and 281) per area. This number allows up to 70 2Mb / s transmission systems to be connected to the USC link.

Then, the algorithm begins by searching the first free column in the first region, and then a jump of 70 columns is performed to find the corresponding column in the second region, and so on for columns 3 and 4 as well. If the corresponding column is occupied by two, three or four columns, the procedure is resumed. This means that the next free column is selected in the first region (region 1). This procedure is restarted because it creates a structure of reserved columns that optimizes alternative or other reservations of the column and also wants to have equally positioned columns. It is useful for columns to be equidistant to perform column switching. If the equidistant column can not be requested, the first free column of each region is reserved, which is referred to as a shifted column. If the so-called shifted column can not be reserved, this request is rejected.

If the number of data time slots required is not a multiple of 9 (in this case), then there will be multiple time slots remaining. These are assigned as control time slots, as described above. In a 2 Mb / s transmission system, there are four timeslots assigned to the control time slot, because a 4 column x 9 timeslot is 36 timeslots and 32 time slots are subtracted from 4 timeslots Will exist. These control time slots (CTS) are then assigned to the reserved columns of the final area, as can be seen in Fig. The control time slot (CTS) is allocated in this way for the purpose of eliminating the risk of underflow or overflow in the FIFO memory of the terminal connection unit. In particular, column reservations provide a useful reservation method when mapping to storage and loading of allocation data and when the user wants to switch the completed column.

The reservation based on the time slot will be set in more detail from now on. A reservation based on a timeslot is used herein for a device processor channel or a DP-channel that includes a communication channel to a device processor. The device processor interface (DPI) includes a device processor data interface (DPDI) and a device processor control interface (DPCI). The device processor data interface (DPDI) supplies two device processor channels DPD and D64 as described above.

The unit may use one or both of the channels. The DPD channel is mapped to the DTSBl time slot of the USI frame and D64 is mapped to the DTSB2 timeslot. If DTSB is not used, it is allocated as a control time slot (CTS).

A reservation based on a timeslot begins with column 283 in the last column, i.e., the embodiment described herein. Since 283 is a prime, column 283 will never be reserved for a traffic channel unless one of the columns or one of the 283 columns must be reserved. The number of columns used for traffic channels depends on the particular transmission system or systems connected. In the case of a 2 Mb / s transmission system, the three columns, Columns 283, 282 and 281, are never used for column-based reservations. The reservation algorithm based on time slots is formed by compromising the use of the remaining area, i.e., the remaining column, distributing the columns evenly across the frame of the interface, minimizing the impact on the reservation based on the column, The system is considered to be able to connect to the same USC link.

A reservation algorithm based on a time slot is initiated by checking which columns are reserved based on time slots. If there is no reserved column based on the time slot, column 283 is selected and the requested number of timeslots is allocated as a data timeslot. On the other hand, if a column is reserved based on a timeslot, then these columns are checked and if there are enough free timeslots in a column, they are reserved and allocated as data towel slots.

However, if there is not a sufficient number of free time slots, a new column must be reserved. The remaining area for the recently connected transmission system is checked and the first free column is selected and the requested number of timeslots is allocated as a data time slot (DTS).

However, if none of the columns in the remainder area is free, a calculation based on the number of timeslots requested for the last connected transmission system must be made. This calculation substantially corresponds to the calculation made on the reservation based on the column as described above. Thus, the number of timeslots requested is divided by nine to provide a number of regions, and the number of columns is divided by the number of regions to provide the number of columns per region. According to a reservation based on a time slot, the last column of the final area is checked first. If this column is occupied, the corresponding column of the second final area is checked until a free column is found or all the areas are examined. If all regions are checked, the algorithm is restarted in the last column twice in the final region and the procedure described until the free column is found is repeated. If a free column can not be found, the request is rejected.

According to the present invention, the resources of the interface on the link connected to the switch core can be optimally used for one or more transmission systems. Today, there are only 32 and 24 channel systems (2 Mb / s and 1.5 Mb / s), but according to the present invention, it is possible to connect other kinds of transmission systems or more transmission systems.

Claims (27)

(USC) having first switching means (USC) for switching data and second switching means (TCU _{i, i = 1 to n} ) for multiplexing or demultiplexing data and switching means (USC, TCU; Demultiplexing in a digital communication system using Time Division Multiplex (TDM) comprising means for connecting in the form of a terminal connection link (TCL) interconnecting the TCU, TCU, and means for providing resources in the form of time slots Wherein the control data and the switching data are transmitted on a terminal access link (TCI.) Comprising a logical interface (USI4, USI2) comprising a plurality of time slots (TS) arranged in a matrix, An apparatus for multiplexing / demultiplexing, The terminal connection link TCL includes a first terminal connection link (USC-link) including a plurality of second switching means TCU (TU) to the first switching means USC and a first interface USI4, And a second terminal connection link (TCU-link) for connection to a second switching means (TCU) comprising a first or a second interface (USI4, USI2) USI4), wherein resources for two or more different functionality are reserved using reservation of resources based on the columns in the interface and reservation based on timeslots in the interface, respectively A device for multiplexing / demultiplexing in a digital communication system. The method according to claim 1, Wherein the second switching means comprises a plurality of terminal connection units (TCUs). ≪ RTI ID = 0.0 > 8. < / RTI > 3. The method of claim 2, Wherein the second switching means further comprises a terminal unit (TU) connected to a terminal connection unit (TCU). 4. The method according to any one of claims 1 to 3, Wherein the first switching means (USC) comprises a switch core. ≪ RTI ID = 0.0 > 8. < / RTI > 4. The method according to any one of claims 1 to 3, The second terminal connection link TCL includes at least one terminal connection link TCL-1 for connecting the terminal unit TU to the second switching means and a terminal connection terminal TCL- Comprises a terminal connection link (TCL-3) inside the second switching means (TCU) for communication with the connection link (TCL-2) and the device processor (DP) Multiplexing device. 4. The method according to any one of claims 1 to 3, Wherein a plurality of transmission systems are directly connected to a terminal connection unit (TCU) or indirectly connected to a terminal connection unit (TCU) via a terminal unit (TU). 4. The method according to any one of claims 1 to 3, Wherein the resource (TS) is reserved in a column-based reservation for a first functionality related to reserving a type slot for a traffic channel. ≪ Desc / Clms Page number 20 > 4. The method according to any one of claims 1 to 3, Wherein the resource (TS) is associated with a second functionality by being reserved in a reservation based on a timeslot for a device processor channel (DP-channel). ≪ Desc / Clms Page number 20 > 4. The method according to any one of claims 1 to 3, Wherein a plurality of timeslots represented by a basic time slot (BTS) have positions fixedly arranged in the frame of the inteface, and these slots are mainly used for frame control purposes. . 4. The method according to any one of claims 1 to 3, Characterized in that the resource providing means comprises allocation means for defining a timeslot (TS) as a data time slot (DTS) to be used for switching data and a control time slot (CTS) used for controlling the packet. / RTI > 11. The method of claim 10, Wherein the data time slot (DTS) can be requested via a reservation based on a column or a reservation based on a time slot. ≪ Desc / Clms Page number 19 > 12. The method of claim 11, A column-based reservation is used in order to request a data time slot (DTS) for the transmission system connected to the terminal unit by the terminal unit (TU). The multiplexing / demultiplexing device . 12. The method of claim 11, Wherein the terminal unit comprises a device processor (DP) and a reservation based on a timeslot is used to request resources for the device processor. ≪ Desc / Clms Page number 13 > 13. The method of claim 12, In a reservation based on the column of the interface USI4 used on the first terminal access link (USC-link), the frame of the interface USI4 is used to request the requested data time slot (DTS) Divided by the number of required areas, the number of columns that can be reserved in the interface USI4 in order to divide the number of columns in each column into allocable time slots (TS) in the column and provide the number of columns in the area, Wherein one column is reserved for a device of a transmission system directly connected to a terminal unit (TU) or a terminal connection unit (TCU). ≪ Desc / Clms Page number 20 > 15. The method of claim 14, Characterized in that in the interface (USI4) on the first terminal connection link (USC-link), the number of columns in which 9 time slots (TS) in a column are assignable and reserved is 283 Multiplexing / demultiplexing. 16. The method of claim 15, Wherein the allocating means comprises an algorithm for finding equidistant columns in each region, preferably an algorithm going from a first free column in the first region. ≪ Desc / Clms Page number 13 > 17. The method of claim 16, And if the equidistant column can not be reserved, the first free column of each region is reserved, i. E., The shifted column is reserved. ≪ Desc / Clms Page number 13 > 18. The method of claim 17, Wherein the request is rejected if it is unable to reserve equidistant columns or if the shifted column (i. E., The first free column in each region) can not be reserved. ≪ Desc / Clms Page number 13 > 19. The method of claim 18, If the number of requested data time slots (DTS) is not a multiple of the number of assignable time slots in the column, the remaining timeslots are assigned as control time slots (CTS) according to a predetermined scheme. A device for multiple nipple lexing / demultiplexing. 4. The method according to any one of claims 1 to 3, Characterized in that, for reservation of a device processor channel (DP-channel), a reservation based on a timeslot is used. 21. The method of claim 20, In a reservation based on a time slot, the reservation starts from the last column among the divided columns of the frame of the interface (USI4) of the first terminal connection link (USC), and any column is reserved for the reservation based on the time slot The last column is selected and the requested number of timeslots is allocated as a data time slot (DTS). ≪ Desc / Clms Page number 13 > 21. The method of claim 20, Characterized in that if a column is reserved for a reservation based on a timeslot and there is a sufficient number of free timeslots in these columns, then these timeslots are reserved and assigned as data time slots (DTS) Multiplexing / demultiplexing. 21. The method of claim 20, Characterized in that if a column is reserved for a reservation based on a timeslot and there are not enough idle time slots in any of these columns then the remaining area of the last connected transmission system is checked and the first idle column is selected Multiplexing / demultiplexing in a digital communication system. 21. The method of claim 20, If none of the columns that are not reserved by the reservation based on the column include a sufficient number of free time slots, the allocation means performs a calculation to obtain the number of columns per area, Wherein the column, i. E., The corresponding column in each region, is checked in a contiguous and continuous manner until a free column is found. ≪ Desc / Clms Page number 13 > A method for reserving resources in the form of timeslots at an interface of a connection means for interconnecting a first switching means of a switching device used in a digital communication system using time division multiplexing (TDM) with one or more second switching means , The resource of the interface (e.g., timeslot) is arranged in a frame that arranges the resources into a matrix, Wherein one or more columns of resources are reserved according to a predetermined manner and resources requested for device processor channel resources are reserved based on resources when a resource is requested for a traffic channel, Resource reservation method. 26. The method of claim 25, The second switching means includes a terminal connection unit (TCU) and one or more terminal units (TU) connected to the unit, and the resources for the traffic channel or the device processor channel are connected to a terminal unit (TU). ≪ / RTI > 26. The method of claim 25, Wherein the resource for the traffic panel or device processor channel is requested by a device in the transmission system that is directly connected to the terminal switching unit (TCU) of the second switching means.

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