KR100351896B1 - method for driving liquid crystal of SLV - Google Patents

Abstract

The present invention relates to a liquid crystal driving method of the SLV to lower the driving voltage, comprising: a word line formed in one direction, a bit line formed in a direction perpendicular to the word line, a gate connected to the word line, and the bit And a liquid crystal display (LCD) comprising a MOSFET having a drain connected to a line, a capacitor connected in series to a source of the MOSFET, and a lower electrode, an upper electrode connected to the word line, and a liquid crystal configured between the lower electrode and the upper electrode. In the liquid crystal driving method of the SLV, a voltage of 0V or Vpp / 2 is applied to the other side of the capacitor connected to the source of the MOSFET, a voltage of 5 to 10V is applied to the word line and the bit line, and an upper portion of the LCD The liquid crystal is driven by applying a negative voltage to the electrode.

Description

Method for driving liquid crystal of SLV

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display (LCD) for projection, and more particularly to a method of driving a liquid crystal (hereinafter referred to as LC) of a reflective light valve (hereinafter referred to as RLV). It is about.

In general, liquid crystal display (LCD) technology for projection is classified into a transmissive light valve (hereinafter referred to as a TLV) and an RLV technology.

TLVs are now widely used in both front-screen and rare-screen projection display systems.

Recently, however, much attention has been paid in that RLV technology is advantageous for future high definition TV (HDTV) applications.

This is because the light throughput is large because it is more efficient than TLV in terms of aperture ratio.

That is, in the case of RLV, a pixel composed of a conductor, a pixel transistor, and a capacitor is placed under the pixel mirror in an array of matrices, which is more advantageous in terms of high resolution.

Therefore, the aperture ratio is suggested only by the minimum distance between the mirrors.

On the other hand, the bottom material of a display system in which an active matrix pixel array is formed includes amorphous silicon, polycrystalline silicon, and single crystal silicon. Is used.

Among them, single crystal silicon has a lot of research and development in that carrier mobility is large and existing CMOS process can be used.

As a display device for displaying an image signal, an LCD may be classified into a liquid crystal panel unit and a driver unit.

First, the liquid crystal panel includes a lower electrode in which pixel electrodes and thin film transistors are arranged in a matrix, an upper electrode in which a common electrode and a color filter layer are formed, and a liquid crystal layer filled in the upper and lower electrodes.

The driving unit processes a video signal input from the outside and outputs a composite synchronization signal, and receives a composite synchronization signal output from the image signal processing unit and separates and outputs a horizontal synchronization signal and a vertical synchronization signal. NTSC, PAL, SECAM) control unit for controlling the timing according to the selection signal, a data driver for supplying a signal voltage to the data line of the liquid crystal panel unit by the output signal of the control unit, and scanning of the liquid crystal panel unit by the output signal of the control unit And a gate driver and a source driver for sequentially applying a driving voltage to the line and the signal line.

In order to develop a liquid crystal display device configured as described above with a large screen high quality, researches for reducing power consumption have been actively conducted.

Hereinafter, a liquid crystal driving method of a conventional SLV will be described with reference to the accompanying drawings.

1 is a structural cross-sectional view showing a conventional SLV, Figure 2 is an equivalent circuit showing a conventional SLV.

As shown in FIG. 1, a field insulating film 12 is formed in a predetermined region of the single crystal silicon substrate 11, and a gate insulating film (not shown) is formed in the single crystal silicon substrate 11 in which the field oxide film 12 is not formed. Gate electrode 13 is formed, and a source / drain impurity diffusion region 14 is formed in the surface of the single crystal silicon substrate 11 on both sides of the gate electrode 13.

Subsequently, a capacitor in which a lower electrode 15, a dielectric film (not shown), and an upper electrode 16 are sequentially stacked is formed on the field oxide film 12, and the front surface of the single crystal silicon substrate 11 including the capacitor is formed. A first interlayer insulating layer 17 is formed on the first interlayer insulating layer 17, and a first metal wiring 18 electrically connected to the source / drain impurity diffusion region 14 and the upper electrode 16 of the capacitor. ) Is formed.

Here, the first metal wire 18 is a metal wire for transmitting an electrical signal.

A second interlayer insulating film 19 is formed on an entire surface of the single crystal silicon substrate 11 including the first metal wiring 18, and a second metal wiring 20 is formed on the second interlayer insulating film 19. The third interlayer insulating film 21 is formed on the entire surface of the single crystal silicon substrate 11 including the second metal wiring 20.

Here, the second metal wiring 20 is a metal wiring used for wiring and light blocking, and the third interlayer insulating film 21 is formed to a thickness of 0.4 to 0.8 μm so as not to be electrically connected to each metal wiring. It is.

Subsequently, a mirror pixel electrode 23 and an ITO electrode 25 are electrically formed on the third interlayer insulating layer 21 through the first metal wiring 18 and the conductive plug 22. An LC (Liquid Crystal) 24 is formed between the pixel electrode 23 and the ITO electrode 25.

The mirror pixel electrode 23 is formed of a material capable of efficiently reflecting incident light, and is formed of an oxide film, a nitride film, or the like between the mirror pixel electrode 23 and the ITO electrode 25 and the LC 24. The formed protective film (not shown) is formed.

On the other hand, the LC 24 is changed from a scattering state to a transparent state or vice versa according to voltages applied to the ITO electrode 25 and the mirror pixel electrode 23.

That is, the conventional SLV equivalent circuit and the operation principle are as follows.

As shown in FIG. 2, a gate of the MOSFET 26 is connected to a word line WL formed in one direction, and a drain is connected to a bit line BL formed in a direction perpendicular to the word line WL. A capacitor 27 is connected in series to the source of the MOSFET 26, a mirror pixel electrode 23 is connected to the word line WL, and a ground terminal 0V is connected to the ITO electrode 25.

The mirror pixel electrode 23 is a lower electrode of the LCD, and the ITO electrode 25 is an upper electrode.

The driving voltage of the conventional SLV configured as described above is very large, 18 to 25V.

That is, the generalized prior art for driving the LC 24 applies 0V to the ITO electrode 25 and applies a voltage of 18 to 25V to the mirror pixel electrode 23.

In order to provide a high voltage as described above, the breakdown voltage (hereinafter, referred to as BV) of the MOSFET 26 is very large, more than 25V, and the dielectric film thickness of the capacitor 27 also increases in terms of leakage current.

Therefore, the MOSFET 26 having a high breakdown voltage has a unique source / drain structure such as a modified lightly doped drain (LDD) structure or a double diffused drain (DDD) structure having a drift to increase the BV.

In particular, an increase in the dielectric film thickness of the capacitor 27 to reduce the leakage current reduces the capacitance value, so that an increase in the capacitor area is inevitable to compensate for this. Conventionally, the pixel area is 25 µm x 25 µm or more, and the area occupied by the capacitor in the pixel is 90% or more.

However, in the conventional liquid crystal driving method of the SLV as described above has the following problems.

First, the source / drain structure of LDD or DDD to lower the breakdown voltage of the MOSFET must not only have a very large channel length, but also cannot use a self-aligned method, and use a high energy Tlti ion implantation device.

Secondly, masks and photo steps are increased, the manufacturing process is very complex and difficult, and even very large heat budgets reduce the flexibility of the process.

Third, increasing the dielectric film thickness of the capacitor to reduce the leakage current reduces the capacitance value, thereby increasing the capacitor area to compensate for this.

The present invention has been made to solve the above problems and to provide a liquid crystal driving method of the SLV to solve problems such as cell scale down limit, performance degradation, complicated manufacturing process caused by a large drive voltage. have.

1 is a structural cross-sectional view showing a conventional SLV

2 is an equivalent circuit diagram of a conventional SLV

Figure 3 is a structural cross-sectional view showing an SLV according to the present invention

4 is an equivalent circuit diagram of an SLV according to the present invention.

Explanation of symbols for the main parts of the drawings

31: single crystal silicon substrate 32: field oxide film

33 gate electrode 34 source / drain impurity diffusion region

35: lower electrode 36: upper electrode

37: first interlayer insulating film 38: first metal wiring

39: second interlayer insulating film 40: second metal wiring

41 third interlayer insulating film 42 conductive plug

43: mirror pixel electrode 44: LC

45: ITO electrode

The liquid crystal driving method of the SLV according to the present invention for achieving the above object is a word line formed in one direction, a bit line formed in a direction perpendicular to the word line, a gate is connected to the word line and the bit And a liquid crystal display (LCD) comprising a MOSFET having a drain connected to a line, a capacitor connected in series to a source of the MOSFET, and a lower electrode, an upper electrode connected to the word line, and a liquid crystal configured between the lower electrode and the upper electrode. In the liquid crystal driving method of the SLV, a voltage of 0V or Vpp / 2 is applied to the other side of the capacitor connected to the source of the MOSFET, a voltage of 5 to 10V is applied to the word line and the bit line, and an upper portion of the LCD It is characterized by applying a negative voltage to the electrode.

Hereinafter, the liquid crystal driving method of the SLV according to the present invention with reference to the accompanying drawings in detail as follows.

3 is a structural cross-sectional view showing the SLV according to the present invention, Figure 4 is an equivalent circuit diagram of the SLV according to the present invention.

As shown in FIG. 3, a field insulating film 32 is formed in a predetermined region of the single crystal silicon substrate 31, and a gate insulating film (not shown) is formed on the single crystal silicon substrate 31 in which the field oxide film 32 is not formed. Gate electrode 33 is formed, and a source / drain impurity diffusion region 14 is formed in the surface of the single crystal silicon substrate 31 on both sides of the gate electrode 33.

Subsequently, a capacitor in which a lower electrode 35, a dielectric film (not shown) and an upper electrode 16 are sequentially stacked is formed on the field oxide film 32, and the front surface of the single crystal silicon substrate 31 including the capacitor is formed. A first interlayer insulating layer 37 is formed on the first interlayer insulating layer 37, and a first metal wire 38 electrically connected to the source / drain impurity diffusion region 34 and the upper electrode 36 of the capacitor. ) Is formed.

The first metal wire 38 is a metal wire for transmitting an electrical signal.

A second interlayer insulating film 39 is formed on the entire surface of the single crystal silicon substrate 31 including the first metal wiring 38, and a second metal wiring 40 is formed on the second interlayer insulating film 39. The third interlayer insulating film 41 is formed on the entire surface of the single crystal silicon substrate 31 including the second metal wiring 40.

Here, the second metal wire 40 is a metal wire used for wiring and light blocking, and the third interlayer insulating film 41 is formed to a thickness of 0.4 to 0.8 μm so as not to be electrically connected to each metal wire. It is.

Subsequently, a mirror pixel electrode 43 and an ITO electrode 45, which are electrically connected to each other through the first metal wire 38 and the conductive plug 44, are sequentially formed on the third interlayer insulating layer 41. A LC (Liquid Crystal) 44 is formed between the pixel electrode 43 and the ITO electrode 45.

The mirror pixel electrode 43 is formed of a material capable of efficiently reflecting incident light, and is formed of an oxide film, a nitride film, or the like between the mirror pixel electrode 43 and the ITO electrode 45 and the LC 44. The formed protective film (not shown) is formed.

On the other hand, the LC 44 changes from an scattering state to a transparent state or vice versa according to voltages applied to the ITO electrode 45 and the mirror pixel electrode 43.

As described above, the SLV structure of the present invention and the prior art are the same, but the present invention reduces the channel length of the MOSFET and the thickness of the gate insulating film, the source / drain structure is formed by self-alignment, and the pixel capacitor is smaller than the prior art. It is possible to significantly reduce the area of the capacitor by forming the dielectric film thickness of 150 Å or less.

4, the gate of the MOSFET 46 is connected to the word line WL formed in one direction, and the bit line BL formed in a direction perpendicular to the word line WL. The capacitor 47 is connected in series to the source of the MOSFET 46, the mirror pixel electrode 43 is connected to the word line WL, and the negative voltage is applied to the ITO electrode 45. It is a structure to apply.

In this case, a voltage of OV or Vpp / 2 is applied to the other side of the capacitor 47 connected in series with the source of the MOSFET 46, and a voltage of 5 to 10 V is applied to each word line WL and the bit line B. The negative voltage applied to the ITO electrode 45 is a voltage of 5 to 10.

That is, the present invention applies different polarities of voltages applied to the ITO electrode 45 formed on the LC 44 and the mirror pixel electrode formed on the lower portion of the LC 44.

Meanwhile, when a positive voltage is applied to the ITO electrode 45 without applying a negative voltage, a negative voltage may be applied to the mirror pixel electrode 43.

Therefore, when a negative voltage is applied to the ITO electrode 45 formed above the LC 44 to drive the LC 44 as described above, the mirror pixel electrode 43 formed below the LC 44 Even if a positive voltage reduced by the negative voltage is applied, the magnitude of the driving voltage across the LC 44 is substantially the same as before.

That is, the present invention applies the negative voltage to the upper electrode of the LCD, the intensity of the electric field across the LCD is the same as the conventional case of applying 0 V to the upper electrode of the LCD, and substantially the SLV applied to the lower electrode of the LCD. The driving voltage of significantly reduces the driving voltage of the SLV by decreasing the negative voltage applied to the LCD upper electrode.

As described above, the SLV liquid crystal driving method has the following effects.

First, the driving voltage of the SLV can be significantly lowered by reducing the SLV voltage applied to the LCD lower electrode by the negative voltage applied to the LCD upper electrode by applying a negative voltage to the LCD upper electrode.

Second, scaling down of the cell area may be achieved by reducing the driving voltage of the SLV by applying a negative voltage to the LCD upper electrode.

Third, the manufacturing process can be simplified by forming a self-aligning source / drain by applying a standardized conventional CMOS process.

Fourth, it is advantageous in terms of process and performance in embedding peripheral logic circuits in the pixel array chip.

Fifth, it is possible to provide high-density SLVs with high performance, high reliability, and even extremely small chip areas.

Claims (3)

A word line formed in one direction, a bit line formed in a direction perpendicular to the word line, a MOSFET having a gate connected to the word line and a drain connected to the bit line, and connected in series with a source of the MOSFET In the liquid crystal driving method of the SLV comprising a capacitor and an LCD comprising a lower electrode, an upper electrode connected to the word line, and a liquid crystal formed between the lower electrode and the upper electrode, A voltage of 0V or Vpp / 2 is applied to the other side of the capacitor connected to the source of the MOSFET, a voltage of 5 to 10V is applied to the word line and the bit line, and a negative voltage is applied to the upper electrode of the LCD. The liquid crystal driving method of the SLV, characterized in that for driving. The method of claim 1, wherein the voltage applied to the LCD upper electrode is (−) 5 to 10V. The liquid crystal driving method according to claim 1 or 2, wherein a positive voltage of 5-10V is applied to the LCD lower electrode when a negative voltage of 5-10V is applied to the LCD upper electrode.