KR100337296B1 - Apparatus and Method for Data Copy between Duplicated Circuit Board - Google Patents

Abstract

The present invention relates to an apparatus and method for copying data between redundant circuit boards.

In the data copying apparatus of the conventional redundant circuit board, when the circuit board copies its data to the other circuit board on the other side, the CPU of the circuit board which copies the data to the other circuit board side stores the address and data under the jurisdiction of its own circuit. Since the data must be transmitted to the board, there is a problem in that the load on the CPU of the circuit board increases when data is copied. In addition, when copying data between circuit boards, since both an address bus and a data bus are provided to transmit an address and data, an edge pin for connecting the circuit board is required.

Since the present invention reduces the involvement of data copy by the CPU of each circuit board when copying data between the redundant circuit boards, it reduces the load of the CPU provided in the circuit board and removes the address bus for address transfer. This will reduce the edge pins for connecting the circuit board. In addition, the present invention also has the additional effect of speeding up the data copying operation because data is copied directly between memories by the write control signal and the read control signal without latching the data for data copying.

Description

Apparatus and Method for Data Copy between Duplicated Circuit Board}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a redundant circuit board. In particular, when copying data between redundant circuit boards, the data is copied directly by the CPU (Central Processing Unit) of each circuit board. A device and method for copying data between redundant circuit boards to reduce the involvement of the CPU on the circuit board and to reduce the edge pins for connecting the circuit board by eliminating the address bus for address transmission. will be.

In general, a system such as an exchanger is provided with a plurality of circuit boards that process various data to perform a given function in the circuit board. In the system, each circuit board is dualized to prevent the operation of the system. .

In this redundant circuit board, one circuit board is operated in the active mode and the other circuit board is operated in the standby mode. If a failure occurs in the mode, the standby mode is switched to the active mode to operate continuously in place of the failed active circuit board to prevent the operation of the system.

In order for a redundant circuit board to perform such a redundant operation, the active circuit board and the standby mode circuit board must maintain the same data. In other words, the data generated during the operation of the active mode circuit board must be maintained in the standby mode circuit board as well. The redundancy operation can be performed by continuously processing the processed data.

Thus, the redundant circuit board performs an operation of copying and storing data between circuit boards in order to maintain the same data. Conventionally, when copying data between redundant circuit boards, a data copy apparatus as shown in FIG. 1 is used. .

That is, the data copying apparatus of the conventional redundant circuit board includes an active side circuit board 10 and a standby side circuit board 20, as shown in FIG. 1, and the circuit boards 10 and 20 correspond to a back board ( 30 is connected to each other via a data line, an address line, and a control signal line to exchange data. The active circuit board 10 includes a CPU 11 and a memory 12. The standby circuit board 20 is also provided with a CPU 21 and a memory 22.

In the data copying apparatus of such a redundant circuit board, when the active circuit board 10 copies data to the memory 22 of the standby circuit board 20, the CPU 11 of the active circuit board 10 Applies the read control signal / IN_RD and the address ADDRESS to the memory 12 side to access the memory 12 to read the data DATA of the memory 12 and via the data bus of the back board 30. To the memory 22 side of the standby circuit board 20, to send the write control signal / OUT_WR to the memory 22 side, and to add the address ADDRESS to the address bus of the back board 30. Is sent to the corresponding memory 22 side. Accordingly, the memory 22 of the standby circuit board 20 receives the write control signal / OUT_WR, the address ADDRESS, and the data DATA from the CPU 11 of the active circuit board 10. The data DATA is stored in accordance with the write control signal / OUT_WR and the address ADDRESS to copy and store the data of the active circuit board 10.

In the data copying apparatus of the conventional redundant circuit board as described above, when the active circuit board 10 copies its data to the standby circuit board 20, the data is transmitted and stored in byte units or word units. When performing the data copy operation, the CPU 11 of the active circuit board 10 which copies data to the standby circuit board 20 sends the address and data to the standby circuit board 20 under its jurisdiction. Since the data must be transmitted, there is a problem in that the load on the CPU 11 of the active circuit board 10 is increased during data copying. In addition, when copying data between circuit boards, since both an address bus and a data bus are provided to transmit an address and data, an edge pin (EDGE-PIN) for connecting the circuit board is required.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems described above, and its object is to reduce the involvement of data copy by the CPU of each circuit board when copying data between redundant circuit boards, thereby providing a CPU provided in the circuit board. In addition to reducing the load of the circuit, the address bus for address transmission is eliminated, and the edge pin for connecting the circuit board is reduced.

1 is a block diagram of a data copying apparatus between conventional redundant circuit boards.

2 is a block diagram of a data copying device between redundant circuit boards according to the present invention;

3 is a flowchart illustrating a data copying process between redundant circuit boards according to the present invention.

4 is a diagram showing data copy timing in the present invention.

* Description of the symbols for the main parts of the drawings *

40: active circuit board 41: CPU 42: memory

43: AND gate 44: register 45: counter

46: signal generator 50: standby circuit board

51: CPU 52: Memory 53: Endgate

54: Register 55: Counter 56: Signal generator

An apparatus feature of the present invention for achieving the above object is a data copying device between redundant circuit boards for copying data between first and second circuit boards, wherein the first and second circuit boards are high. A memory configured to receive a nibble address, a row nibble address, a write control signal, and a read address to store and output data; Generates a low nibble address for accessing the memory by receiving an enable signal and a start signal, applies it to the memory, generates a read control signal, applies it to the memory, and applies it as a write control signal to the other circuit board. Access signal generating means; Sector information exchange means for transmitting the received sector information of the copy object to the opposite circuit board; Perform a control operation for data copying, transmit and receive a flag signal notifying the progress of data copying with the counterpart circuit board, output sector information of a copy object to the sector information exchange means, and send sector information of the copy object to the counterpart; Outputting an enable signal for receiving from a circuit board and controlling a data copy operation to the access signal generating means, outputting a start signal to the access signal generating means and the opposite circuit board, and outputting a high nibble address to the memory; It is provided with a control means.

On the other hand, the method features of the present invention, in the data copying method of a redundant circuit board, the first circuit board sends a flag signal to the second circuit board, and the memory sector information of the copy target to the second circuit board Process; Receiving, by the second circuit board, the flag signal, generating a high nibble address for memory access based on the memory sector information, applying it to its memory, and then sending a flag signal to the first circuit board; When the first circuit board receives the flag signal from the second circuit board, a high nibble address, a low nibble address, and a read control signal for memory access are generated based on the memory sector information and applied to a memory of the memory. Outputting the data to the second circuit board side; The second circuit board generates a low nibble address for memory access and applies it to its own memory in synchronization with the generation of the low nibble address by the first circuit board, and the read control generated by the first circuit board. And applying a signal to its own memory as a write control signal to store and copy the data output from the first circuit board into its own memory.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The data copying device between the redundant circuit boards according to the present invention is constructed as shown in FIG. That is, the active circuit board 40 and the standby circuit board 50 is provided, and the circuit boards 40 and 50 are connected to each other through a data line and a control signal line of the back board 60 to receive data. It is configured to send and receive. The active circuit board 40 includes a CPU 41, a memory 42, an end gate 43, a register 44, a counter 45, and a signal generator 46. The CPU 50 also includes a CPU 51, a memory 52, an end gate 53, a register 54, a counter 55, and a signal generator 56.

In the active circuit board 40, the CPU 41 transmits / receives information for data copy with the CPU 51 of the standby circuit board 50 in accordance with the data copy command of the high-order command, and transmits the data of the memory 42. By outputting various control signals for storage and reading, the data of the standby circuit board 50 is stored and copied to the memory 42 or the data of the memory 42 is transferred to the memory 52 of the standby circuit board 50. Save and copy. The register 44 stores data copy sector information necessary for data copy applied from the CPU 41 and transmits it to the CPU 51 of the standby circuit board 50. The AND gate 43 logically multiplies the enable signal GLen_A and the start signal STT from the CPU 41 and outputs the result to the counter 45, or the enable signal GLen_A applied from the CPU 41. And the start signal STT applied from the CPU 51 are logically multiplied and output to the counter 45 side. The counter 45 starts operation based on the signal applied from the AND gate 43, applies a low nibble address (LNA_A) generated by counting according to the reference clock to the memory 42, and generates a signal. The unit 46 outputs the read control signal / RD_A generated in synchronization with the row nibble address LNA_A output from the counter 45 to the memory 42, 52 side. The memory 42 sends its stored data to the memory 52 side of the standby side circuit board 50 in accordance with the read control signal / RD_A applied from the signal generator 46, and sends the standby side circuit board ( The read control signal / RD_S applied from 50 is received as the write control signal / WR_A to store data applied from the memory 52 of the standby circuit board 50, but is applied from the CPU 41. Data is stored or output for the corresponding storage sector according to the high nibble address HNA_A and the low nibble address LNA_A applied from the counter 45.

In the standby circuit board 50, the CPU 51 transmits and receives information for data copy with the CPU 41 of the active circuit board 40, and various control signals for data storage and reading of the memory 52. By outputting the data, the data of the active circuit board 40 is stored and copied in the memory 52 or the data of the memory 52 is stored in the memory 42 of the active circuit board 40 and copied. The register 54 stores data copy sector information required for data copying applied from the CPU 51 and transmits it to the CPU 41 of the active circuit board 40. The AND gate 53 logically multiplies the enable signal GLen_S and the start signal STT from the CPU 51 and outputs the result to the counter 55, or the enable signal GLen_S applied from the CPU 51. And the start signal STT applied from the CPU 41 are logically multiplied and output to the counter 55 side. The counter 55 starts operation based on the signal applied from the AND gate 53 and applies the row nibble address LNA_S generated by counting according to the reference clock to the memory 52, and the signal generator 56. Outputs the read control signal / RD_S generated in synchronization with the row nibble address LNA_S output from the counter 55 to the memory 42, 52 side. The memory 52 transmits its stored data to the memory 42 side of the active circuit board 40 in accordance with the read control signal / RD_S applied from the signal generator 56, and the active circuit board ( The read control signal / RD_A applied from 40 is received as the write control signal / WR_S to store data applied from the memory 42 of the active circuit board 40, but is applied from the CPU 51. Data is stored or output for the corresponding storage sector according to the high nibble address HNA_S and the low nibble address LNA_S applied from the counter 55.

In the data copying apparatus of the redundant circuit board according to the present invention configured as described above, when copying data between the active circuit board 40 and the standby circuit board 50, the data is copied sector by sector with respect to the memory. When copying data from the active circuit board 40 to the standby circuit board 50, the CPU 41 sends copy sector information to the CPU 51 of the standby circuit board 50 via the register 44. In addition, the counter 45 applies the low nibble address LNA_A to the memory 42 and addresses the memory 42 by applying a high nibble address HNA_A indicating the sector to be copied to the memory 42. The data of the sector corresponding to the address is read from the memory 42 and sent to the memory 52 of the standby circuit board 50. In the standby circuit board 50, the CPU 51 registers ( On the basis of the copy sector information supplied from 44, the high nibble address HNA_S indicating the start of a copy target is applied to the memory 52, and the counter 55 supplies the low nibble address LNA_S to the memory 52. The memory 52 is addressed to store the data of the active circuit board 40 in a sector of the memory 52 corresponding to the address.

In the data copying device between the redundant circuit boards according to the present invention as described above, for example, the process of copying data from the active circuit board 40 to the standby circuit board 50 will be described based on the flowchart shown in FIG. Is as follows.

First, when a higher order instruction requesting to copy data of a specific sector of the memory 42 to the standby side circuit board 50 is applied to the CPU 41 of the active side circuit board 40 (step S1), the CPU ( Toggles the flag signal FLG_A for notifying that 41 will copy the data of the memory sector, sends it to the CPU 51 of the standby side circuit board 50, and records the sector information of the copy object in the register 44. (Step S2). At this time, the CPU 51 of the standby circuit board 50 recognizes that the flag signal FLG_A is toggled, reads sector information from the register 44, and activates the enable signal GLen_S to activate the AND gate ( 53, the high nibble address HNA_S corresponding to the read sector information is activated and applied to the memory 52, and the flag signal FLG_S is toggled to toggle the CPU 41 of the active circuit board 40. ) (Step S3). Accordingly, the CPU 41 of the active circuit board 40 recognizes that the flag signal FLG_S from the CPU 51 of the standby circuit board 50 is toggled, and activates the enable signal GLen_A. After applying to the gate 43 and activating the high nibble address HNA_A corresponding to the copy target sector information to the memory 42, the start signal STT is activated to activate the AND gate 43, ( 53 to activate the counter 45 and the counter 55 (step S4).

Accordingly, the signal generator 46 generates a read control signal / RD_A in synchronization with the row nibble address LNA_A of the counter 45 and outputs the read control signal / RD_A to the memory 42 and the memory 52 side. The memory 42 of the circuit board 40 reads data of a sector designated by the high nibble address HNA_A of the CPU 41 and the low nibble address LNA_A of the counter 45, and then stores the standby side circuit board 50. ) Is output to the memory 52 side (step S5). At the same time, the memory 52 of the standby circuit board 50 uses the read control signal / RD_ applied from the signal generator 46 of the active circuit board 40 as the write control signal / WR_S. The data applied from the memory 42 to be stored, but the data of the memory 42 is stored in a sector designated by the high nibble address HNA_S of the CPU 51 and the low nibble address LNA_S of the counter 55. And copy (step S6). At this time, the operation timing of the counter 45 and the counter 55 and the timing between the read control signal / RD_A and the write control signal / WR_S generated by the signal generator 46 are shown in FIG. As

In the same manner as described above, data stored in the memory 52 of the standby circuit board 50 may be copied and stored in the memory 42 of the active circuit board 40. The memory 52 of the circuit board 50 reads and outputs data using the read control signal / RD_S generated by the signal generator 56, and the memory 42 of the active circuit board 40 is read. Stores the data in the memory 52 using the read control signal / RD_S as the write control signal / WR_A.

As described above, the present invention reduces the involvement of data copy by the CPU of each circuit board when copying data between the redundant circuit boards, thereby reducing the load of the CPU provided in the circuit board, Eliminating the address bus reduces the edge pins for connecting the circuit board. In addition, the present invention also has the additional effect of speeding up the data copying operation because data is copied directly between memories by the write control signal and the read control signal without latching the data for data copying.

Claims (8)

In the data copying device between the redundant circuit board for copying data between the first and second circuit board, The first and second circuit boards include: a memory configured to receive a high nibble address, a low nibble address, a write control signal, and a read address to store and output data; Generates a low nibble address for accessing the memory by receiving an enable signal and a start signal, applies it to the memory, generates a read control signal, applies it to the memory, and applies it as a write control signal to the other circuit board. Access signal generating means; Sector information exchange means for transmitting the received sector information of the copy object to the opposite circuit board; Perform a control operation for data copying, transmit and receive a flag signal notifying the progress of data copying with the counterpart circuit board, output sector information of a copy object to the sector information exchange means, and send sector information of the copy object to the counterpart; Outputting an enable signal for receiving from a circuit board and controlling a data copy operation to the access signal generating means, outputting a start signal to the access signal generating means and the opposite circuit board, and outputting a high nibble address to the memory; And a data copying device between the redundant circuit boards. delete The method of claim 1, wherein the control means, And a high nibble address is output to the memory side based on the sector information. The method of claim 1, wherein the access signal generating means, An AND gate for ANDing the applied enable signal and the start signal; A counter for starting operation based on a signal applied from the AND gate to generate a low nibble address according to a reference clock and to apply the low nibble address to the memory; And a signal generator for generating a read control signal in synchronization with the low nibble address of the counter and applying the read control signal to the memory, and to the counter circuit board as a write control signal. delete The method of claim 1, wherein the sector information exchange means, An apparatus for copying data between redundant circuit boards comprising registers to transfer sector information of an authorized copy target. 2. The data copying of the redundant circuit board according to claim 1, wherein data is inputted and copied between respective memories directly through a data bus without connecting an address bus between the first circuit board and the second circuit board. Device. In the data copy method of the redundant circuit board, Sending a flag signal to the second circuit board by the first circuit board, and sending memory sector information of a copy object to the second circuit board; Receiving, by the second circuit board, the flag signal, generating a high nibble address for memory access based on the memory sector information, applying it to its memory, and then sending a flag signal to the first circuit board; When the first circuit board receives the flag signal from the second circuit board, a high nibble address, a low nibble address, and a read control signal for memory access are generated based on the memory sector information and applied to a memory of the memory. Outputting the data to the second circuit board side; The second circuit board generates a low nibble address for memory access and applies it to its own memory in synchronization with the generation of the low nibble address by the first circuit board, and the read control generated by the first circuit board. And copying the data output from the first circuit board into its own memory by applying a signal to its own memory as a write control signal.