KR100320941B1 - Dual voltage controlled oscillator having improved shield characteristic - Google Patents
Dual voltage controlled oscillator having improved shield characteristic Download PDFInfo
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- KR100320941B1 KR100320941B1 KR1019960023585A KR19960023585A KR100320941B1 KR 100320941 B1 KR100320941 B1 KR 100320941B1 KR 1019960023585 A KR1019960023585 A KR 1019960023585A KR 19960023585 A KR19960023585 A KR 19960023585A KR 100320941 B1 KR100320941 B1 KR 100320941B1
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- voltage controlled
- controlled oscillator
- strip line
- dual voltage
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/18—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance
- H03B5/1841—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator
- H03B5/1847—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator the active element in the amplifier being a semiconductor device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2202/00—Aspects of oscillators relating to reduction of undesired oscillations
- H03B2202/08—Reduction of undesired oscillations originated from the oscillator in circuit elements external to the oscillator by means associated with the oscillator
- H03B2202/082—Reduction of undesired oscillations originated from the oscillator in circuit elements external to the oscillator by means associated with the oscillator by avoiding coupling between these circuit elements
- H03B2202/084—Reduction of undesired oscillations originated from the oscillator in circuit elements external to the oscillator by means associated with the oscillator by avoiding coupling between these circuit elements through shielding
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- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
Description
본 발명은 듀얼 전압제어발진기에 구비되는 마이크로-스트립라인의 인쇄패턴 배치를 달리하여 두 전압제어발진기간의 신호간섭현상을 최소화시키기 위한 차폐특성이 개선된 듀얼 전압제어발진기를 제공하는데 그 목적이 있다.An object of the present invention is to provide a dual voltage controlled oscillator having improved shielding characteristics for minimizing a signal interference between two voltage controlled oscillators by differently arranging a print pattern of a micro-strip line included in a dual voltage controlled oscillator.
본 발명은 무선송수신기에 구비되는 듀얼 전압제어발진기(DUAL VCO)에 관한 것으로, 특히 간단하게 인쇄패턴의 배치를 달리하여 두 전압제어발진기간의 신호간섭현상을 해소하기 위한 차폐특성이 개선된 듀얼 전압제어발진기에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dual voltage controlled oscillator (DUAL VCO) provided in a wireless transceiver and more particularly to a dual voltage controlled oscillator (DUAL VCO) having improved shielding characteristics for eliminating signal interference between two voltage controlled oscillators Lt; / RTI >
일반적으로, 휴대폰이나 무선전화기등은 고주파신호를 이용하여 통신하는 장치로써, 쌍방향 통신을 위하여 고주파신호로 변환된 음성신호를 송신 또는 수신할 수 있도록 송수신안테나에 연결되는 송신장치 및 수신장치를 구비하고 있다. 그리고 송신단의 주파수와 수신단의 주파수는 대부분 약 45㎒의 차이를 두고 설정되는데, 예를들어 송신고주파신호가 959.5㎒대역을 사용하면, 수신고주파신호는 914.5㎒대역을 사용한다. 이런 송신신호와 수신신호의 변복조를 위하여 제어신호에 따라서 두 대역에서 발진하는 듀얼 전압제어발진기를 구비한다.2. Description of the Related Art Generally, a cellular phone, a wireless telephone, or the like is a device that communicates using a high frequency signal, and includes a transmitting device and a receiving device connected to a transmitting and receiving antenna so as to transmit or receive a voice signal converted into a high- have. The frequency of the transmitting end and the frequency of the receiving end are set to be about 45 MHz. For example, if the transmitting high frequency signal uses the 959.5 MHz band, the received high frequency signal uses the 914.5 MHz band. And a dual voltage controlled oscillator oscillating in two bands according to a control signal for modulation and demodulation of the transmission signal and the reception signal.
상기와 같은 듀얼 전압제어발진기의 개략적인 구성은 제1도와 같다.The schematic configuration of the dual voltage controlled oscillator is the same as that of the first embodiment.
듀얼 전압제어발진기는 송신반송파대역으로 발진하는 부분(A)과, 수신고주파대역으로 발진하는 부분(B)으로 나누어지고, 그 두 부분(A,B)은 각각 입력되는 튜닝 전압에 따라서 발진주파수를 설정하는 탱크회로가 연결되는 발진부와, 상기 발진부로부터 발진된 주파수신호를 증폭출력하는 버퍼증폭부로 이루어져 있는데, 기본적인 구성이 A와 B가 동일하므로, A부분만을 설명하면, 튜닝전압(VT)를 저항(R5)를 통해 그 음극으로 인가되도록 가변용량다이오드(VD1)을 구비하고, 상기 가변용량다이오드(VD1)의 양극은 바이패스콘덴서(C13)을 통해 접지되면서, 또한 저항(R6),(R10)에 의하여 분배되어 입력되는 모드선택신호(MOD)가 인가되며, 상기 가변용량다이오드(VD1)에 병렬로 마이크로-스트립라인(S1)이 인쇄되고, 상기 마이크로-스트립라인(S1)에 병렬로 콘덴서(C12)가 연결되고, 상기 콘덴서(C12)의 일단은 다른 콘덴서(C7)를 통해 그 베이스와 이미터가 콘덴서(C9)로 연결되고, 그 이미터에는 병렬결합된 콘덴서(C11)와 저항(R8)이 연결된 트랜지스터(Q3)의 베이스와 연결되고, 상기 트랜지스터의 콜렉터는 버퍼트랜지스터(Q1)의 이미터에 연결되며, 또한 상기 두 트랜지스터(Q1,Q3)의 이미터와 베이스는 바이패스 콘덴서(C5)를 통해 연결된다.The dual voltage controlled oscillator is divided into a portion A oscillating in the transmission carrier band and a portion B oscillating in the reception high frequency band. The two portions A and B respectively output the oscillation frequency according to the input tuning voltage. And a buffer amplifier unit for amplifying and outputting a frequency signal oscillated from the oscillation unit. Since the basic configuration is the same as that of A and B, if only the A portion is described, the tuning voltage The positive electrode of the variable capacitance diode VD1 is grounded through the bypass capacitor C13 and the resistors R6 and R10 are grounded through the bypass capacitor C13. Strip line S1 is printed in parallel with the variable capacitance diode VD1 and a capacitor is connected in parallel to the micro-strip line S1 by applying a mode selection signal MOD, C12) One end of the capacitor C12 is connected to a base of the capacitor C12 through another capacitor C7 and the emitter is connected to the capacitor C9 and a capacitor C11 and a resistor R8 connected in parallel to the emitter are connected The collector of the transistor is connected to the emitter of the buffer transistor Q1 and the emitter and base of the two transistors Q1 and Q3 are connected to the base of the transistor Q3 via a bypass capacitor C5 .
그런데, 상기와 같은 회로구성을 인쇄회로기판에서의 소자삽입및 패턴인쇄로 구현하는데, 종래에는 상기 발진부를 이루는 송신부와 수신부의 두 마이크로-스트립라인 제3도에 보인 것처럼 평행하고 가깝게 배치되었기 때문에 두 마이크로-스트립라인간의 간섭이 심해지는 문제점이 있었다.However, since the above-described circuit configuration is implemented by element insertion and pattern printing on a printed circuit board, two micro-strip lines of a transmitter and a receiver, which constitute the oscillation unit, are arranged in parallel and close to each other as shown in FIG. There is a problem that the interference between the micro-strip lines becomes worse.
본 발명은 상기와 같은 문제점을 해결하기 위한 기술적인 수단으로써, 송신부와 수신부로 이루어진 듀얼 전압제어발진기에 있어서,The present invention provides a dual voltage controlled oscillator comprising a transmitter and a receiver as technical means for solving the above problems,
송신측 마이크로-스트립라인과 수신측 마이크로-스트립라인이 기준선으로부터 바깥쪽으로 각각 45도 각도로 벌어진 상태로 배치되도록 인쇄함을 특징으로 한다.And the transmission side micro-strip line and the reception side micro-strip line are arranged so as to be arranged at an angle of 45 degrees outward from the reference line, respectively.
제1도는 일반적은 듀얼전압제어발진기의 구성을 보여주는 회로도이다.FIG. 1 is a circuit diagram showing a configuration of a general dual voltage controlled oscillator.
제2도 (가)는 본 고안에 의한 마이크로-스트립라인의 인쇄패턴을 보여주는 배치도이고,FIG. 2 (a) is a layout view showing a print pattern of the micro-strip line according to the present invention,
제2도 (나)는 제2도 (가)의 측단면도이다.FIG. 2 (B) is a side cross-sectional view of FIG. 2 (A).
제3도는 종래의 마이크로-스트립라인의 인쇄패턴을 보여주는 배치도이다.FIG. 3 is a layout diagram showing a print pattern of a conventional micro-strip line.
*도면의 주요부분에 대한 설명*Description of the Related Art [0002]
A : 송신고주파발진부 B : 수신고주파발진부A: transmission high frequency oscillation portion B: reception high frequency oscillation portion
S21 : 송신측마이크로스트립라인 S22 : 수신측마이크로스트립라인S21: transmission-side microstrip line S22: reception-side microstrip line
제2도 (가)는 본 발명에 의한 듀얼전압제어발진기의 인쇄회로기판의 일부분을 보여주는 배치도로써, 송신측 마이크로-스트립라인(S21)과 수신측 마이크로-스트립라인(S22)이 기준선(20)으로부터 바깥쪽으로 각각 45도 각도로 벌어진 상태로 배치되도록 인쇄한다. 이로써 종래의 두 마이크로 스트립라인의 배치보다 더 바깥쪽으로 벌어지게 배치함으로써 두 마이크로-스트립라인(S21,S22)사이의 공간이 종래의 것보다 더 커짐을 알 수 있다.FIG. 2 is a layout view showing a part of the printed circuit board of the dual voltage controlled oscillator according to the present invention, in which the transmission side micro-strip line S21 and the reception side micro-strip line S22 are connected to the reference line 20, So as to be arranged at an angle of 45 degrees from each other. As a result, it can be seen that the space between the two micro-strip lines S21 and S22 is larger than that of the conventional micro-strip line by disposing the micro-strip lines more outward than the arrangement of the conventional two micro-strip lines.
제2도 (나)는 상기 제2도 (가)에 보인 인쇄회로기판의 일부분의 측단면도로써, Er은 인쇄회로기판의 유전층의 유전율을 나타내고, G는 그라운드층을 이고, S21은 송신측 마이크로-스트립라인이고, S22는 수신측 마이크로-스트립라인이며, S는 두 마이크로-스트립라인(S21,S22)간의 공간이고, Cp는 스트립라인과 그라운드사이의 병렬판용량(parallel plate capacitance)이고, Cf는 단일 마이크로스트립의 용량과 Cp로부터 구해지는 주변용량(fringe capacitance)이고, Cga는 공기중에서의 갭용량고, Cgd는 AA'와, A'O와 OH 및 공기-유전체 접속면으로 형성된 영역에서의 전속(electric flux)에 의한 용량값이다.2 is a cross-sectional side view of a portion of the printed circuit board shown in FIG. 2 (a), wherein Er denotes the dielectric constant of the dielectric layer of the printed circuit board, G denotes the ground layer, Strip line; S22 is a receiving micro-strip line; S is a space between two micro-strip lines S21 and S22; Cp is a parallel plate capacitance between the strip line and ground; and Cf Is the capacitance of the single microstrip and the fringe capacitance obtained from Cp, Cga is the gap capacitance in air, Cgd is the capacitance of AA ', A' O and OH, and the air- It is the capacity value by electric flux.
상기 첨부도면에 의하여 본 발명의 원리 및 작용을 설명하면 다음과 같다.The principle and operation of the present invention will now be described with reference to the accompanying drawings.
상기 제2도 (나)에서 두 마이크로-스트립라인(S21),(S22)간에 발생하는 신호간섭은 상기 두 마이크로-스트립라인간의 공진주파수를 결정하는 정전유량에 비례한다. 그리고, 상기 두 마이크로-스트립라인(S21),(S22)간에 발생하는 정전용량은 공기중의 갭용량인 Cga와, 유전층에서 발생하는 갭용량 Cgd로써, 그 중 Cga를 구하면 다음과 같다.The signal interference occurring between the two micro-strip lines S21 and S22 in the second diagram (B) is proportional to the electrostatic flow rate which determines the resonance frequency between the two micro-strip lines. The electrostatic capacitance generated between the two micro-strip lines S21 and S22 is Cga, which is the gap capacitance in the air, and Cgd, which is the gap capacitance generated in the dielectric layer. Cga is obtained as follows.
여기에서, W는 스트립라인의 폭이고, S는 스트립라인사이의 공간, h는 유전체의 두께로써, 상기 (1)식을 풀면 다음과 같다.Here, W is the width of the stripline, S is the space between the strip lines, and h is the thickness of the dielectric. The above equation (1) is solved as follows.
상기에서, K'2= 1 - K2이다.In the above, K ' 2 = 1 - K 2 .
그리고, Cgd는 다음과 같다.And, Cgd is as follows.
상기 식(2),(3) 및 (4)식을 살펴보면, 두 마이크로-스트립라인(S21),(S22)간에 발생하는 정전용량 Cga와 Cgd는 모두 두 마이크로-스트립라인(S21),(S22)간의 공간에 반비례함을 알 수 있다. 그러므로, 두 마이크로-스트립라인(S21),(S22)간의 공간을 크게 하면 용량값 Cga 와 Cgd는 작아지고, 두 마이크로-스트립라인(S21),(S22)사이에 존재하는 용량성이 줄어들어 서로간의 간섭현상이 감소될 수 있다. 그러나, 간섭현상을 없애기 위하여 두 마이크로-스트립라인(S21),(S22)의 공간을 너무 넓히면, 공간효율이 저하되는 문제점이 있다.The electrostatic capacitances Cga and Cgd generated between the two micro-strip lines S21 and S22 are both the two micro-strip lines S21 and S22, respectively, as shown in the formulas (2), (3) ), Which is the inverse proportion to the space between the two. Therefore, when the space between the two micro-strip lines S21 and S22 is increased, the capacitance values Cga and Cgd are reduced and the capacitances existing between the two micro-strip lines S21 and S22 are reduced, The interference phenomenon can be reduced. However, if the space of the two micro-strip lines S21 and S22 is excessively widened to eliminate the interference phenomenon, there is a problem that the space efficiency is lowered.
그러므로, 상기 원리에 의하여, 본 발명에서는 제2도 (가)에 보인 패턴과 같이 두 마이크로-스트립라인(S21),(S22)을 기준선(20)으로부터 바깥쪽으로 각각 약 45도 각도만큼 벌어진 상태로 배치되도록 인쇄한다. 다시말해서, 서로 90도 각도를 유지하여 배치되도록 인쇄하여, 불필요한 공간의 낭비없이 제3도에 보인 종래의 패턴보다 둘 사이의 공간(S)을 증가시킨다.Therefore, according to the above-described principle, in the present invention, the two micro-strip lines S21 and S22 are spread outwardly from the reference line 20 by about 45 degrees, as in the pattern shown in FIG. 2 To be printed. In other words, they are printed so as to be arranged at an angle of 90 degrees with each other, so that the space S between the two is increased more than the conventional pattern shown in FIG. 3 without unnecessary waste of space.
이와같이, 본 발명은 두 마이크로-스트립라인을 기준선으로부터 바깥쪽으로 약 45도 각도만큼 벌어진 상태로 배치되도록 대칭인쇄함으로써 기판의 낭비없이, 두 마이크로-스트립라인간의 공간을 크게하여, 신호간섭현상을 최소화하는 우수한 효과가 있는 것이다.Thus, according to the present invention, the two micro-strip lines are symmetrically printed so as to be arranged at an angle of about 45 degrees outward from the reference line, thereby increasing the space between the two micro-strip lines without waste of the substrate, It is an excellent effect.
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